diff options
| author | Stelian Pop <stelian@popies.net> | 2008-05-08 20:52:14 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-05-10 11:32:06 +0200 |
| commit | 1c90df3e148ce0a3e2c86c63b38b19d47772f2a0 (patch) | |
| tree | 0b0351443b181f11cd2e2cac8cffe2fdfb036f8f /board/atmel | |
| parent | 11b162bae058e96c7929e358d4adff2bee6c2cc4 (diff) | |
AT91CAP9ADK: Handle 8 or 16 bit NAND
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/atmel')
| -rw-r--r-- | board/atmel/at91cap9adk/at91cap9adk.c | 8 | ||||
| -rw-r--r-- | board/atmel/at91cap9adk/nand.c | 3 |
2 files changed, 9 insertions, 2 deletions
diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index 5de52b919..67e16bb86 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -116,7 +116,12 @@ static void at91cap9_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | AT91_SMC_TDF_(1)); +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(1)); at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD); @@ -252,7 +257,6 @@ int board_init(void) #ifdef CONFIG_USB_OHCI_NEW at91cap9_uhp_hw_init(); #endif - return 0; } diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c index 28091a422..0432ef13d 100644 --- a/board/atmel/at91cap9adk/nand.c +++ b/board/atmel/at91cap9adk/nand.c @@ -63,6 +63,9 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd) int board_nand_init(struct nand_chip *nand) { nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif nand->hwcontrol = at91cap9adk_nand_hwcontrol; nand->chip_delay = 20; |