diff options
author | John Rigby <john.rigby@linaro.org> | 2012-01-16 22:39:48 -0700 |
---|---|---|
committer | John Rigby <john.rigby@linaro.org> | 2012-01-19 17:08:46 -0700 |
commit | 717c781e3a191341c401dfa3e3daf121acd7669a (patch) | |
tree | 885ac5dee23609049a495187bbaef11302e0d676 | |
parent | 9c5f825516c97e7afc69e2602655930ef5bdae8a (diff) |
HACK: Copy in alternate mmc files for snowball
common/cmd_ste_mmc.c
drivers/mmc/mmc_ste.c
include/mmc_ste.h
Original commit message:
snowball: override copy port of generic mmc-fixes from igloo.
TODO: remove this patch and use pl180_mmci driver
-rw-r--r-- | common/Makefile | 1 | ||||
-rw-r--r-- | common/cmd_ste_mmc.c | 389 | ||||
-rw-r--r-- | drivers/mmc/Makefile | 1 | ||||
-rw-r--r-- | drivers/mmc/mmc_ste.c | 1111 | ||||
-rw-r--r-- | include/mmc_ste.h | 306 |
5 files changed, 1808 insertions, 0 deletions
diff --git a/common/Makefile b/common/Makefile index 2d9ae8c5c..94f34b28f 100644 --- a/common/Makefile +++ b/common/Makefile @@ -123,6 +123,7 @@ COBJS-$(CONFIG_CMD_MII) += cmd_mdio.o endif COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o +COBJS-$(CONFIG_CMD_STE_MMC) += cmd_ste_mmc.o COBJS-$(CONFIG_CMD_MMC_SPI) += cmd_mmc_spi.o COBJS-$(CONFIG_MP) += cmd_mp.o COBJS-$(CONFIG_CMD_MTDPARTS) += cmd_mtdparts.o diff --git a/common/cmd_ste_mmc.c b/common/cmd_ste_mmc.c new file mode 100644 index 000000000..ceafdda12 --- /dev/null +++ b/common/cmd_ste_mmc.c @@ -0,0 +1,389 @@ +/* + * (C) Copyright 2003 + * Kyle Harris, kharris@nexus-tech.net + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <mmc.h> + +#ifndef CONFIG_GENERIC_MMC +static int curr_device = -1; + +int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int dev; + + if (argc < 2) { + cmd_usage(cmdtp); + return 1; + } + + if (strcmp(argv[1], "init") == 0) { + if (argc == 2) { + if (curr_device < 0) + dev = 1; + else + dev = curr_device; + } else if (argc == 3) { + dev = (int)simple_strtoul(argv[2], NULL, 10); + } else { + cmd_usage(cmdtp); + return 1; + } + + if (mmc_legacy_init(dev) != 0) { + puts("No MMC card found\n"); + return 1; + } + + curr_device = dev; + printf("mmc%d is available\n", curr_device); + } else if (strcmp(argv[1], "device") == 0) { + if (argc == 2) { + if (curr_device < 0) { + puts("No MMC device available\n"); + return 1; + } + } else if (argc == 3) { + dev = (int)simple_strtoul(argv[2], NULL, 10); + +#ifdef CONFIG_SYS_MMC_SET_DEV + if (mmc_set_dev(dev) != 0) + return 1; +#endif + curr_device = dev; + } else { + cmd_usage(cmdtp); + return 1; + } + + printf("mmc%d is current device\n", curr_device); + } else { + cmd_usage(cmdtp); + return 1; + } + + return 0; +} + +U_BOOT_CMD( + mmc, 3, 1, do_mmc, + "MMC sub-system", + "init [dev] - init MMC sub system\n" + "mmc device [dev] - show or set current device" +); +#else /* !CONFIG_GENERIC_MMC */ + +static void print_mmcinfo(struct mmc *mmc) +{ + printf("Device: %s\n", mmc->name); + printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24); + printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff); + printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff, + (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, + (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); + + printf("Tran Speed: %d\n", mmc->tran_speed); + printf("Rd Block Len: %d\n", mmc->read_bl_len); + + printf("%s version %d.%d\n", IS_SD(mmc) ? "SD" : "MMC", + (mmc->version >> 4) & 0xf, mmc->version & 0xf); + + printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No"); + printf("Capacity: %lld\n", mmc->capacity); + + printf("Bus Width: %d-bit\n", mmc->bus_width); +} + +static void print_csd(struct mmc *mmc) +{ + printf("mmc->csd[0] = 0x%08X\n", mmc->csd[0]); + printf("mmc->csd[1] = 0x%08X\n", mmc->csd[1]); + printf("mmc->csd[2] = 0x%08X\n", mmc->csd[2]); + printf("mmc->csd[3] = 0x%08X\n", mmc->csd[3]); + + printf("csd->csd_structure = 0x%02X\n", CSD_STRUCTURE(mmc->csd)); + printf("csd->spec_vers = 0x%02X\n", CSD_SPEC_VERS(mmc->csd)); + printf("csd->taac = 0x%02X\n", CSD_TAAC(mmc->csd)); + printf("csd->nsac = 0x%02X\n", CSD_NSAC(mmc->csd)); + printf("csd->tran_speed = 0x%02X\n", CSD_TRAN_SPEED(mmc->csd)); + printf("csd->ccc = 0x%04X\n", CSD_CCC(mmc->csd)); + printf("csd->read_bl_len = 0x%02X\n", CSD_READ_BL_LEN(mmc->csd)); + printf("csd->read_bl_partial = 0x%02X\n", + CSD_READ_BL_PARTIAL(mmc->csd)); + printf("csd->write_blk_misalign = 0x%02X\n", + CSD_WRITE_BLK_MISALIGN(mmc->csd)); + printf("csd->read_blk_misalign = 0x%02X\n", + CSD_READ_BLK_MISALIGN(mmc->csd)); + printf("csd->dsr_imp = 0x%02X\n", CSD_DSR_IMP(mmc->csd)); + printf("csd->c_size = 0x%04X\n", CSD_C_SIZE(mmc->csd)); + printf("csd->vdd_r_curr_min = 0x%04X\n", CSD_VDD_R_CURR_MIN(mmc->csd)); + printf("csd->vdd_r_curr_max = 0x%04X\n", CSD_VDD_R_CURR_MAX(mmc->csd)); + printf("csd->vdd_w_curr_min = 0x%04X\n", CSD_VDD_W_CURR_MIN(mmc->csd)); + printf("csd->vdd_w_curr_max = 0x%04X\n", CSD_VDD_W_CURR_MAX(mmc->csd)); + printf("csd->c_size_mult = 0x%04X\n", CSD_C_SIZE_MULT(mmc->csd)); + printf("csd->erase_grp_size = 0x%04X\n", CSD_ERASE_GRP_SIZE(mmc->csd)); + printf("csd->erase_grp_mult = 0x%04X\n", CSD_ERASE_GRP_MULT(mmc->csd)); + printf("csd->wp_grp_size = 0x%04X\n", CSD_WP_GRP_SIZE(mmc->csd)); + printf("csd->wp_grp_enable = 0x%02X\n", CSD_WP_GRP_ENABLE(mmc->csd)); + printf("csd->default_ecc = 0x%02X\n", CSD_DEFAULT_ECC(mmc->csd)); + printf("csd->r2w_factor = 0x%04X\n", CSD_R2W_FACTOR(mmc->csd)); + printf("csd->write_bl_len = 0x%04X\n", CSD_WRITE_BL_LEN(mmc->csd)); + printf("csd->write_bl_partial = 0x%02X\n", + CSD_WRITE_BL_PARTIAL(mmc->csd)); + printf("csd->file_format_grp = 0x%02X\n", + CSD_FILE_FORMAT_GRP(mmc->csd)); + printf("csd->copy = 0x%02X\n", CSD_COPY(mmc->csd)); + printf("csd->perm_write_protect = 0x%02X\n", + CSD_PERM_WRITE_PROTECT(mmc->csd)); + printf("csd->tmp_write_protect = 0x%02X\n", + CSD_TMP_WRITE_PROTECT(mmc->csd)); + printf("csd->ecc = 0x%02X\n", CSD_ECC(mmc->csd)); + printf("csd->crc = 0x%02X\n", CSD_CRC(mmc->csd)); + printf("csd->one = 0x%02X\n", CSD_ONE(mmc->csd)); +} + +static void print_ext_csd(char *ext_csd) +{ + printf("ext_csd->s_cmd_set = 0x%02X\n", ext_csd[504]); + printf("ext_csd->hpl_features = 0x%02X\n", ext_csd[503]); + printf("ext_csd->bkops_support = 0x%02X\n", ext_csd[502]); + printf("ext_csd->bkops_status = 0x%02X\n", ext_csd[246]); + printf("ext_csd->correctly_prg_sectors_num = 0x%08X\n", + ext_csd[245] * (1 << 24) | ext_csd[244] * (1 << 16) | + ext_csd[243] * (1 << 8) | ext_csd[242]); + printf("ext_csd->ini_timeout_ap = 0x%02X\n", ext_csd[241]); + printf("ext_csd->pwr_cl_ddr_52_360 = 0x%02X\n", ext_csd[239]); + printf("ext_csd->pwr_cl_ddr_52_195 = 0x%02X\n", ext_csd[238]); + printf("ext_csd->min_perf_ddr_w_8_52 = 0x%02X\n", ext_csd[235]); + printf("ext_csd->min_perf_ddr_r_8_52 = 0x%02X\n", ext_csd[234]); + printf("ext_csd->trim_mult = 0x%02X\n", ext_csd[232]); + printf("ext_csd->sec_feature_support = 0x%02X\n", ext_csd[231]); + printf("ext_csd->sec_erase_mult = 0x%02X\n", ext_csd[230]); + printf("ext_csd->sec_trim_mult = 0x%02X\n", ext_csd[229]); + printf("ext_csd->boot_info = 0x%02X\n", ext_csd[228]); + printf("ext_csd->boot_size_mult = 0x%02X\n", ext_csd[226]); + printf("ext_csd->acc_size = 0x%02X\n", ext_csd[225]); + printf("ext_csd->hc_erase_gp_size = 0x%02X\n", ext_csd[224]); + printf("ext_csd->erase_timeout_mult = 0x%02X\n", ext_csd[223]); + printf("ext_csd->rel_wr_sec_c = 0x%02X\n", ext_csd[222]); + printf("ext_csd->hc_wp_grp_size = 0x%02X\n", ext_csd[221]); + printf("ext_csd->s_c_vcc = 0x%02X\n", ext_csd[220]); + printf("ext_csd->s_c_vccq = 0x%02X\n", ext_csd[219]); + printf("ext_csd->s_a_timeout = 0x%02X\n", ext_csd[217]); + printf("ext_csd->sec_count = 0x%08X\n", ext_csd[215] * (1 << 24) | + ext_csd[214] * (1 << 16)|ext_csd[213]*(1 << 8)|ext_csd[212]); + printf("ext_csd->min_perf_w_8_52 = 0x%02X\n", ext_csd[210]); + printf("ext_csd->min_perf_r_8_52 = 0x%02X\n", ext_csd[209]); + printf("ext_csd->min_perf_w_8_26_4_52 = 0x%02X\n", ext_csd[208]); + printf("ext_csd->min_perf_r_8_26_4_52 = 0x%02X\n", ext_csd[207]); + printf("ext_csd->min_perf_w_4_26 = 0x%02X\n", ext_csd[206]); + printf("ext_csd->min_perf_r_4_26 = 0x%02X\n", ext_csd[205]); + printf("ext_csd->pwr_cl_26_360 = 0x%02X\n", ext_csd[203]); + printf("ext_csd->pwr_cl_52_360 = 0x%02X\n", ext_csd[202]); + printf("ext_csd->pwr_cl_26_195 = 0x%02X\n", ext_csd[201]); + printf("ext_csd->pwr_cl_52_195 = 0x%02X\n", ext_csd[200]); + printf("ext_csd->partition_switch_time = 0x%02X\n", ext_csd[199]); + printf("ext_csd->out_of_interrupt_time = 0x%02X\n", ext_csd[198]); + printf("ext_csd->card_type = 0x%02X\n", ext_csd[196]); + printf("ext_csd->csd_structure = 0x%02X\n", ext_csd[194]); + printf("ext_csd->ext_csd_rev = 0x%02X\n", ext_csd[192]); + printf("ext_csd->cmd_set = 0x%02X\n", ext_csd[191]); + printf("ext_csd->cmd_set_rev = 0x%02X\n", ext_csd[189]); + printf("ext_csd->power_class = 0x%02X\n", ext_csd[187]); + printf("ext_csd->hs_timing = 0x%02X\n", ext_csd[185]); + printf("ext_csd->bus_width = 0x%02X\n", ext_csd[183]); + printf("ext_csd->erased_mem_cont = 0x%02X\n", ext_csd[181]); + printf("ext_csd->partition_config = 0x%02X\n", ext_csd[179]); + printf("ext_csd->boot_config_prot = 0x%02X\n", ext_csd[178]); + printf("ext_csd->boot_bus_width = 0x%02X\n", ext_csd[177]); + printf("ext_csd->erase_group_def = 0x%02X\n", ext_csd[175]); + printf("ext_csd->boot_wp = 0x%02X\n", ext_csd[173]); + printf("ext_csd->user_wp = 0x%02X\n", ext_csd[171]); + printf("ext_csd->fw_config = 0x%02X\n", ext_csd[169]); + printf("ext_csd->rpmb_size_mult = 0x%02X\n", ext_csd[168]); + printf("ext_csd->wr_rel_set = 0x%02X\n", ext_csd[167]); + printf("ext_csd->wr_rel_param = 0x%02X\n", ext_csd[166]); + printf("ext_csd->bkops_start = 0x%02X\n", ext_csd[164]); + printf("ext_csd->bkops_en = 0x%02X\n", ext_csd[163]); + printf("ext_csd->rst_n_function = 0x%02X\n", ext_csd[162]); + printf("ext_csd->hpi_mgmt = 0x%02X\n", ext_csd[161]); + printf("ext_csd->partitioning_support = 0x%02X\n", ext_csd[160]); + printf("ext_csd->max_en_size_mult = 0x%08X\n", ext_csd[159] * (1 << 16) + | ext_csd[158] * (1 << 8) | ext_csd[157]); + printf("ext_csd->partitions_attribute = 0x%02X\n", ext_csd[156]); + printf("ext_csd->partition_setting_completed = 0x%02X\n", ext_csd[155]); + printf("ext_csd->gp_size_mult = 0x%08X\n", ext_csd[146] * (1 << 24) | + ext_csd[145] * (1 << 16) | ext_csd[144] * (1 << 8) | + ext_csd[143]); + printf("ext_csd->enh_size_mult = 0x%08X\n", ext_csd[142] * (1 << 16) | + ext_csd[141]*(1 << 8) | ext_csd[140]); + printf("ext_csd->enh_start_addr = 0x%08X\n", ext_csd[139] * (1 << 24) | + ext_csd[138] * (1 << 16) | ext_csd[137] * (1 << 8) | + ext_csd[136]); + printf("ext_csd->sec_bad_blk_mgmnt = 0x%02X\n", ext_csd[134]); +} + +int do_mmcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + struct mmc *mmc; + int dev_num; + + if (argc < 2) + dev_num = 0; + else + dev_num = simple_strtoul(argv[1], NULL, 0); + + mmc = find_mmc_device(dev_num); + + if (mmc) { + mmc_init(mmc); + + print_mmcinfo(mmc); + + if ((argc > 2) && (strcmp(argv[2], "csd") == 0)) + print_csd(mmc); + + /* Print Ext CSD */ + if ((argc > 2) && (strcmp(argv[2], "ext_csd") == 0)) { + char ext_csd[512]; + struct mmc_cmd cmd; + struct mmc_data data; + + /* Get the Card Status Register */ + cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + data.dest = ext_csd; + data.blocks = 1; + data.blocksize = 512; + data.flags = MMC_DATA_READ; + + if (!mmc->send_cmd(mmc, &cmd, &data)) + print_ext_csd(ext_csd); + } + } + + return 0; +} + +U_BOOT_CMD(mmcinfo, 3, 0, do_mmcinfo, + "mmcinfo <dev num> [csd | ext_csd] -- display MMC info\n", + "" +); + +int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int rc = 0; + + switch (argc) { + case 3: + if (strcmp(argv[1], "rescan") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + struct mmc *mmc = find_mmc_device(dev); + + if (!mmc) + return 1; + + mmc_init(mmc); + + return 0; + } + + case 0: + case 1: + case 4: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (!strcmp(argv[1], "list")) { + print_mmc_devices('\n'); + return 0; + } + return 1; + default: /* at least 5 args */ + if (strcmp(argv[1], "read") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + void *addr = (void *)simple_strtoul(argv[3], NULL, 16); + u32 cnt = simple_strtoul(argv[5], NULL, 16); + u32 n; + u32 blk = simple_strtoul(argv[4], NULL, 16); + struct mmc *mmc = find_mmc_device(dev); + + if (!mmc) + return 1; + + printf("\nMMC read: dev # %d, block # %d, count %d\n", + dev, blk, cnt); + + mmc_init(mmc); + + n = mmc->block_dev.block_read(dev, blk, cnt, addr); + + /* flush cache after read */ + flush_cache((ulong)addr, cnt * 512); /* FIXME */ + + printf("%d blocks read: %s\n", + n, (n==cnt) ? "OK" : "ERROR"); + return (n == cnt) ? 0 : 1; + } else if (strcmp(argv[1], "write") == 0) { + int dev = simple_strtoul(argv[2], NULL, 10); + void *addr = (void *)simple_strtoul(argv[3], NULL, 16); + u32 cnt = simple_strtoul(argv[5], NULL, 16); + u32 n; + struct mmc *mmc = find_mmc_device(dev); + + int blk = simple_strtoul(argv[4], NULL, 16); + + if (!mmc) + return 1; + + printf("\nMMC write: dev # %d, block # %d, count %d\n", + dev, blk, cnt); + + mmc_init(mmc); + + n = mmc->block_dev.block_write(dev, blk, cnt, addr); + + printf("%d blocks written: %s\n", + n, (n == cnt) ? "OK" : "ERROR"); + return (n == cnt) ? 0 : 1; + } else { + printf("Usage:\n%s\n", cmdtp->usage); + rc = 1; + } + + return rc; + } +} + +U_BOOT_CMD( + mmc, 6, 1, do_mmcops, + "MMC sub system", + "read <device num> addr blk# cnt\n" + "mmc write <device num> addr blk# cnt\n" + "mmc rescan <device num>\n" + "mmc list - lists available devices"); +#endif diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 506f1d6ef..ef125a030 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -31,6 +31,7 @@ COBJS-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o COBJS-$(CONFIG_FTSDC010) += ftsdc010_esdhc.o COBJS-$(CONFIG_GENERIC_MMC) += mmc.o +COBJS-$(CONFIG_GENERIC_STE_MMC) += mmc_ste.o COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o diff --git a/drivers/mmc/mmc_ste.c b/drivers/mmc/mmc_ste.c new file mode 100644 index 000000000..56b847fe2 --- /dev/null +++ b/drivers/mmc/mmc_ste.c @@ -0,0 +1,1111 @@ +/* + * Copyright 2008, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based vaguely on the Linux code + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <common.h> +#include <command.h> +#include <mmc_ste.h> +#include <part.h> +#include <malloc.h> +#include <linux/list.h> +#include <div64.h> + +static struct list_head mmc_devices; +static int cur_dev_num = -1; + +static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + return mmc->send_cmd(mmc, cmd, data); +} + +static int mmc_set_blocklen(struct mmc *mmc, uint len) +{ + struct mmc_cmd cmd; + + cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = len; + cmd.flags = 0; + + return mmc_send_cmd(mmc, &cmd, NULL); +} + +static int mmc_set_block_count(struct mmc *mmc, uint blkcnt) +{ + struct mmc_cmd cmd; + + cmd.cmdidx = MMC_CMD_SET_BLOCK_COUNT; + cmd.resp_type = MMC_RSP_R1; + if (mmc->card_caps & MMC_MODE_REL_WR) + cmd.cmdarg = 0x80000000 | blkcnt; + else + cmd.cmdarg = blkcnt; + cmd.flags = 0; + + return mmc_send_cmd(mmc, &cmd, NULL); +} + +struct mmc *find_mmc_device(int dev_num) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + if (m->block_dev.dev == dev_num) + return m; + } + + printf("MMC Device %d not found\n", dev_num); + + return NULL; +} + +static unsigned long +mmc_bwrite_multi(struct mmc *mmc, ulong start, ulong blkcnt, const void *src) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + ulong blkwritecnt; + ulong blkleftcnt = blkcnt; + void *src_p = (void *) src; + uint max_block_cnt = 0xffff; + + /* + * Each mmc host controller has a size limit in it's register, used + * when initializing a new data transfer. Thus we need to wrap larger + * bulk of requests. At the moment the limit is hardcoded to 0xFFFF + * blocks. This should maybe be configurable by each host driver + * instead. + */ + + if ((mmc->card_caps & MMC_MODE_REL_WR) && + !(mmc->wr_rel_param & EXT_CSD_WR_REL_PARAM_EN_REL_WR)) + max_block_cnt = mmc->rel_wr_sec_c; + + while (blkleftcnt > 0) { + + if (blkleftcnt > max_block_cnt) + blkwritecnt = max_block_cnt; + else + blkwritecnt = blkleftcnt; + + if (mmc->high_capacity) + cmd.cmdarg = start; + else + cmd.cmdarg = start * mmc->write_bl_len; + + if (mmc->card_caps & MMC_MODE_REL_WR) { + err = mmc_set_block_count(mmc, blkwritecnt); + if (err) { + printf("MMC set block count failed, err=%d\n", + err); + return 0; + } + } + + cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + data.blocksize = mmc->write_bl_len; + data.flags = MMC_DATA_WRITE; + data.src = src_p; + data.blocks = blkwritecnt; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + printf("MMC write multi failed, err=%d\n", err); + return 0; + } + + if (!(mmc->card_caps & MMC_MODE_REL_WR) || + (max_block_cnt != mmc->rel_wr_sec_c)) { + cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_R1b; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { + printf("MMC write - stop cmd failed, err=%d\n", + err); + return 0; + } + } + + blkleftcnt -= blkwritecnt; + start += blkwritecnt; + src_p += blkwritecnt * mmc->write_bl_len; + } + + return blkcnt; +} + +static unsigned long +mmc_bwrite_single(struct mmc *mmc, ulong start, const void *src) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + + cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + if (mmc->high_capacity) + cmd.cmdarg = start; + else + cmd.cmdarg = start * mmc->write_bl_len; + + data.src = src; + data.blocks = 1; + data.blocksize = mmc->write_bl_len; + data.flags = MMC_DATA_WRITE; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + printf("MMC write single failed, err=%d\n", err); + return 0; + } + + return 1; +} + +static unsigned long +mmc_bwrite(int dev_num, unsigned long start, lbaint_t blkcnt, const void *src) +{ + int err; + struct mmc *mmc = find_mmc_device(dev_num); + + if (!mmc) { + printf("MMC Device %d not found\n", dev_num); + return 0; + } + + if (blkcnt > 1) + return mmc_bwrite_multi(mmc, start, blkcnt, src); + else if (blkcnt == 1) + return mmc_bwrite_single(mmc, start, src); + + return 0; +} + +static unsigned long +mmc_bread_multi(struct mmc *mmc, ulong start, ulong blkcnt, void *dst) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + ulong blkreadcnt; + ulong blkleftcnt = blkcnt; + + /* + * Each mmc host controller has a size limit in it's register, used + * when initializing a new data transfer. Thus we need to wrap larger + * bulk of requests. At the moment the limit is hardcoded to 0xFFFF + * blocks. This should maybe be configurable by each host driver + * instead. + */ + + while (blkleftcnt > 0) { + if (blkleftcnt > 0xffff) + blkreadcnt = 0xffff; + else + blkreadcnt = blkleftcnt; + + if (mmc->high_capacity) + cmd.cmdarg = start; + else + cmd.cmdarg = start * mmc->read_bl_len; + + cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + data.blocksize = mmc->read_bl_len; + data.flags = MMC_DATA_READ; + data.dest = dst; + data.blocks = blkreadcnt; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + printf("MMC read multi failed, err=%d\n", err); + return 0; + } + + cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_R1b; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) { + printf("MMC read - stop cmd failed, err=%d\n", err); + return 0; + } + + blkleftcnt -= blkreadcnt; + start += blkreadcnt; + dst += blkreadcnt * mmc->read_bl_len; + } + + return blkcnt; +} + +static unsigned long +mmc_bread_single(struct mmc *mmc, ulong start, void *dst) +{ + struct mmc_cmd cmd; + struct mmc_data data; + int err; + + cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; + cmd.resp_type = MMC_RSP_R1; + cmd.flags = 0; + + if (mmc->high_capacity) + cmd.cmdarg = start; + else + cmd.cmdarg = start * mmc->read_bl_len; + + data.dest = dst; + data.blocks = 1; + data.blocksize = mmc->read_bl_len; + data.flags = MMC_DATA_READ; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + printf("MMC read single failed, err=%d\n", err); + return 0; + } + + return 1; +} + +static unsigned long +mmc_bread(int dev_num, unsigned long start, lbaint_t blkcnt, void *dst) +{ + int err; + struct mmc *mmc = find_mmc_device(dev_num); + + if (!mmc) { + printf("MMC Device %d not found\n", dev_num); + return 0; + } + + if (blkcnt > 1) + return mmc_bread_multi(mmc, start, blkcnt, dst); + else if (blkcnt == 1) + return mmc_bread_single(mmc, start, dst); + + return 0; +} + +static int mmc_go_idle(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int err; + + udelay(1000); + + cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_NONE; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(2000); + + return 0; +} + +static int +sd_send_op_cond(struct mmc *mmc) +{ + int timeout = 1000; + int err; + struct mmc_cmd cmd; + + do { + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; + cmd.resp_type = MMC_RSP_R3; + cmd.cmdarg = mmc->voltages; + + if (mmc->version == SD_VERSION_2) + cmd.cmdarg |= OCR_HCS; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(1000); + } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); + + if (timeout <= 0) + return UNUSABLE_ERR; + + if (mmc->version != SD_VERSION_2) { + mmc->version = SD_VERSION_1_0; + mmc->high_capacity = 0; + } else { + mmc->ocr = cmd.response[0]; + mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); + } + mmc->rca = 0; + + return 0; +} + +static int mmc_send_op_cond(struct mmc *mmc) +{ + int timeout = 1000; + struct mmc_cmd cmd; + int err; + + /* Some cards seem to need this */ + mmc_go_idle(mmc); + + do { + cmd.cmdidx = MMC_CMD_SEND_OP_COND; + cmd.resp_type = MMC_RSP_R3; + cmd.cmdarg = OCR_HCS | mmc->voltages; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + udelay(1000); + } while (!(cmd.response[0] & OCR_BUSY) && timeout--); + + if (timeout <= 0) + return UNUSABLE_ERR; + + mmc->version = MMC_VERSION_UNKNOWN; + mmc->ocr = cmd.response[0]; + + mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); + mmc->rca = 0; + + return 0; +} + +static int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) +{ + struct mmc_cmd cmd; + struct mmc_data data; + + /* Get the Card Status Register */ + cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + data.dest = ext_csd; + data.blocks = 1; + data.blocksize = 512; + data.flags = MMC_DATA_READ; + + return mmc_send_cmd(mmc, &cmd, &data); +} + +static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) +{ + struct mmc_cmd cmd; + + cmd.cmdidx = MMC_CMD_SWITCH; + cmd.resp_type = MMC_RSP_R1b; + cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | + (index << 16) | + (value << 8); + cmd.flags = 0; + + return mmc_send_cmd(mmc, &cmd, NULL); +} + +static int mmc_change_freq(struct mmc *mmc) +{ + char ext_csd[512]; + char cardtype; + int err; + + mmc->card_caps = 0; + + /* + * Instead of probing according to the bus testing procedure, + * the buswitdh that is supported from the MMC device is hardcoded + * to both 8 and/or 4 bit. It is up to the host driver to set + * other limitations. This also applies to DDR mode. + */ + mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_DDR | + MMC_MODE_REL_WR; + + /* Only version 4 supports high-speed */ + if (mmc->version < MMC_VERSION_4) + return 0; + + err = mmc_send_ext_csd(mmc, ext_csd); + + if (err) + return err; + + if (mmc->high_capacity) + mmc->capacity = (u64)(ext_csd[EXT_CSD_SEC_CNT + 0] << 0 | + ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | + ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | + ext_csd[EXT_CSD_SEC_CNT + 3] << 24) * + mmc->read_bl_len; + + mmc->wr_rel_param = ext_csd[EXT_CSD_WR_REL_PARAM]; + mmc->rel_wr_sec_c = ext_csd[EXT_CSD_REL_WR_SEC_C]; + + if (mmc->rel_wr_sec_c == 1) + mmc->card_caps &= ~MMC_MODE_REL_WR; + + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); + if (err) + return err; + + /* Now check to see that it worked */ + err = mmc_send_ext_csd(mmc, ext_csd); + if (err) + return err; + + /* No high-speed support */ + if (!ext_csd[EXT_CSD_HS_TIMING]) + return 0; + + /* + * High Speed mode is set, two types: SDR 52MHz or SDR 26MHz + * DDR mode is not supported yet. + */ + cardtype = ext_csd[EXT_CSD_CARD_TYPE]; + if (cardtype & MMC_HS_52MHZ) + mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + else + mmc->card_caps |= MMC_MODE_HS; + + if (mmc->wr_rel_param & EXT_CSD_WR_REL_PARAM_HS_CTRL_REL) + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_WR_REL_SET, 1); + + return 0; +} + +static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) +{ + struct mmc_cmd cmd; + struct mmc_data data; + + /* Switch the frequency */ + cmd.cmdidx = SD_CMD_SWITCH_FUNC; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = (mode << 31) | 0xffffff; + cmd.cmdarg &= ~(0xf << (group * 4)); + cmd.cmdarg |= value << (group * 4); + cmd.flags = 0; + + data.dest = (char *)resp; + data.blocksize = 64; + data.blocks = 1; + data.flags = MMC_DATA_READ; + + return mmc_send_cmd(mmc, &cmd, &data); +} + +static int sd_change_freq(struct mmc *mmc) +{ + int err; + struct mmc_cmd cmd; + uint scr[2]; + uint switch_status[16]; + struct mmc_data data; + int timeout; + + mmc->card_caps = 0; + + /* Read the SCR to find out if this card supports higher speeds */ + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SEND_SCR; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + cmd.flags = 0; + + timeout = 3; + + do { + data.dest = (char *)&scr; + data.blocksize = 8; + data.blocks = 1; + data.flags = MMC_DATA_READ; + err = mmc_send_cmd(mmc, &cmd, &data); + } while (err && timeout--); + if (!timeout) + return err; + + mmc->scr[0] = __be32_to_cpu(scr[0]); + mmc->scr[1] = __be32_to_cpu(scr[1]); + + switch ((mmc->scr[0] >> 24) & 0xf) { + case 0: + mmc->version = SD_VERSION_1_0; + break; + case 1: + mmc->version = SD_VERSION_1_10; + break; + case 2: + mmc->version = SD_VERSION_2; + break; + default: + mmc->version = SD_VERSION_1_0; + break; + } + + /* Version 1.0 doesn't support switching */ + if (mmc->version == SD_VERSION_1_0) + return 0; + + timeout = 4; + while (timeout--) { + err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, + (u8 *)&switch_status); + + if (err) + return err; + + /* The high-speed function is busy. Try again */ + if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) + break; + } + + if (mmc->scr[0] & SD_DATA_4BIT) + mmc->card_caps |= MMC_MODE_4BIT; + + /* If high-speed isn't supported, we return */ + if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) + return 0; + + err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)&switch_status); + + if (err) + return err; + + if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) + mmc->card_caps |= MMC_MODE_HS; + + return 0; +} + +/* + * frequency bases + * divided by 10 to be nice to platforms without floating point + */ +static int fbase[] = { + 10000, + 100000, + 1000000, + 10000000, +}; + +/* + * Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice + * to platforms without floating point. + */ +static int multipliers[] = { + 0, /* reserved */ + 10, + 12, + 13, + 15, + 20, + 25, + 30, + 35, + 40, + 45, + 50, + 55, + 60, + 70, + 80, +}; + +static void mmc_set_ios(struct mmc *mmc) +{ + mmc->set_ios(mmc); +} + +static void mmc_set_clock(struct mmc *mmc, uint clock) +{ + if (clock > mmc->f_max) + clock = mmc->f_max; + + if (clock < mmc->f_min) + clock = mmc->f_min; + + mmc->clock = clock; + + mmc_set_ios(mmc); +} + +static void mmc_set_bus_width(struct mmc *mmc, uint width) +{ + mmc->bus_width = width; + + mmc_set_ios(mmc); +} + +static int mmc_startup(struct mmc *mmc) +{ + int err; + uint mult, freq; + u64 cmult, csize; + struct mmc_cmd cmd; + + /* Put the Card in Identify Mode */ + cmd.cmdidx = MMC_CMD_ALL_SEND_CID; + cmd.resp_type = MMC_RSP_R2; + cmd.cmdarg = 0; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + memcpy(mmc->cid, cmd.response, 16); + + /* + * For MMC cards, set the Relative Address. + * For SD cards, get the Relatvie Address. + * This also puts the cards into Standby State + */ + cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; + cmd.cmdarg = mmc->rca << 16; + cmd.resp_type = MMC_RSP_R6; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if (IS_SD(mmc)) + mmc->rca = (cmd.response[0] >> 16) & 0xffff; + + /* Get the Card-Specific Data */ + cmd.cmdidx = MMC_CMD_SEND_CSD; + cmd.resp_type = MMC_RSP_R2; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + mmc->csd[0] = cmd.response[0]; + mmc->csd[1] = cmd.response[1]; + mmc->csd[2] = cmd.response[2]; + mmc->csd[3] = cmd.response[3]; + + if (mmc->version == MMC_VERSION_UNKNOWN) { + int version = (cmd.response[0] >> 26) & 0xf; + + switch (version) { + case 0: + mmc->version = MMC_VERSION_1_2; + break; + case 1: + mmc->version = MMC_VERSION_1_4; + break; + case 2: + mmc->version = MMC_VERSION_2_2; + break; + case 3: + mmc->version = MMC_VERSION_3; + break; + case 4: + mmc->version = MMC_VERSION_4; + break; + default: + mmc->version = MMC_VERSION_1_2; + break; + } + } + + /* divide frequency by 10, since the mults are 10x bigger */ + freq = fbase[(cmd.response[0] & 0x7)]; + mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; + + mmc->tran_speed = freq * mult; + + mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); + + if (IS_SD(mmc)) + mmc->write_bl_len = mmc->read_bl_len; + else + mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); + + /* This is not correct for MMC cards bigger than 2GB. + * C_SIZE=0xFFF and C_SIZE_MULT=0x7 for bigger than 2GB. + * READ_BL_LEN < 12 (2k sectors) to do the calculation. + * High capasity cards: Use EXT_CSD instead. + * Check for SD! + */ + if (mmc->high_capacity) { + csize = CSD_HC_SIZE(mmc->csd); + cmult = 8; + } else { + csize = CSD_C_SIZE(mmc->csd); + cmult = CSD_C_SIZE_MULT(mmc->csd); + } + + /* This is only correct for MMC cards up to 2GB. SD? */ + mmc->capacity = (csize + 1) << (cmult + 2); + mmc->capacity *= mmc->read_bl_len; + + if (mmc->read_bl_len > 512) + mmc->read_bl_len = 512; + + if (mmc->write_bl_len > 512) + mmc->write_bl_len = 512; + + /* Select the card, and put it into Transfer Mode */ + cmd.cmdidx = MMC_CMD_SELECT_CARD; + cmd.resp_type = MMC_RSP_R1b; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if (IS_SD(mmc)) { + err = sd_change_freq(mmc); + debug("sd_change_freq returns %d\n", err); + } else { + err = mmc_change_freq(mmc); + debug("mmc_change_freq returns %d\n", err); + } + + if (err) + return err; + + /* + * Restrict card capabilities by the host capabilities. + * FIXME: Host caps are ignored when setting high speed in + * mmc_change_freq and sd_change_freq. + */ + mmc->card_caps &= mmc->host_caps; + + if (IS_SD(mmc)) { + if (mmc->card_caps & MMC_MODE_4BIT) { + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 2; + cmd.flags = 0; + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + mmc_set_bus_width(mmc, 4); + } + + if (mmc->card_caps & MMC_MODE_HS) + mmc_set_clock(mmc, 50000000); + else + mmc_set_clock(mmc, 25000000); + } else { + if ((mmc->card_caps & MMC_MODE_DDR_8BIT) == MMC_MODE_DDR_8BIT) { + /* Set the card to use 8 bit*/ + printf("EXT_CSD_BUS_WIDTH_DDR_8\n"); + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_DDR_8); + if (err) + return err; + + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_POWER_CLASS, + 0xAA); + if (err) + return err; + printf("EXT_CSD_BUS_WIDTH_DDR_8\n"); + mmc->ddr_en = 1; + mmc_set_bus_width(mmc, 8); + } else if ((mmc->card_caps & MMC_MODE_DDR_4BIT) == + MMC_MODE_DDR_4BIT) { + /* Set the card to use 4 bit*/ + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_DDR_4); + if (err) + return err; + + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_POWER_CLASS, + 0xAA); + if (err) + return err; + printf("EXT_CSD_BUS_WIDTH_DDR_4\n"); + mmc->ddr_en = 1; + mmc_set_bus_width(mmc, 4); + } else if (mmc->card_caps & MMC_MODE_8BIT) { + /* Set the card to use 8 bit*/ + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_8); + + if (err) + return err; + + mmc_set_bus_width(mmc, 8); + } else if (mmc->card_caps & MMC_MODE_4BIT) { + /* Set the card to use 4 bit*/ + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_4); + + if (err) + return err; + + mmc_set_bus_width(mmc, 4); + } + + if (mmc->card_caps & MMC_MODE_HS) { + if (mmc->card_caps & MMC_MODE_HS_52MHz) + mmc_set_clock(mmc, 52000000); + else + mmc_set_clock(mmc, 26000000); + } else + mmc_set_clock(mmc, 20000000); + + if (mmc->card_caps & MMC_MODE_REL_WR) { + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_WR_REL_SET, + 0x1F); + + if (err) + return err; + } + } + + /* fill in device description */ + mmc->block_dev.lun = 0; + mmc->block_dev.type = 0; + mmc->block_dev.blksz = mmc->read_bl_len; + mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); + sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8, + (mmc->cid[2] << 8) | (mmc->cid[3] >> 24)); + sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff, + (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, + (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); + sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, + (mmc->cid[2] >> 24) & 0xf); + init_part(&mmc->block_dev); + + return 0; +} + +static int mmc_send_if_cond(struct mmc *mmc) +{ + struct mmc_cmd cmd; + int err; + + cmd.cmdidx = SD_CMD_SEND_IF_COND; + /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ + cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; + cmd.resp_type = MMC_RSP_R7; + cmd.flags = 0; + + err = mmc_send_cmd(mmc, &cmd, NULL); + + if (err) + return err; + + if ((cmd.response[0] & 0xff) != 0xaa) + return UNUSABLE_ERR; + else + mmc->version = SD_VERSION_2; + + return 0; +} + +int mmc_register(struct mmc *mmc) +{ + /* Setup the universal parts of the block interface just once */ + mmc->block_dev.if_type = IF_TYPE_MMC; + mmc->block_dev.dev = cur_dev_num++; + mmc->block_dev.removable = 1; + mmc->block_dev.block_read = mmc_bread; + mmc->block_dev.block_write = mmc_bwrite; + + INIT_LIST_HEAD (&mmc->link); + + list_add_tail (&mmc->link, &mmc_devices); + + return 0; +} + +block_dev_desc_t *mmc_get_dev(int dev) +{ + struct mmc *mmc = find_mmc_device(dev); + + return mmc ? &mmc->block_dev : NULL; +} + +int mmc_init(struct mmc *mmc) +{ + int err; + + err = mmc->init(mmc); + + if (err) + return err; + + mmc_set_bus_width(mmc, 1); + mmc_set_clock(mmc, 1); + + /* Reset the Card */ + err = mmc_go_idle(mmc); + + if (err) + return err; + + /* Test for SD version 2 */ + err = mmc_send_if_cond(mmc); + debug("mmc_send_if_cond returns %d\n", err); + + /* Now try to get the SD card's operating condition */ + err = sd_send_op_cond(mmc); + debug("sd_send_op_cond returns %d\n", err); + + /* If the command timed out, we check for an MMC card */ + if (err == TIMEOUT) { + err = mmc_send_op_cond(mmc); + debug("mmc_send_op_cond returns %d\n", err); + if (err) { + printf("Card did not respond to voltage select!\n"); + return UNUSABLE_ERR; + } + } + + err = mmc_startup(mmc); + + if (!err) { + err = mmc_set_blocklen(mmc, 512); + if (err) + printf("MMC set write bl len failed, err=%d\n", err); + } + + debug("mmc_startup returns %d\n", err); + return err; +} + +/* + * CPU and board-specific MMC initializations. Aliased function + * signals caller to move on + */ +static int __def_mmc_init(bd_t *bis) +{ + return -1; +} + +int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); +/* + * It seems attribute 'weak' does not work as intended. With gcc 4.4.1 and + * optimization O2 it always links in the weak function. Declare board_mmc_init + * as external. + */ +extern int board_mmc_init(bd_t *bis); + +void print_mmc_devices(char separator) +{ + struct mmc *m; + struct list_head *entry; + + list_for_each(entry, &mmc_devices) { + m = list_entry(entry, struct mmc, link); + + printf("%s: %d", m->name, m->block_dev.dev); + + if (entry->next != &mmc_devices) + printf("%c ", separator); + } + + printf("\n"); +} + +int mmc_initialize(bd_t *bis) +{ + INIT_LIST_HEAD (&mmc_devices); + cur_dev_num = 0; + + if (board_mmc_init(bis) < 0) + cpu_mmc_init(bis); + + print_mmc_devices(','); + + return 0; +} diff --git a/include/mmc_ste.h b/include/mmc_ste.h new file mode 100644 index 000000000..57338fe11 --- /dev/null +++ b/include/mmc_ste.h @@ -0,0 +1,306 @@ +/* + * Copyright 2008, Freescale Semiconductor, Inc + * Andy Fleming + * + * Based (loosely) on the Linux code + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _MMC_H_ +#define _MMC_H_ + +#include <linux/list.h> + +#define SD_VERSION_SD 0x20000 +#define SD_VERSION_2 (SD_VERSION_SD | 0x20) +#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) +#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) +#define MMC_VERSION_MMC 0x10000 +#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) +#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) +#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) +#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) +#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) +#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) + +#define MMC_MODE_HS 0x001 +#define MMC_MODE_HS_52MHz 0x010 +#define MMC_MODE_1BIT 0x000 +#define MMC_MODE_4BIT 0x100 +#define MMC_MODE_8BIT 0x200 +#define MMC_MODE_DDR 0x400 +#define MMC_MODE_DDR_4BIT (MMC_MODE_4BIT | MMC_MODE_DDR) +#define MMC_MODE_DDR_8BIT (MMC_MODE_8BIT | MMC_MODE_DDR) +#define MMC_MODE_REL_WR 0x800 + +#define SD_DATA_4BIT 0x00040000 + +#define IS_SD(x) (x->version & SD_VERSION_SD) + +#define MMC_DATA_READ 1 +#define MMC_DATA_WRITE 2 + +#define NO_CARD_ERR -16 /* No SD/MMC card inserted */ +#define UNUSABLE_ERR -17 /* Unusable Card */ +#define COMM_ERR -18 /* Communications Error */ +#define TIMEOUT -19 + +#define MMC_CMD_GO_IDLE_STATE 0 +#define MMC_CMD_SEND_OP_COND 1 +#define MMC_CMD_ALL_SEND_CID 2 +#define MMC_CMD_SET_RELATIVE_ADDR 3 +#define MMC_CMD_SET_DSR 4 +#define MMC_CMD_SWITCH 6 +#define MMC_CMD_SELECT_CARD 7 +#define MMC_CMD_SEND_EXT_CSD 8 +#define MMC_CMD_SEND_CSD 9 +#define MMC_CMD_SEND_CID 10 +#define MMC_CMD_STOP_TRANSMISSION 12 +#define MMC_CMD_SEND_STATUS 13 +#define MMC_CMD_SET_BLOCKLEN 16 +#define MMC_CMD_READ_SINGLE_BLOCK 17 +#define MMC_CMD_READ_MULTIPLE_BLOCK 18 +#define MMC_CMD_SET_BLOCK_COUNT 23 +#define MMC_CMD_WRITE_SINGLE_BLOCK 24 +#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 +#define MMC_CMD_APP_CMD 55 + +#define SD_CMD_SEND_RELATIVE_ADDR 3 +#define SD_CMD_SWITCH_FUNC 6 +#define SD_CMD_SEND_IF_COND 8 + +#define SD_CMD_APP_SET_BUS_WIDTH 6 +#define SD_CMD_APP_SEND_OP_COND 41 +#define SD_CMD_APP_SEND_SCR 51 + +/* SCR definitions in different words */ +#define SD_HIGHSPEED_BUSY 0x00020000 +#define SD_HIGHSPEED_SUPPORTED 0x00020000 + +#define MMC_HS_TIMING 0x00000100 +#define MMC_HS_52MHZ 0x2 + +#define OCR_BUSY 0x80000000 +#define OCR_HCS 0x40000000 + +#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ +#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ +#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ +#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ +#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ +#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ +#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ +#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ +#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ +#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ +#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ +#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ +#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ +#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ +#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ +#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ +#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ + +#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ +#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte + addressed by index which are + 1 in value field */ +#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte + addressed by index, which are + 1 in value field */ +#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ + +#define SD_SWITCH_CHECK 0 +#define SD_SWITCH_SWITCH 1 + +/* + * EXT_CSD fields + */ + +#define EXT_CSD_WR_REL_PARAM 166 /* R */ +#define EXT_CSD_WR_REL_SET 167 /* R/W */ +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_POWER_CLASS 187 /* R/W */ +#define EXT_CSD_REV 192 /* RO */ +#define EXT_CSD_CARD_TYPE 196 /* RO */ +#define EXT_CSD_OUT_OF_INT_TIME 198 /* RO */ +#define EXT_CSD_MIN_PERF_R_8_52 209 /* RO */ +#define EXT_CSD_MIN_PERF_W_8_52 210 /* RO */ +#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ +#define EXT_CSD_REL_WR_SEC_C 222 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */ + +/* + * EXT_CSD field definitions + */ + +#define EXT_CSD_CMD_SET_NORMAL (1<<0) +#define EXT_CSD_CMD_SET_SECURE (1<<1) +#define EXT_CSD_CMD_SET_CPSECURE (1<<2) + +#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ + +#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ +#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ +#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_BUS_WIDTH_DDR_4 5 /* Card is in 4 bit ddr mode */ +#define EXT_CSD_BUS_WIDTH_DDR_8 6 /* Card is in 8 bit ddr mode */ + +#define EXT_CSD_WR_REL_PARAM_HS_CTRL_REL (1 << 0) +#define EXT_CSD_WR_REL_PARAM_EN_REL_WR (1 << 2) + +#define R1_ILLEGAL_COMMAND (1 << 22) +#define R1_APP_CMD (1 << 5) + +#define MMC_RSP_PRESENT (1 << 0) +#define MMC_RSP_136 (1 << 1) /* 136 bit response */ +#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ +#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ + +#define MMC_RSP_NONE (0) +#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ + MMC_RSP_BUSY) +#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) +#define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) + + +struct mmc_cid { + unsigned long psn; + unsigned short oid; + unsigned char mid; + unsigned char prv; + unsigned char mdt; + char pnm[7]; +}; + +/* + * CSD_EXTRACT can be used as is for all CSD members except for c_size + * because c_size spans over a 32-bit boundary and must be expressed by a + * combination. + */ +#define CSD_EXTRACT(csd, bit, width) ((csd[3-(bit/32)] & \ + (((1 << width) - 1) << (bit - (bit/32) * 32))) >> (bit - (bit/32) * 32)) + +#define CSD_STRUCTURE(csd) CSD_EXTRACT(csd, 126, 2) +#define CSD_SPEC_VERS(csd) CSD_EXTRACT(csd, 122, 4) +#define CSD_TAAC(csd) CSD_EXTRACT(csd, 112, 8) +#define CSD_NSAC(csd) CSD_EXTRACT(csd, 104, 8) +#define CSD_TRAN_SPEED(csd) CSD_EXTRACT(csd, 96, 8) +#define CSD_CCC(csd) CSD_EXTRACT(csd, 4, 12) +#define CSD_READ_BL_LEN(csd) CSD_EXTRACT(csd, 80, 1) +#define CSD_READ_BL_PARTIAL(csd) CSD_EXTRACT(csd, 79, 1) +#define CSD_WRITE_BLK_MISALIGN(csd) CSD_EXTRACT(csd, 78, 1) +#define CSD_READ_BLK_MISALIGN(csd) CSD_EXTRACT(csd, 77, 1) +#define CSD_DSR_IMP(csd) CSD_EXTRACT(csd, 76, 1) +#define CSD_C_SIZE(csd) (CSD_EXTRACT(csd, 64, 10) << 2 | \ + CSD_EXTRACT(csd, 62, 2)) +#define CSD_HC_SIZE(csd) (CSD_EXTRACT(csd, 64, 8) << 16 | \ + CSD_EXTRACT(csd, 48, 16)) +#define CSD_VDD_R_CURR_MIN(csd) CSD_EXTRACT(csd, 59, 3) +#define CSD_VDD_R_CURR_MAX(csd) CSD_EXTRACT(csd, 56, 3) +#define CSD_VDD_W_CURR_MIN(csd) CSD_EXTRACT(csd, 53, 3) +#define CSD_VDD_W_CURR_MAX(csd) CSD_EXTRACT(csd, 50, 3) +#define CSD_C_SIZE_MULT(csd) CSD_EXTRACT(csd, 47, 3) +#define CSD_ERASE_GRP_SIZE(csd) CSD_EXTRACT(csd, 42, 5) +#define CSD_ERASE_GRP_MULT(csd) CSD_EXTRACT(csd, 37, 5) +#define CSD_WP_GRP_SIZE(csd) CSD_EXTRACT(csd, 32, 5) +#define CSD_WP_GRP_ENABLE(csd) CSD_EXTRACT(csd, 31, 1) +#define CSD_DEFAULT_ECC(csd) CSD_EXTRACT(csd, 29, 2) +#define CSD_R2W_FACTOR(csd) CSD_EXTRACT(csd, 26, 3) +#define CSD_WRITE_BL_LEN(csd) CSD_EXTRACT(csd, 22, 4) +#define CSD_WRITE_BL_PARTIAL(csd) CSD_EXTRACT(csd, 21, 1) +#define CSD_FILE_FORMAT_GRP(csd) CSD_EXTRACT(csd, 15, 1) +#define CSD_COPY(csd) CSD_EXTRACT(csd, 14, 1) +#define CSD_PERM_WRITE_PROTECT(csd) CSD_EXTRACT(csd, 13, 1) +#define CSD_TMP_WRITE_PROTECT(csd) CSD_EXTRACT(csd, 12, 1) +#define CSD_ECC(csd) CSD_EXTRACT(csd, 8, 2) +#define CSD_CRC(csd) CSD_EXTRACT(csd, 1, 2) +#define CSD_ONE(csd) CSD_EXTRACT(csd, 0, 1) + +struct mmc_cmd { + ushort cmdidx; + uint resp_type; + uint cmdarg; + uint response[4]; + uint flags; +}; + +struct mmc_data { + union { + char *dest; + const char *src; /* src buffers don't get written to */ + }; + uint flags; + uint blocks; + uint blocksize; +}; + +struct mmc { + struct list_head link; + char name[32]; + void *priv; + uint voltages; + uint version; + uint f_min; + uint f_max; + int high_capacity; + uint bus_width; + uint clock; + uint card_caps; + uint host_caps; + uint ocr; + uint scr[2]; + uint csd[4]; + uint cid[4]; + ushort rca; + uint tran_speed; + uint read_bl_len; + uint write_bl_len; + uint data_timeout; + uint wr_rel_param; + uint rel_wr_sec_c; + u8 ddr_en; + u64 capacity; + block_dev_desc_t block_dev; + int (*send_cmd)(struct mmc *mmc, + struct mmc_cmd *cmd, struct mmc_data *data); + void (*set_ios)(struct mmc *mmc); + int (*init)(struct mmc *mmc); +}; + +int mmc_register(struct mmc *mmc); +int mmc_initialize(bd_t *bis); +int mmc_init(struct mmc *mmc); +struct mmc *find_mmc_device(int dev_num); +void print_mmc_devices(char separator); + +#ifndef CONFIG_GENERIC_MMC +int mmc_legacy_init(int verbose); +#endif +#endif /* _MMC_H_ */ |