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Diffstat (limited to 'sim-saddlp-4s-trace-arm64.h')
-rw-r--r-- | sim-saddlp-4s-trace-arm64.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/sim-saddlp-4s-trace-arm64.h b/sim-saddlp-4s-trace-arm64.h new file mode 100644 index 0000000..35a487f --- /dev/null +++ b/sim-saddlp-4s-trace-arm64.h @@ -0,0 +1,65 @@ +// Copyright 2015, VIXL authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// * Neither the name of ARM Limited nor the names of its contributors may be +// used to endorse or promote products derived from this software without +// specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND +// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +// --------------------------------------------------------------------- +// This file is auto generated using tools/generate_simulator_traces.py. +// +// PLEASE DO NOT EDIT. +// --------------------------------------------------------------------- + +#ifndef VIXL_SIM_SADDLP_4S_TRACE_AARCH64_H_ +#define VIXL_SIM_SADDLP_4S_TRACE_AARCH64_H_ + +const uint32_t kExpected_NEON_saddlp_4S[] = { + 0xffffff03, 0xffffff73, 0xfffffffb, 0xffffffff, + 0xffffff05, 0xffffffed, 0xfffffffd, 0x00000001, + 0xffffff73, 0xfffffffb, 0xffffffff, 0x00000003, + 0xffffffed, 0xfffffffd, 0x00000001, 0x00000012, + 0xfffffffb, 0xffffffff, 0x00000003, 0x0000008d, + 0xfffffffd, 0x00000001, 0x00000012, 0x000000fb, + 0xffffffff, 0x00000003, 0x0000008d, 0x000000fd, + 0x00000001, 0x00000012, 0x000000fb, 0x000033b2, + 0x00000003, 0x0000008d, 0x000000fd, 0x00008888, + 0x00000012, 0x000000fb, 0x000033b2, 0x0000d552, + 0x0000008d, 0x000000fd, 0x00008888, 0x0000fffb, + 0x000000fb, 0x000033b2, 0x0000d552, 0x0000fffd, + 0x000000fd, 0x00008888, 0x0000fffb, 0xffffffff, + 0x000033b2, 0x0000d552, 0x0000fffd, 0xffff0001, + 0x00008888, 0x0000fffb, 0xffffffff, 0xffff2aab, + 0x0000d552, 0x0000fffd, 0xffff0001, 0xffff7776, + 0x0000fffb, 0xffffffff, 0xffff2aab, 0xffffcc4c, + 0x0000fffd, 0xffff0001, 0xffff7776, 0xffffff01, + 0xffffffff, 0xffff2aab, 0xffffcc4c, 0xffffff03, + 0xffff0001, 0xffff7776, 0xffffff01, 0xffffff05, + 0xffff2aab, 0xffffcc4c, 0xffffff03, 0xffffff73, + 0xffff7776, 0xffffff01, 0xffffff05, 0xffffffed, + 0xffffcc4c, 0xffffff03, 0xffffff73, 0xfffffffb, + 0xffffff01, 0xffffff05, 0xffffffed, 0xfffffffd, +}; +const unsigned kExpectedCount_NEON_saddlp_4S = 24; + +#endif // VIXL_SIM_SADDLP_4S_TRACE_AARCH64_H_ |