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Diffstat (limited to 'sim-frecpe-2s-trace-arm64.h')
-rw-r--r-- | sim-frecpe-2s-trace-arm64.h | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/sim-frecpe-2s-trace-arm64.h b/sim-frecpe-2s-trace-arm64.h new file mode 100644 index 0000000..6158d36 --- /dev/null +++ b/sim-frecpe-2s-trace-arm64.h @@ -0,0 +1,79 @@ +// Copyright 2015, VIXL authors +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// * Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// * Neither the name of ARM Limited nor the names of its contributors may be +// used to endorse or promote products derived from this software without +// specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND +// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +// --------------------------------------------------------------------- +// This file is auto generated using tools/generate_simulator_traces.py. +// +// PLEASE DO NOT EDIT. +// --------------------------------------------------------------------- + +#ifndef VIXL_SIM_FRECPE_2S_TRACE_AARCH64_H_ +#define VIXL_SIM_FRECPE_2S_TRACE_AARCH64_H_ + +const uint32_t kExpected_NEON_frecpe_2S[] = { + 0xff800000, 0xfe800000, + 0xfe800000, 0xff800000, + 0xff800000, 0x7f800000, + 0x7f800000, 0x7e7f8000, + 0x7e7f8000, 0x40000000, + 0x40000000, 0x3fff8000, + 0x3fff8000, 0x3fff8000, + 0x3fff8000, 0x3f800000, + 0x3f800000, 0x3f7f8000, + 0x3f7f8000, 0x3f7f8000, + 0x3f7f8000, 0x3f2a8000, + 0x3f2a8000, 0x3dcc8000, + 0x3dcc8000, 0x7fcfffff, + 0x7fcfffff, 0x00000000, + 0x00000000, 0x7fd23456, + 0x7fd23456, 0x7fc00000, + 0x7fc00000, 0x7fd23456, + 0x7fd23456, 0x7fc00001, + 0x7fc00001, 0x7f800000, + 0x7f800000, 0x7e800000, + 0x7e800000, 0x7f800000, + 0x7f800000, 0xff800000, + 0xff800000, 0xfe7f8000, + 0xfe7f8000, 0xc0000000, + 0xc0000000, 0xbfff8000, + 0xbfff8000, 0xbfff8000, + 0xbfff8000, 0xbf800000, + 0xbf800000, 0xbf7f8000, + 0xbf7f8000, 0xbf7f8000, + 0xbf7f8000, 0xbf2a8000, + 0xbf2a8000, 0xbdcc8000, + 0xbdcc8000, 0xffcfffff, + 0xffcfffff, 0x80000000, + 0x80000000, 0xffd23456, + 0xffd23456, 0xffc00000, + 0xffc00000, 0xffd23456, + 0xffd23456, 0xffc00001, + 0xffc00001, 0xff800000, +}; +const unsigned kExpectedCount_NEON_frecpe_2S = 38; + +#endif // VIXL_SIM_FRECPE_2S_TRACE_AARCH64_H_ |