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authorHess Chen <hesheng.chen@intel.com>2014-09-22 07:06:12 +0000
committerhchen30 <hchen30@6f19259b-4bc3-4df7-8a09-765794883524>2014-09-22 07:06:12 +0000
commit875cc5bb9710ca63c91d5b74b2653c6804a07923 (patch)
tree08f05233b8ef142ea74c1aed561b63e2da167e66
parentb15aae9f2e33b8a24d2c1abd86422763642bc9c6 (diff)
BaseTools/Upt: Fix several bugs
1. Fix a bug of generating additional EOL in file header. 2. Fix a bug of format error for Defines section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hess Chen <hesheng.chen@intel.com> Reviewed-by: Yingke Liu <yingke.d.liu@Intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16153 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r--BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py2
-rw-r--r--BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py13
2 files changed, 8 insertions, 7 deletions
diff --git a/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py b/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
index 80b32ae5e..f22363b3b 100644
--- a/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
+++ b/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
@@ -344,7 +344,7 @@ def PackageToDec(Package, DistHeader = None):
Content += GenHeaderCommentSection(PackageAbstract, \
PackageDescription, \
PackageCopyright, \
- PackageLicense)
+ PackageLicense).replace('\r\n', '\n')
#
# Generate Binary header
diff --git a/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py b/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
index 698089287..a131f98ea 100644
--- a/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
+++ b/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
@@ -110,7 +110,7 @@ def ModuleToInf(ModuleObject, PackageObject=None, DistHeader=None):
Content += GenHeaderCommentSection(ModuleAbstract,
ModuleDescription,
ModuleCopyright,
- ModuleLicense)
+ ModuleLicense).replace('\r\n', '\n')
#
# Generate Binary Header
@@ -261,13 +261,18 @@ def GenDefines(ModuleObject):
#
# generate [Defines] section
#
+ LeftOffset = 31
Content = ''
NewSectionDict = {}
+
for UserExtension in ModuleObject.GetUserExtensionList():
DefinesDict = UserExtension.GetDefinesDict()
if not DefinesDict:
continue
for Statement in DefinesDict:
+ if Statement.split(DT.TAB_EQUAL_SPLIT) > 1:
+ Statement = (u'%s ' % Statement.split(DT.TAB_EQUAL_SPLIT, 1)[0]).ljust(LeftOffset) \
+ + u'= %s' % Statement.split(DT.TAB_EQUAL_SPLIT, 1)[1].lstrip()
SortedArch = DT.TAB_ARCH_COMMON
if Statement.strip().startswith(DT.TAB_INF_DEFINES_CUSTOM_MAKEFILE):
pos = Statement.find(DT.TAB_VALUE_SPLIT)
@@ -280,11 +285,7 @@ def GenDefines(ModuleObject):
else:
NewSectionDict[SortedArch] = [Statement]
SpecialStatementList = []
- #
- # Add INF_VERSION statement firstly
- #
-
- LeftOffset = 31
+
# TAB_INF_DEFINES_INF_VERSION
Statement = (u'%s ' % DT.TAB_INF_DEFINES_INF_VERSION).ljust(LeftOffset) + u'= %s' % '0x00010017'
SpecialStatementList.append(Statement)