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authorDan Handley <dan.handley@arm.com>2014-04-09 12:48:25 +0100
committerDan Handley <dan.handley@arm.com>2014-05-06 12:35:02 +0100
commit4ecca33988b90de43ec4f4a929094a38a23fda31 (patch)
treead1fa01314b562bfbdac77a39451ef7967c0ff03 /lib
parentb495bdef190acf166c713e138b61c5bb25402fc0 (diff)
Move include and source files to logical locations
Move almost all system include files to a logical sub-directory under ./include. The only remaining system include directories not under ./include are specific to the platform. Move the corresponding source files to match the include directory structure. Also remove pm.h as it is no longer used. Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
Diffstat (limited to 'lib')
-rw-r--r--lib/aarch64/cache_helpers.S (renamed from lib/arch/aarch64/cache_helpers.S)0
-rw-r--r--lib/aarch64/cpu_helpers.S56
-rw-r--r--lib/aarch64/misc_helpers.S (renamed from lib/arch/aarch64/misc_helpers.S)0
-rw-r--r--lib/aarch64/sysreg_helpers.S (renamed from lib/arch/aarch64/sysreg_helpers.S)0
-rw-r--r--lib/aarch64/tlb_helpers.S (renamed from lib/arch/aarch64/tlb_helpers.S)0
-rw-r--r--lib/aarch64/xlat_helpers.c (renamed from lib/arch/aarch64/xlat_helpers.c)0
-rw-r--r--lib/aarch64/xlat_tables.c (renamed from lib/arch/aarch64/xlat_tables.c)0
-rw-r--r--lib/locks/bakery/bakery_lock.c (renamed from lib/sync/locks/bakery/bakery_lock.c)6
-rw-r--r--lib/locks/exclusive/spinlock.S (renamed from lib/sync/locks/exclusive/spinlock.S)0
9 files changed, 59 insertions, 3 deletions
diff --git a/lib/arch/aarch64/cache_helpers.S b/lib/aarch64/cache_helpers.S
index 2696d90..2696d90 100644
--- a/lib/arch/aarch64/cache_helpers.S
+++ b/lib/aarch64/cache_helpers.S
diff --git a/lib/aarch64/cpu_helpers.S b/lib/aarch64/cpu_helpers.S
new file mode 100644
index 0000000..573d0b8
--- /dev/null
+++ b/lib/aarch64/cpu_helpers.S
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+
+ .weak cpu_reset_handler
+
+
+func cpu_reset_handler
+ mov x19, x30 // lr
+
+ /* ---------------------------------------------
+ * As a bare minimal enable the SMP bit.
+ * ---------------------------------------------
+ */
+ bl read_midr
+ lsr x0, x0, #MIDR_PN_SHIFT
+ and x0, x0, #MIDR_PN_MASK
+ cmp x0, #MIDR_PN_A57
+ b.eq smp_setup_begin
+ cmp x0, #MIDR_PN_A53
+ b.ne smp_setup_end
+smp_setup_begin:
+ bl read_cpuectlr
+ orr x0, x0, #CPUECTLR_SMP_BIT
+ bl write_cpuectlr
+smp_setup_end:
+ ret x19
diff --git a/lib/arch/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S
index e3b4ab5..e3b4ab5 100644
--- a/lib/arch/aarch64/misc_helpers.S
+++ b/lib/aarch64/misc_helpers.S
diff --git a/lib/arch/aarch64/sysreg_helpers.S b/lib/aarch64/sysreg_helpers.S
index 8e816f0..8e816f0 100644
--- a/lib/arch/aarch64/sysreg_helpers.S
+++ b/lib/aarch64/sysreg_helpers.S
diff --git a/lib/arch/aarch64/tlb_helpers.S b/lib/aarch64/tlb_helpers.S
index 4244974..4244974 100644
--- a/lib/arch/aarch64/tlb_helpers.S
+++ b/lib/aarch64/tlb_helpers.S
diff --git a/lib/arch/aarch64/xlat_helpers.c b/lib/aarch64/xlat_helpers.c
index 87d24ec..87d24ec 100644
--- a/lib/arch/aarch64/xlat_helpers.c
+++ b/lib/aarch64/xlat_helpers.c
diff --git a/lib/arch/aarch64/xlat_tables.c b/lib/aarch64/xlat_tables.c
index 33a8b6d..33a8b6d 100644
--- a/lib/arch/aarch64/xlat_tables.c
+++ b/lib/aarch64/xlat_tables.c
diff --git a/lib/sync/locks/bakery/bakery_lock.c b/lib/locks/bakery/bakery_lock.c
index ec08135..03f1e74 100644
--- a/lib/sync/locks/bakery/bakery_lock.c
+++ b/lib/locks/bakery/bakery_lock.c
@@ -59,14 +59,14 @@
#define assert_bakery_entry_valid(entry, bakery) do { \
assert(bakery); \
assert(entry < BAKERY_LOCK_MAX_CPUS); \
-} while(0)
+} while (0)
/* Convert a ticket to priority */
#define PRIORITY(t, pos) (((t) << 8) | (pos))
/* Initialize Bakery Lock to reset ownership and all ticket values */
-void bakery_lock_init(bakery_lock * bakery)
+void bakery_lock_init(bakery_lock *bakery)
{
assert(bakery);
@@ -176,7 +176,7 @@ void bakery_lock_get(unsigned long mpidr, bakery_lock *bakery)
/* Release the lock and signal contenders */
-void bakery_lock_release(unsigned long mpidr, bakery_lock * bakery)
+void bakery_lock_release(unsigned long mpidr, bakery_lock *bakery)
{
unsigned int me = platform_get_core_pos(mpidr);
diff --git a/lib/sync/locks/exclusive/spinlock.S b/lib/locks/exclusive/spinlock.S
index 5eae2b0..5eae2b0 100644
--- a/lib/sync/locks/exclusive/spinlock.S
+++ b/lib/locks/exclusive/spinlock.S