diff options
Diffstat (limited to 'daemon/events-Krait-architected.xml')
| -rw-r--r-- | daemon/events-Krait-architected.xml | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/daemon/events-Krait-architected.xml b/daemon/events-Krait-architected.xml index 64f3992..6f2982e 100644 --- a/daemon/events-Krait-architected.xml +++ b/daemon/events-Krait-architected.xml @@ -5,23 +5,23 @@ <counter name="Krait_cnt3"/> </counter_set> <category name="Krait" counter_set="Krait_cntX" per_cpu="yes"> - <event counter="Krait_ccnt" title="Clock" name="Cycles" alias="ClockCycles" display="hertz" units="Hz" average_selection="yes" description="The number of core clock cycles"/> + <event counter="Krait_ccnt" title="Clock" name="Cycles" display="hertz" units="Hz" average_selection="yes" description="The number of core clock cycles"/> <event event="0x00" title="Software" name="Increment" description="Incremented only on writes to the Software Increment Register"/> <event event="0x01" title="Cache" name="Instruction refill" description="Instruction fetch that causes a refill of at least the level of instruction or unified cache closest to the processor"/> <event event="0x02" title="Cache" name="Inst TLB refill" description="Instruction fetch that causes a TLB refill of at least the level of TLB closest to the processor"/> <event event="0x03" title="Cache" name="Data refill" description="Memory Read or Write operation that causes a refill of at least the level of data or unified cache closest to the processor"/> <event event="0x04" title="Cache" name="Data access" description="Memory Read or Write operation that causes a cache access to at least the level of data or unified cache closest to the processor"/> <event event="0x05" title="Cache" name="Data TLB refill" description="Memory Read or Write operation that causes a TLB refill of at least the level of TLB closest to the processor"/> - <event event="0x06" title="Instruction" name="Memory read" alias="MemoryRead" description="Memory-reading instruction architecturally executed"/> - <event event="0x07" title="Instruction" name="Memory write" alias="MemoryWrite" description="Memory-writing instruction architecturally executed"/> - <event event="0x08" title="Instruction" name="Executed" alias="InstructionsExecuted" description="Instruction architecturally executed"/> + <event event="0x06" title="Instruction" name="Memory read" description="Memory-reading instruction architecturally executed"/> + <event event="0x07" title="Instruction" name="Memory write" description="Memory-writing instruction architecturally executed"/> + <event event="0x08" title="Instruction" name="Executed" description="Instruction architecturally executed"/> <event event="0x09" title="Exception" name="Taken" description="Exceptions taken"/> <event event="0x0a" title="Exception" name="Return" description="Exception return architecturally executed"/> <event event="0x0b" title="Instruction" name="CONTEXTIDR" description="Instruction that writes to the CONTEXTIDR architecturally executed"/> <event event="0x0c" title="Program Counter" name="SW change" description="Software change of PC, except by an exception, architecturally executed"/> <event event="0x0d" title="Branch" name="Immediate" description="Immediate branch architecturally executed"/> <event event="0x0e" title="Branch" name="Procedure Return" description="Procedure return architecturally executed (not by exceptions)"/> - <event event="0x0f" title="Memory" name="Unaligned access" alias="UnalignedAccess" description="Unaligned access architecturally executed"/> - <event event="0x10" title="Branch" name="Mispredicted" alias="BranchMispredicted" description="Branch mispredicted or not predicted"/> - <event event="0x12" title="Branch" name="Potential prediction" alias="PotentialPrediction" description="Branch or other change in program flow that could have been predicted by the branch prediction resources of the processor"/> + <event event="0x0f" title="Memory" name="Unaligned access" description="Unaligned access architecturally executed"/> + <event event="0x10" title="Branch" name="Mispredicted" description="Branch mispredicted or not predicted"/> + <event event="0x12" title="Branch" name="Potential prediction" description="Branch or other change in program flow that could have been predicted by the branch prediction resources of the processor"/> </category> |