diff options
author | Drew Richardson <drew.richardson@arm.com> | 2012-05-15 12:00:00 -0700 |
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committer | Drew Richardson <drew.richardson@arm.com> | 2014-12-19 15:27:22 -0800 |
commit | 3abe11d177c6c93fab66d04fd42d11452a0c508e (patch) | |
tree | 9ddc541993bd0859f27bf7468e44b5155e5a0494 /daemon/events-L2C-310.xml | |
parent | 3de04f9cecf0d50e895f9fe0164ecbbbae997319 (diff) |
gator: Version 5.105.10
Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Diffstat (limited to 'daemon/events-L2C-310.xml')
-rw-r--r-- | daemon/events-L2C-310.xml | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/daemon/events-L2C-310.xml b/daemon/events-L2C-310.xml index 100f109..766fa9c 100644 --- a/daemon/events-L2C-310.xml +++ b/daemon/events-L2C-310.xml @@ -3,19 +3,19 @@ <counter name="L2C-310_cnt1"/> </counter_set> <category name="L2C-310" counter_set="L2C-310_cntX" per_cpu="no"> - <event event="0x1" title="L2Cache" name="CO" description="Eviction, CastOut, of a line from the L2 cache"/> - <event event="0x2" title="L2Cache" name="DRH" description="Data read hit"/> - <event event="0x3" title="L2Cache" name="DRREQ" description="Data read request"/> - <event event="0x4" title="L2Cache" name="DWHIT" description="Data write hit"/> - <event event="0x5" title="L2Cache" name="DWREQ" description="Data write request"/> - <event event="0x6" title="L2Cache" name="DWTREQ" description="Data write request with write-through attribute"/> - <event event="0x7" title="L2Cache" name="IRHIT" description="Instruction read hit"/> - <event event="0x8" title="L2Cache" name="IRREQ" description="Instruction read request"/> - <event event="0x9" title="L2Cache" name="WA" description="Write allocate"/> - <event event="0xa" title="L2Cache" name="IPFALLOC" description="Allocation of a prefetch generated by L2C-310 into the L2 cache"/> - <event event="0xb" title="L2Cache" name="EPFHIT" description="Prefetch hint hits in the L2 cache"/> - <event event="0xc" title="L2Cache" name="EPFALLOC" description="Prefetch hint allocated into the L2 cache"/> - <event event="0xd" title="L2Cache" name="SRRCVD" description="Speculative read received"/> - <event event="0xe" title="L2Cache" name="SRCONF" description="Speculative read confirmed"/> - <event event="0xf" title="L2Cache" name="EPFRCVD" description="Prefetch hint received"/> + <event event="0x1" title="L2 Cache" name="CO" description="Eviction, CastOut, of a line from the L2 cache"/> + <event event="0x2" title="L2 Cache" name="DRH" description="Data read hit"/> + <event event="0x3" title="L2 Cache" name="DRREQ" description="Data read request"/> + <event event="0x4" title="L2 Cache" name="DWHIT" description="Data write hit"/> + <event event="0x5" title="L2 Cache" name="DWREQ" description="Data write request"/> + <event event="0x6" title="L2 Cache" name="DWTREQ" description="Data write request with write-through attribute"/> + <event event="0x7" title="L2 Cache" name="IRHIT" description="Instruction read hit"/> + <event event="0x8" title="L2 Cache" name="IRREQ" description="Instruction read request"/> + <event event="0x9" title="L2 Cache" name="WA" description="Write allocate"/> + <event event="0xa" title="L2 Cache" name="IPFALLOC" description="Allocation of a prefetch generated by L2C-310 into the L2 cache"/> + <event event="0xb" title="L2 Cache" name="EPFHIT" description="Prefetch hint hits in the L2 cache"/> + <event event="0xc" title="L2 Cache" name="EPFALLOC" description="Prefetch hint allocated into the L2 cache"/> + <event event="0xd" title="L2 Cache" name="SRRCVD" description="Speculative read received"/> + <event event="0xe" title="L2 Cache" name="SRCONF" description="Speculative read confirmed"/> + <event event="0xf" title="L2 Cache" name="EPFRCVD" description="Prefetch hint received"/> </category> |