diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2014-08-14 13:36:41 +0100 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2014-08-20 19:14:31 +0100 |
| commit | d3f70af6e09d669da9c7d7890b7af5a0cdc4b3a5 (patch) | |
| tree | 30c78c0c34a461ddc00ec1d1828ea5c53abbeb8d /bl31 | |
| parent | add403514d0f792b9df3c81006cd9a9395b213f6 (diff) | |
Add CPU specific crash reporting handlers
This patch adds handlers for dumping Cortex-A57 and Cortex-A53 specific register
state to the CPU specific operations framework. The contents of CPUECTLR_EL1 are
dumped currently.
Change-Id: I63d3dbfc4ac52fef5e25a8cf6b937c6f0975c8ab
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/aarch64/crash_reporting.S | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/bl31/aarch64/crash_reporting.S b/bl31/aarch64/crash_reporting.S index e69878b..68fe256 100644 --- a/bl31/aarch64/crash_reporting.S +++ b/bl31/aarch64/crash_reporting.S @@ -52,9 +52,6 @@ print_spacer: .asciz " =\t\t0x" -cpu_ectlr_reg: - .asciz "cpuectlr_el1 =\t\t0x" - gp_regs: .asciz "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",\ "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",\ @@ -337,21 +334,9 @@ func do_crash_reporting mrs x10, sp_el0 bl str_in_crash_buf_print - /* Print the CPUECTLR_EL1 reg */ - mrs x0, midr_el1 - lsr x0, x0, #MIDR_PN_SHIFT - and x0, x0, #MIDR_PN_MASK - cmp x0, #MIDR_PN_A57 - b.eq 1f - cmp x0, #MIDR_PN_A53 - b.ne 2f -1: - adr x4, cpu_ectlr_reg - bl asm_print_str - mrs x4, CPUECTLR_EL1 - bl asm_print_hex - bl print_newline -2: + /* Get the cpu specific registers to report */ + bl do_cpu_reg_dump + bl str_in_crash_buf_print /* Print the gic registers */ plat_print_gic_regs |