diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2016-01-14 16:59:25 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-14 17:52:32 +0000 |
| commit | df906595b5b59c549e32b92fa64c0466b436ac90 (patch) | |
| tree | b3487a30200b8f4142e10532548282867fad78e5 | |
| parent | 1936149658127ee60870c0c494f430ca549a174c (diff) | |
Don't try to test SCR.SMD functionality on AArch64
Trying to test that SCR.SMD turns SMC instructions into UNDEFs
on AArch64 is tricky because we rely on SMC continuing to work
to allow us to restore the old value of the SCR to continue
testing. Disable this test for now.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | tztest/el1/tztest_el1.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/tztest/el1/tztest_el1.c b/tztest/el1/tztest_el1.c index 42e096a..13372fa 100644 --- a/tztest/el1/tztest_el1.c +++ b/tztest/el1/tztest_el1.c @@ -11,19 +11,21 @@ uint32_t el1_check_smc(uint32_t __attribute__((unused))arg) { - uintptr_t scr; TEST_HEAD("smc behavior"); - SMC_GET_REG(SCR, 3, scr); - SMC_SET_REG(SCR, 3, scr | SCR_SMD); #ifdef AARCH64 /* On AArch64, SMC calls below EL3 should result in an undefined exception * if the SCR.SMD bit is set. This is regardless of whether EL2 is present * or not. + * However if we try to test this by setting the SMD bit then we get into + * a state we can't get out of, because SMC_SET_REG() relies on + * SMC working to work at all... So don't try it. */ - TEST_MSG("SMC call without virt (SCR.SMD = 1)"); - TEST_EL3_EXCEPTION(__smc(SMC_OP_NOOP, NULL), EC_UNKNOWN); #else + uintptr_t scr; + + SMC_GET_REG(SCR, 3, scr); + SMC_SET_REG(SCR, 3, scr | SCR_SMD); /* On AArch32, SMC calls are undefined when SCR.SCD is set only when the * virtualization extensions are present. */ @@ -35,10 +37,9 @@ uint32_t el1_check_smc(uint32_t __attribute__((unused))arg) TEST_MSG("SMC call without virt (SCR.SCD = 1)"); TEST_NO_EXCEPTION(__smc(SMC_OP_NOOP, NULL)); -#endif - - /* Restor SCR */ + /* Restore SCR */ SMC_SET_REG(SCR, 3, scr); +#endif return 0; } |