diff options
author | Fabian Aggeler <aggelerf@ethz.ch> | 2014-06-11 01:54:59 +0200 |
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committer | Greg Bellows <greg.bellows@linaro.org> | 2014-11-17 09:50:07 -0600 |
commit | 56c538e8298023df384d23b1d084629133b0470d (patch) | |
tree | 1a31a4276f3b7d42230a908a3e9aff1876f7bc5b /target-arm/op_helper.c | |
parent | 5afcc8a07227f4eb039630897297783ae9cd2ac9 (diff) |
target-arm: add MVBAR support
Use MVBAR register as exception vector base address for
exceptions taken to CPU monitor mode.
Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
v8 -> v9
- Fixed declaration order of the MVBARR register components
v7 -> v8
- Changed the mvbar cp15 storage from uint64_t to uint32_t
Diffstat (limited to 'target-arm/op_helper.c')
0 files changed, 0 insertions, 0 deletions