diff options
author | Greg Bellows <greg.bellows@linaro.org> | 2014-12-01 15:10:38 -0600 |
---|---|---|
committer | Greg Bellows <greg.bellows@linaro.org> | 2014-12-03 10:34:10 -0600 |
commit | 2326819e6104fb3222ec185b91a82886cc77e297 (patch) | |
tree | 300f2b157f3db20b91a1081b2276fd00bfdb4827 | |
parent | aabcc7238c8814233b4dde132ca54e1d3e195d95 (diff) |
target-arm: Add ARMCPU secure property
Added a "secure" state property to the ARMCPU descriptor. This property
indicates whether the ARMCPU is enabled for secure state or not. By default it
is disabled at this time.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
-rw-r--r-- | target-arm/cpu-qom.h | 2 | ||||
-rw-r--r-- | target-arm/cpu.c | 21 |
2 files changed, 23 insertions, 0 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index dcfda7dfc..8dab91bea 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -100,6 +100,8 @@ typedef struct ARMCPU { bool start_powered_off; /* CPU currently in PSCI powered-off state */ bool powered_off; + /* CPU secure state enabled */ + bool secure; /* PSCI conduit used to invoke PSCI methods * 0 - disabled, 1 - smc, 2 - hvc diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 187186546..70f12b22c 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -383,6 +383,9 @@ static Property arm_cpu_reset_hivecs_property = static Property arm_cpu_rvbar_property = DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0); +static Property arm_cpu_secure_property = + DEFINE_PROP_BOOL("secure", ARMCPU, secure, false); + static void arm_cpu_post_init(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -402,6 +405,14 @@ static void arm_cpu_post_init(Object *obj) qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property, &error_abort); } + + if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { + /* Add the secure state CPU property only if EL3 is allowed. This will + * prevent "secure" from existing on non EL3 enabled machines. + */ + qdev_property_add_static(DEVICE(obj), &arm_cpu_secure_property, + &error_abort); + } } static void arm_cpu_finalizefn(Object *obj) @@ -471,6 +482,16 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) cpu->reset_sctlr |= (1 << 13); } + if (!cpu->secure) { + /* If secure state has not been enabled then we disable the feature */ + unset_feature(env, ARM_FEATURE_EL3); + + /* Disable the security extension feature bits in the processor feature + * register as well. This is id_pfr1[7:4]. + */ + cpu->id_pfr1 &= ~0xf0; + } + register_cp_regs_for_features(cpu); arm_cpu_register_gdb_regs_for_features(cpu); |