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authorPeter Maydell <peter.maydell@linaro.org>2014-12-11 12:07:53 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-12-11 12:07:53 +0000
commita7130a3ef9b8dc3091a0700abb61e2926e89e916 (patch)
tree5bcc33064b6fe7f4b72ad6a7e00fa217b42d7758
parent38df27c8a7ef9877583a46e74d99181c3224e078 (diff)
downloadqemu-tz-a7130a3ef9b8dc3091a0700abb61e2926e89e916.tar.gz
target-arm: Support save/load for 64 bit CPUs
For migration to work on 64 bit CPUs, we need to include both the 64-bit integer register file and the PSTATE. Everything else is either stored in the same place as existing 32-bit CPU state or handled by the generic sysreg mechanism. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1417788683-4038-3-git-send-email-peter.maydell@linaro.org
-rw-r--r--target-arm/machine.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 6437690af..c29e7a2ac 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -127,6 +127,13 @@ static int get_cpsr(QEMUFile *f, void *opaque, size_t size)
CPUARMState *env = &cpu->env;
uint32_t val = qemu_get_be32(f);
+ env->aarch64 = ((val & PSTATE_nRW) == 0);
+
+ if (is_a64(env)) {
+ pstate_write(env, val);
+ return 0;
+ }
+
/* Avoid mode switch when restoring CPSR */
env->uncached_cpsr = val & CPSR_M;
cpsr_write(env, val, 0xffffffff);
@@ -137,8 +144,15 @@ static void put_cpsr(QEMUFile *f, void *opaque, size_t size)
{
ARMCPU *cpu = opaque;
CPUARMState *env = &cpu->env;
+ uint32_t val;
+
+ if (is_a64(env)) {
+ val = pstate_read(env);
+ } else {
+ val = cpsr_read(env);
+ }
- qemu_put_be32(f, cpsr_read(env));
+ qemu_put_be32(f, val);
}
static const VMStateInfo vmstate_cpsr = {
@@ -222,12 +236,14 @@ static int cpu_post_load(void *opaque, int version_id)
const VMStateDescription vmstate_arm_cpu = {
.name = "cpu",
- .version_id = 21,
- .minimum_version_id = 21,
+ .version_id = 22,
+ .minimum_version_id = 22,
.pre_save = cpu_pre_save,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16),
+ VMSTATE_UINT64_ARRAY(env.xregs, ARMCPU, 32),
+ VMSTATE_UINT64(env.pc, ARMCPU),
{
.name = "cpsr",
.version_id = 0,