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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2017-06-01 09:35:51 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2017-06-06 17:14:39 +0000
commit4ccbfd0ccf2f9d74fd057e3ae3c443aad9c97d63 (patch)
treefee66b61ef315ab8a318ec992f6e23081ef5293f /4ccbfd0ccf2f9d74fd057e3ae3c443aad9c97d63
parent0eb3cf903023d83a4fd6444822c5075288f388d0 (diff)
downloadOpenPlatformPkg-master.tar.gz
Platforms/AMD/Styx: align UEFI PCI bus range with DT/ACPI descriptionsHEADmaster
The DT and ACPI descriptions of the PCIe root complex only specify a bus range of [0x0, 0x7f]. So let's use the same range in UEFI. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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