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diff --git a/sim/testsuite/sim/arm/iwmmxt/tbcst.cgs b/sim/testsuite/sim/arm/iwmmxt/tbcst.cgs
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+# Intel(r) Wireless MMX(tm) technology testcase for TBCST
+# mach: xscale
+# as: -mcpu=xscale+iwmmxt
+
+ .include "testutils.inc"
+
+ start
+
+ .global tbcst
+tbcst:
+ # Enable access to CoProcessors 0 & 1 before
+ # we attempt these instructions.
+
+ mvi_h_gr r1, 3
+ mcr p15, 0, r1, cr15, cr1, 0
+
+ # Test Byte Wide Broadcast
+
+ mvi_h_gr r0, 0x12345678
+ mvi_h_gr r1, 0x9abcdef0
+ mvi_h_gr r2, 0x111111ff
+
+ tmcrr wr0, r0, r1
+
+ tbcstb wr0, r2
+
+ tmrrc r0, r1, wr0
+
+ test_h_gr r0, 0xffffffff
+ test_h_gr r1, 0xffffffff
+ test_h_gr r2, 0x111111ff
+
+ # Test Half Word Wide Broadcast
+
+ mvi_h_gr r0, 0x12345678
+ mvi_h_gr r1, 0x9abcdef0
+ mvi_h_gr r2, 0x111111ff
+
+ tmcrr wr0, r0, r1
+
+ tbcsth wr0, r2
+
+ tmrrc r0, r1, wr0
+
+ test_h_gr r0, 0x11ff11ff
+ test_h_gr r1, 0x11ff11ff
+ test_h_gr r2, 0x111111ff
+
+ # Test Word Wide Broadcast
+
+ mvi_h_gr r0, 0x12345678
+ mvi_h_gr r1, 0x9abcdef0
+ mvi_h_gr r2, 0x111111ff
+
+ tmcrr wr0, r0, r1
+
+ tbcstw wr0, r2
+
+ tmrrc r0, r1, wr0
+
+ test_h_gr r0, 0x111111ff
+ test_h_gr r1, 0x111111ff
+ test_h_gr r2, 0x111111ff
+
+ pass