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| author | Yogesh Tillu <yogesh.tillu@linaro.org> | 2015-10-20 16:39:38 +0530 |
|---|---|---|
| committer | Yogesh Tillu <yogesh.tillu@linaro.org> | 2015-10-23 09:02:35 +0530 |
| commit | 95810d8579d3f395d403242f5ff8541033eb4ae5 (patch) | |
| tree | 0ce1ca348ddee7a7d2a5db03dbca3ab23ce39da2 | |
| parent | a81d6ffada1592083c5b6d8baa66cbbbd917bdb4 (diff) | |
This implements support for x86 architecture for accessing
perf hw counter using mmap way.
Change-Id: I6ecaa563978e1a2f573b8d23d757762775443806
Signed-off-by: Yogesh Tillu <yogesh.tillu@linaro.org>
| -rw-r--r-- | perf_rc_mmap.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/perf_rc_mmap.c b/perf_rc_mmap.c index b87c627..b61fa99 100644 --- a/perf_rc_mmap.c +++ b/perf_rc_mmap.c @@ -25,8 +25,15 @@ #include <signal.h> #include <fcntl.h> +#if defined(__i386__) || defined(__x86_64__) +#define barrier() __asm__ volatile("" ::: "memory") +#elif defined(__aarch64__) #define barrier() asm volatile("dmb ish" : : : "memory") #define isb() asm volatile("isb" : : : "memory") +#else +#define barrier() +#endif + #define ARMV8_PMCNTENSET_EL0_ENABLE (1<<31) /**< Enable Perf count reg */ static int fddev = -1; static unsigned long page_size; @@ -79,6 +86,12 @@ static int counter_init(unsigned int counter,long unsigned int sample) static unsigned long rdpmc(unsigned int counter) { unsigned long int ret; +#if defined(__i386__) || defined(__x86_64__) + unsigned int low, high; + + __asm__ volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (counter)); + ret = (unsigned long)low | ((unsigned long)high) << 32; +#elif defined(__aarch64__) if (counter == PERF_COUNT_HW_CPU_CYCLES) asm volatile("mrs %0, pmccntr_el0" : "=r" (ret)); else { @@ -87,6 +100,9 @@ static unsigned long rdpmc(unsigned int counter) } isb(); +#else + #error "Perf_rc_mmap: rdpmc Unsupported" +#endif return ret; } |