bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
Blue Swirl | efbf29b | 2011-09-21 20:00:18 +0000 | [diff] [blame] | 4 | * Generate inline load/store functions for one MMU mode and data |
| 5 | * size. |
| 6 | * |
| 7 | * Generate a store function as well as signed and unsigned loads. For |
| 8 | * 32 and 64 bit cases, also generate floating point functions with |
| 9 | * the same size. |
| 10 | * |
| 11 | * Not used directly but included from softmmu_exec.h and exec-all.h. |
| 12 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 13 | * Copyright (c) 2003 Fabrice Bellard |
| 14 | * |
| 15 | * This library is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU Lesser General Public |
| 17 | * License as published by the Free Software Foundation; either |
| 18 | * version 2 of the License, or (at your option) any later version. |
| 19 | * |
| 20 | * This library is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 23 | * Lesser General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 26 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 27 | */ |
| 28 | #if DATA_SIZE == 8 |
| 29 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 30 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 31 | #define DATA_TYPE uint64_t |
| 32 | #elif DATA_SIZE == 4 |
| 33 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 34 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 35 | #define DATA_TYPE uint32_t |
| 36 | #elif DATA_SIZE == 2 |
| 37 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 38 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 39 | #define DATA_TYPE uint16_t |
| 40 | #define DATA_STYPE int16_t |
| 41 | #elif DATA_SIZE == 1 |
| 42 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 43 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 44 | #define DATA_TYPE uint8_t |
| 45 | #define DATA_STYPE int8_t |
| 46 | #else |
| 47 | #error unsupported data size |
| 48 | #endif |
| 49 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 50 | #if ACCESS_TYPE < (NB_MMU_MODES) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 51 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 52 | #define CPU_MMU_INDEX ACCESS_TYPE |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 53 | #define MMUSUFFIX _mmu |
| 54 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 55 | #elif ACCESS_TYPE == (NB_MMU_MODES) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 56 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 57 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 58 | #define MMUSUFFIX _mmu |
| 59 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 60 | #elif ACCESS_TYPE == (NB_MMU_MODES + 1) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 61 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 62 | #define CPU_MMU_INDEX (cpu_mmu_index(env)) |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 63 | #define MMUSUFFIX _cmmu |
| 64 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 65 | #else |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 66 | #error invalid ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 67 | #endif |
| 68 | |
| 69 | #if DATA_SIZE == 8 |
| 70 | #define RES_TYPE uint64_t |
| 71 | #else |
Igor V. Kovalenko | c086b78 | 2010-06-02 00:12:32 +0400 | [diff] [blame] | 72 | #define RES_TYPE uint32_t |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 73 | #endif |
| 74 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 75 | #if ACCESS_TYPE == (NB_MMU_MODES + 1) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 76 | #define ADDR_READ addr_code |
| 77 | #else |
| 78 | #define ADDR_READ addr_read |
| 79 | #endif |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 80 | |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 81 | /* generic load/store macros */ |
| 82 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 83 | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 84 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 85 | int page_index; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 86 | RES_TYPE res; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 87 | target_ulong addr; |
| 88 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 89 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 90 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 91 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 92 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 93 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 94 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
| 95 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 96 | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 97 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 98 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 99 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 100 | } |
| 101 | return res; |
| 102 | } |
| 103 | |
| 104 | #if DATA_SIZE <= 2 |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 105 | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 106 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 107 | int res, page_index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 108 | target_ulong addr; |
| 109 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 110 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 111 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 112 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 113 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 114 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 115 | if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != |
| 116 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 117 | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 118 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 119 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 120 | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
| 121 | } |
| 122 | return res; |
| 123 | } |
| 124 | #endif |
| 125 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 126 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 127 | |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 128 | /* generic store macro */ |
| 129 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 130 | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 131 | { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 132 | int page_index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 133 | target_ulong addr; |
| 134 | unsigned long physaddr; |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 135 | int mmu_idx; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 136 | |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 137 | addr = ptr; |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 138 | page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 139 | mmu_idx = CPU_MMU_INDEX; |
ths | 551bd27 | 2008-07-03 17:57:36 +0000 | [diff] [blame] | 140 | if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write != |
| 141 | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 142 | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 143 | } else { |
blueswir1 | 4d7a088 | 2008-05-10 10:14:22 +0000 | [diff] [blame] | 144 | physaddr = addr + env->tlb_table[mmu_idx][page_index].addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 145 | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
| 146 | } |
| 147 | } |
| 148 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 149 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 150 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 151 | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
bellard | e16c53f | 2004-01-04 18:15:29 +0000 | [diff] [blame] | 152 | |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 153 | #if DATA_SIZE == 8 |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 154 | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 155 | { |
| 156 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 157 | float64 d; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 158 | uint64_t i; |
| 159 | } u; |
| 160 | u.i = glue(ldq, MEMSUFFIX)(ptr); |
| 161 | return u.d; |
| 162 | } |
| 163 | |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 164 | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 165 | { |
| 166 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 167 | float64 d; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 168 | uint64_t i; |
| 169 | } u; |
| 170 | u.d = v; |
| 171 | glue(stq, MEMSUFFIX)(ptr, u.i); |
| 172 | } |
| 173 | #endif /* DATA_SIZE == 8 */ |
| 174 | |
| 175 | #if DATA_SIZE == 4 |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 176 | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 177 | { |
| 178 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 179 | float32 f; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 180 | uint32_t i; |
| 181 | } u; |
| 182 | u.i = glue(ldl, MEMSUFFIX)(ptr); |
| 183 | return u.f; |
| 184 | } |
| 185 | |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 186 | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 187 | { |
| 188 | union { |
bellard | 3f87bf6 | 2005-11-06 19:56:23 +0000 | [diff] [blame] | 189 | float32 f; |
bellard | 2d603d2 | 2004-01-04 23:56:24 +0000 | [diff] [blame] | 190 | uint32_t i; |
| 191 | } u; |
| 192 | u.f = v; |
| 193 | glue(stl, MEMSUFFIX)(ptr, u.i); |
| 194 | } |
| 195 | #endif /* DATA_SIZE == 4 */ |
| 196 | |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 197 | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 198 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 199 | #undef RES_TYPE |
| 200 | #undef DATA_TYPE |
| 201 | #undef DATA_STYPE |
| 202 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 203 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 204 | #undef DATA_SIZE |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 205 | #undef CPU_MMU_INDEX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 206 | #undef MMUSUFFIX |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 207 | #undef ADDR_READ |