commit | f51bf344689b0be285d73f07ecf663af4d68ed28 | [log] [tgz] |
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author | Peter Maydell <peter.maydell@linaro.org> | Sun Dec 01 11:32:52 2013 +0000 |
committer | Peter Maydell <peter.maydell@linaro.org> | Tue Dec 03 21:22:40 2013 +0000 |
tree | 47a48c07a8729ca5ce13039970180e78a4dcd3f4 | |
parent | 32ab6f6f4d792504385ab918b37bca211782dec8 [diff] |
target-arm: A64: Floating point <-> integer conv This is kinda from suse patch 52 but I ended up rewriting it pretty thoroughly and with a view to comments made on the mailing list w.r.t the silliness of double stores to the fpu reg memory). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Inspired-by: Alexander Graf <agraf@suse.de> aarch64 series 52/60