commit 600114988cb1beede13ce29dec65398f3e62e510
author Paul Brook <paul@codesourcery.com> Thu Nov 19 16:45:20 2009 +0000
committer Paul Brook <paul@codesourcery.com> Thu Nov 19 16:45:20 2009 +0000
tree 937055725aba7c29b402b927066333e2f8debf61
parent f165b53a896975f6c45760d72f87e44f1a2ba325

ARM FP16 support

Implement the ARM VFP half precision floating point extensions.

Signed-off-by: Paul Brook <paul@codesourcery.com>

target-arm/helper.c

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5e10533..cb95c6e 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -115,6 +115,7 @@
         set_feature(env, ARM_FEATURE_THUMB2);
         set_feature(env, ARM_FEATURE_VFP);
         set_feature(env, ARM_FEATURE_VFP3);
+        set_feature(env, ARM_FEATURE_VFP_FP16);
         set_feature(env, ARM_FEATURE_NEON);
         set_feature(env, ARM_FEATURE_THUMB2EE);
         set_feature(env, ARM_FEATURE_DIV);
@@ -2568,6 +2569,21 @@
 VFP_CONV_FIX(ul, s, float32, uint32, u)
 #undef VFP_CONV_FIX
 
+/* Half precision conversions.  */
+float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, CPUState *env)
+{
+    float_status *s = &env->vfp.fp_status;
+    int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
+    return float16_to_float32(a, ieee, s);
+}
+
+uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUState *env)
+{
+    float_status *s = &env->vfp.fp_status;
+    int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
+    return float32_to_float16(a, ieee, s);
+}
+
 float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env)
 {
     float_status *s = &env->vfp.fp_status;