blob: b845fad219583b1dcf9ac50de9e1783cbe409301 [file] [log] [blame]
Damien George075d5972014-11-27 20:30:33 +00001/* GNU linker script for ESP8266 */
2
3MEMORY
4{
5 dport0_0_seg : org = 0x3ff00000, len = 0x10
6 dram0_0_seg : org = 0x3ffe8000, len = 0x14000
7 iram1_0_seg : org = 0x40100000, len = 0x8000
8 irom0_0_seg : org = 0x40210000, len = 0x40000
9}
10
11/* define the top of RAM */
12_heap_end = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
13
14PHDRS
15{
16 dport0_0_phdr PT_LOAD;
17 dram0_0_phdr PT_LOAD;
18 dram0_0_bss_phdr PT_LOAD;
19 iram1_0_phdr PT_LOAD;
20 irom0_0_phdr PT_LOAD;
21}
22
23ENTRY(call_user_start)
24
25PROVIDE(_memmap_vecbase_reset = 0x40000000);
26
27/* Various memory-map dependent cache attribute settings: */
28_memmap_cacheattr_wb_base = 0x00000110;
29_memmap_cacheattr_wt_base = 0x00000110;
30_memmap_cacheattr_bp_base = 0x00000220;
31_memmap_cacheattr_unused_mask = 0xFFFFF00F;
32_memmap_cacheattr_wb_trapnull = 0x2222211F;
33_memmap_cacheattr_wba_trapnull = 0x2222211F;
34_memmap_cacheattr_wbna_trapnull = 0x2222211F;
35_memmap_cacheattr_wt_trapnull = 0x2222211F;
36_memmap_cacheattr_bp_trapnull = 0x2222222F;
37_memmap_cacheattr_wb_strict = 0xFFFFF11F;
38_memmap_cacheattr_wt_strict = 0xFFFFF11F;
39_memmap_cacheattr_bp_strict = 0xFFFFF22F;
40_memmap_cacheattr_wb_allvalid = 0x22222112;
41_memmap_cacheattr_wt_allvalid = 0x22222112;
42_memmap_cacheattr_bp_allvalid = 0x22222222;
43PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
44
45SECTIONS
46{
47
48 .dport0.rodata : ALIGN(4)
49 {
50 _dport0_rodata_start = ABSOLUTE(.);
51 *(.dport0.rodata)
52 *(.dport.rodata)
53 _dport0_rodata_end = ABSOLUTE(.);
54 } >dport0_0_seg :dport0_0_phdr
Damien Georgefbea8102014-11-28 14:58:25 +000055
Damien George075d5972014-11-27 20:30:33 +000056 .dport0.literal : ALIGN(4)
57 {
58 _dport0_literal_start = ABSOLUTE(.);
59 *(.dport0.literal)
60 *(.dport.literal)
61 _dport0_literal_end = ABSOLUTE(.);
62 } >dport0_0_seg :dport0_0_phdr
Damien Georgefbea8102014-11-28 14:58:25 +000063
Damien George075d5972014-11-27 20:30:33 +000064 .dport0.data : ALIGN(4)
65 {
66 _dport0_data_start = ABSOLUTE(.);
67 *(.dport0.data)
68 *(.dport.data)
69 _dport0_data_end = ABSOLUTE(.);
70 } >dport0_0_seg :dport0_0_phdr
Damien Georgefbea8102014-11-28 14:58:25 +000071
72 .irom0.text : ALIGN(4)
73 {
74 _irom0_text_start = ABSOLUTE(.);
75 *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
76 *py*.o*(.literal* .text*)
77 *gccollect.o*(.literal* .text*)
78 *gchelper.o*(.literal* .text*)
79 _irom0_text_end = ABSOLUTE(.);
80 } >irom0_0_seg :irom0_0_phdr
81
82 .text : ALIGN(4)
83 {
84 _stext = .;
85 _text_start = ABSOLUTE(.);
86 *(.entry.text)
87 *(.init.literal)
88 *(.init)
89 *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
90 *(.fini.literal)
91 *(.fini)
92 *(.gnu.version)
93 *qstr.o(.rodata.const_pool)
94 *.o(.rodata.mp_type_*)
95 /*
96 can't put these here for some reason...
97 *builtin.o(.rodata.mp_builtin_*_obj)
98 *parse.o(.rodata.rule_*)
99 */
100 _text_end = ABSOLUTE(.);
101 _etext = .;
102 } >iram1_0_seg :iram1_0_phdr
103
104 .lit4 : ALIGN(4)
105 {
106 _lit4_start = ABSOLUTE(.);
107 *(*.lit4)
108 *(.lit4.*)
109 *(.gnu.linkonce.lit4.*)
110 _lit4_end = ABSOLUTE(.);
111 } >iram1_0_seg :iram1_0_phdr
112
Damien George075d5972014-11-27 20:30:33 +0000113 .data : ALIGN(4)
114 {
115 _data_start = ABSOLUTE(.);
116 *(.data)
117 *(.data.*)
118 *(.gnu.linkonce.d.*)
119 *(.data1)
120 *(.sdata)
121 *(.sdata.*)
122 *(.gnu.linkonce.s.*)
123 *(.sdata2)
124 *(.sdata2.*)
125 *(.gnu.linkonce.s2.*)
126 *(.jcr)
127 _data_end = ABSOLUTE(.);
128 } >dram0_0_seg :dram0_0_phdr
Damien Georgefbea8102014-11-28 14:58:25 +0000129
Damien George075d5972014-11-27 20:30:33 +0000130 .rodata : ALIGN(4)
131 {
132 _rodata_start = ABSOLUTE(.);
133 *(.rodata)
134 *(.rodata.*)
135 *(.gnu.linkonce.r.*)
136 *(.rodata1)
137 __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
138 *(.xt_except_table)
139 *(.gcc_except_table)
140 *(.gnu.linkonce.e.*)
141 *(.gnu.version_r)
142 *(.eh_frame)
143 /* C++ constructor and destructor tables, properly ordered: */
144 KEEP (*crtbegin.o(.ctors))
145 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
146 KEEP (*(SORT(.ctors.*)))
147 KEEP (*(.ctors))
148 KEEP (*crtbegin.o(.dtors))
149 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
150 KEEP (*(SORT(.dtors.*)))
151 KEEP (*(.dtors))
152 /* C++ exception handlers table: */
153 __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
154 *(.xt_except_desc)
155 *(.gnu.linkonce.h.*)
156 __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
157 *(.xt_except_desc_end)
158 *(.dynamic)
159 *(.gnu.version_d)
160 . = ALIGN(4); /* this table MUST be 4-byte aligned */
161 _bss_table_start = ABSOLUTE(.);
162 LONG(_bss_start)
163 LONG(_bss_end)
164 _bss_table_end = ABSOLUTE(.);
165 _rodata_end = ABSOLUTE(.);
166 } >dram0_0_seg :dram0_0_phdr
Damien Georgefbea8102014-11-28 14:58:25 +0000167
Damien George075d5972014-11-27 20:30:33 +0000168 .bss ALIGN(8) (NOLOAD) : ALIGN(4)
169 {
170 . = ALIGN (8);
171 _bss_start = ABSOLUTE(.);
172 *(.dynsbss)
173 *(.sbss)
174 *(.sbss.*)
175 *(.gnu.linkonce.sb.*)
176 *(.scommon)
177 *(.sbss2)
178 *(.sbss2.*)
179 *(.gnu.linkonce.sb2.*)
180 *(.dynbss)
181 *(.bss)
182 *(.bss.*)
183 *(.gnu.linkonce.b.*)
184 *(COMMON)
185 . = ALIGN (8);
186 _bss_end = ABSOLUTE(.);
187 _heap_start = ABSOLUTE(.);
188 } >dram0_0_seg :dram0_0_bss_phdr
Damien George075d5972014-11-27 20:30:33 +0000189}
190
191/* get ROM code address */
192INCLUDE "eagle.rom.addr.v6.ld"