esp32/esp32_common.cmake: Use native gchelper for RISC-V.
This commit changes the gchelper implementation in use for RV32-based
targets (ESP32C3, ESP32C6) from the generic one written in C to the one
written in assembler that is specific to the CPU in question.
The native implementation is already exercised on most CI builds as it
is used by the QEMU port to compile and test the RV32 target.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
index f7b0090..d026a64 100644
--- a/ports/esp32/esp32_common.cmake
+++ b/ports/esp32/esp32_common.cmake
@@ -16,7 +16,10 @@
# RISC-V specific inclusions
if(CONFIG_IDF_TARGET_ARCH_RISCV)
- list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c)
+ list(APPEND MICROPY_SOURCE_LIB
+ ${MICROPY_DIR}/shared/runtime/gchelper_native.c
+ ${MICROPY_DIR}/shared/runtime/gchelper_rv32i.s
+ )
list(APPEND IDF_COMPONENTS riscv)
endif()