blob: 0a8724e657d7d8529351b42419a5f40968225b39 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00008 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * Additional technical information is available on
maximilian attems8b2b4032007-07-28 13:07:16 +020010 * http://www.linux-mtd.infradead.org/doc/nand.html
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000011 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020013 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020015 * Credits:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000016 * David Woodhouse for adding multichip support
17 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020021 * TODO:
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Brian Norris7854d3f2011-06-23 14:12:08 -070024 * if we have HW ECC support.
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +030027 * BBT table is not serialized, has to be fixed
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070029 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
David Woodhouse552d9202006-05-14 01:20:46 +010035#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/delay.h>
37#include <linux/errno.h>
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +020038#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <linux/sched.h>
40#include <linux/slab.h>
41#include <linux/types.h>
42#include <linux/mtd/mtd.h>
43#include <linux/mtd/nand.h>
44#include <linux/mtd/nand_ecc.h>
Ivan Djelic193bd402011-03-11 11:05:33 +010045#include <linux/mtd/nand_bch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <linux/interrupt.h>
47#include <linux/bitops.h>
Richard Purdie8fe833c2006-03-31 02:31:14 -080048#include <linux/leds.h>
Florian Fainelli7351d3a2010-09-07 13:23:45 +020049#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#include <linux/mtd/partitions.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
52/* Define default oob placement schemes for large and small page devices */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020053static struct nand_ecclayout nand_oob_8 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070054 .eccbytes = 3,
55 .eccpos = {0, 1, 2},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020056 .oobfree = {
57 {.offset = 3,
58 .length = 2},
59 {.offset = 6,
Florian Fainellif8ac0412010-09-07 13:23:43 +020060 .length = 2} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070061};
62
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020063static struct nand_ecclayout nand_oob_16 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 .eccbytes = 6,
65 .eccpos = {0, 1, 2, 3, 6, 7},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020066 .oobfree = {
67 {.offset = 8,
Florian Fainellif8ac0412010-09-07 13:23:43 +020068 . length = 8} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070069};
70
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020071static struct nand_ecclayout nand_oob_64 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 .eccbytes = 24,
73 .eccpos = {
David Woodhousee0c7d762006-05-13 18:07:53 +010074 40, 41, 42, 43, 44, 45, 46, 47,
75 48, 49, 50, 51, 52, 53, 54, 55,
76 56, 57, 58, 59, 60, 61, 62, 63},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020077 .oobfree = {
78 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020079 .length = 38} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070080};
81
Thomas Gleixner81ec5362007-12-12 17:27:03 +010082static struct nand_ecclayout nand_oob_128 = {
83 .eccbytes = 48,
84 .eccpos = {
85 80, 81, 82, 83, 84, 85, 86, 87,
86 88, 89, 90, 91, 92, 93, 94, 95,
87 96, 97, 98, 99, 100, 101, 102, 103,
88 104, 105, 106, 107, 108, 109, 110, 111,
89 112, 113, 114, 115, 116, 117, 118, 119,
90 120, 121, 122, 123, 124, 125, 126, 127},
91 .oobfree = {
92 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020093 .length = 78} }
Thomas Gleixner81ec5362007-12-12 17:27:03 +010094};
95
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020096static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +020097 int new_state);
Linus Torvalds1da177e2005-04-16 15:20:36 -070098
Thomas Gleixner8593fbc2006-05-29 03:26:58 +020099static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
100 struct mtd_oob_ops *ops);
101
Thomas Gleixnerd470a972006-05-23 23:48:57 +0200102/*
Joe Perches8e87d782008-02-03 17:22:34 +0200103 * For devices which display every fart in the system on a separate LED. Is
Thomas Gleixnerd470a972006-05-23 23:48:57 +0200104 * compiled away when LED support is disabled.
105 */
106DEFINE_LED_TRIGGER(nand_led_trigger);
107
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530108static int check_offs_len(struct mtd_info *mtd,
109 loff_t ofs, uint64_t len)
110{
111 struct nand_chip *chip = mtd->priv;
112 int ret = 0;
113
114 /* Start address must align on block boundary */
115 if (ofs & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700116 pr_debug("%s: unaligned address\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530117 ret = -EINVAL;
118 }
119
120 /* Length must align on block boundary */
121 if (len & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700122 pr_debug("%s: length not block aligned\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530123 ret = -EINVAL;
124 }
125
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530126 return ret;
127}
128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129/**
130 * nand_release_device - [GENERIC] release chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700131 * @mtd: MTD device structure
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000132 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700133 * Deselect, release chip lock and wake up anyone waiting on the device.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100135static void nand_release_device(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200137 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138
139 /* De-select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200140 chip->select_chip(mtd, -1);
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100141
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200142 /* Release the controller and the chip */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200143 spin_lock(&chip->controller->lock);
144 chip->controller->active = NULL;
145 chip->state = FL_READY;
146 wake_up(&chip->controller->wq);
147 spin_unlock(&chip->controller->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148}
149
150/**
151 * nand_read_byte - [DEFAULT] read one byte from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700152 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700154 * Default read function for 8bit buswidth
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200156static uint8_t nand_read_byte(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200158 struct nand_chip *chip = mtd->priv;
159 return readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160}
161
162/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
Brian Norris7854d3f2011-06-23 14:12:08 -0700164 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700165 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700167 * Default read function for 16bit buswidth with endianness conversion.
168 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200170static uint8_t nand_read_byte16(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200172 struct nand_chip *chip = mtd->priv;
173 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174}
175
176/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177 * nand_read_word - [DEFAULT] read one word from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700178 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700180 * Default read function for 16bit buswidth without endianness conversion.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 */
182static u16 nand_read_word(struct mtd_info *mtd)
183{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200184 struct nand_chip *chip = mtd->priv;
185 return readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186}
187
188/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 * nand_select_chip - [DEFAULT] control CE line
Brian Norris8b6e50c2011-05-25 14:59:01 -0700190 * @mtd: MTD device structure
191 * @chipnr: chipnumber to select, -1 for deselect
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192 *
193 * Default select function for 1 chip devices.
194 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200195static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200197 struct nand_chip *chip = mtd->priv;
198
199 switch (chipnr) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 case -1:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200201 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202 break;
203 case 0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 break;
205
206 default:
207 BUG();
208 }
209}
210
211/**
212 * nand_write_buf - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700213 * @mtd: MTD device structure
214 * @buf: data buffer
215 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700217 * Default write function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200219static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220{
221 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200222 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
David Woodhousee0c7d762006-05-13 18:07:53 +0100224 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200225 writeb(buf[i], chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
228/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000229 * nand_read_buf - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700230 * @mtd: MTD device structure
231 * @buf: buffer to store date
232 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700234 * Default read function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200236static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237{
238 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200239 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240
David Woodhousee0c7d762006-05-13 18:07:53 +0100241 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200242 buf[i] = readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243}
244
245/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000246 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700247 * @mtd: MTD device structure
248 * @buf: buffer containing the data to compare
249 * @len: number of bytes to compare
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700251 * Default verify function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200253static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254{
255 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200256 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257
David Woodhousee0c7d762006-05-13 18:07:53 +0100258 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200259 if (buf[i] != readb(chip->IO_ADDR_R))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260 return -EFAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 return 0;
262}
263
264/**
265 * nand_write_buf16 - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700266 * @mtd: MTD device structure
267 * @buf: data buffer
268 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700270 * Default write function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200272static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273{
274 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200275 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 u16 *p = (u16 *) buf;
277 len >>= 1;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000278
David Woodhousee0c7d762006-05-13 18:07:53 +0100279 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200280 writew(p[i], chip->IO_ADDR_W);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000281
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282}
283
284/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000285 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700286 * @mtd: MTD device structure
287 * @buf: buffer to store date
288 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700290 * Default read function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200292static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293{
294 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200295 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 u16 *p = (u16 *) buf;
297 len >>= 1;
298
David Woodhousee0c7d762006-05-13 18:07:53 +0100299 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200300 p[i] = readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301}
302
303/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000304 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700305 * @mtd: MTD device structure
306 * @buf: buffer containing the data to compare
307 * @len: number of bytes to compare
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700309 * Default verify function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200311static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312{
313 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200314 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315 u16 *p = (u16 *) buf;
316 len >>= 1;
317
David Woodhousee0c7d762006-05-13 18:07:53 +0100318 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200319 if (p[i] != readw(chip->IO_ADDR_R))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 return -EFAULT;
321
322 return 0;
323}
324
325/**
326 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700327 * @mtd: MTD device structure
328 * @ofs: offset from device start
329 * @getchip: 0, if the chip is already selected
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000331 * Check, if the block is bad.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 */
333static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
334{
Brian Norriscdbec052012-01-13 18:11:48 -0800335 int page, chipnr, res = 0, i = 0;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200336 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 u16 bad;
338
Brian Norris5fb15492011-05-31 16:31:21 -0700339 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -0700340 ofs += mtd->erasesize - mtd->writesize;
341
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100342 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
343
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 if (getchip) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200345 chipnr = (int)(ofs >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200347 nand_get_device(chip, mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200350 chip->select_chip(mtd, chipnr);
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100351 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
Brian Norriscdbec052012-01-13 18:11:48 -0800353 do {
354 if (chip->options & NAND_BUSWIDTH_16) {
355 chip->cmdfunc(mtd, NAND_CMD_READOOB,
356 chip->badblockpos & 0xFE, page);
357 bad = cpu_to_le16(chip->read_word(mtd));
358 if (chip->badblockpos & 0x1)
359 bad >>= 8;
360 else
361 bad &= 0xFF;
362 } else {
363 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
364 page);
365 bad = chip->read_byte(mtd);
366 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000367
Brian Norriscdbec052012-01-13 18:11:48 -0800368 if (likely(chip->badblockbits == 8))
369 res = bad != 0xFF;
370 else
371 res = hweight8(bad) < chip->badblockbits;
372 ofs += mtd->writesize;
373 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
374 i++;
375 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
Maxim Levitskye0b58d02010-02-22 20:39:38 +0200376
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200377 if (getchip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 nand_release_device(mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000379
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 return res;
381}
382
383/**
384 * nand_default_block_markbad - [DEFAULT] mark a block bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700385 * @mtd: MTD device structure
386 * @ofs: offset from device start
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700388 * This is the default implementation, which can be overridden by a hardware
Brian Norrise2414f42012-02-06 13:44:00 -0800389 * specific driver. We try operations in the following order, according to our
390 * bbt_options (NAND_BBT_NO_OOB_BBM and NAND_BBT_USE_FLASH):
391 * (1) erase the affected block, to allow OOB marker to be written cleanly
392 * (2) update in-memory BBT
393 * (3) write bad block marker to OOB area of affected block
394 * (4) update flash-based BBT
395 * Note that we retain the first error encountered in (3) or (4), finish the
396 * procedures, and dump the error in the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397*/
398static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
399{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200400 struct nand_chip *chip = mtd->priv;
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200401 uint8_t buf[2] = { 0, 0 };
Brian Norrise2414f42012-02-06 13:44:00 -0800402 int block, res, ret = 0, i = 0;
403 int write_oob = !(chip->bbt_options & NAND_BBT_NO_OOB_BBM);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000404
Brian Norrise2414f42012-02-06 13:44:00 -0800405 if (write_oob) {
Brian Norris00918422012-01-13 18:11:47 -0800406 struct erase_info einfo;
407
408 /* Attempt erase before marking OOB */
409 memset(&einfo, 0, sizeof(einfo));
410 einfo.mtd = mtd;
411 einfo.addr = ofs;
412 einfo.len = 1 << chip->phys_erase_shift;
413 nand_erase_nand(mtd, &einfo, 0);
414 }
415
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416 /* Get block number */
Andre Renaud4226b512007-04-17 13:50:59 -0400417 block = (int)(ofs >> chip->bbt_erase_shift);
Brian Norrise2414f42012-02-06 13:44:00 -0800418 /* Mark block bad in memory-based BBT */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200419 if (chip->bbt)
420 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421
Brian Norrise2414f42012-02-06 13:44:00 -0800422 /* Write bad block marker to OOB */
423 if (write_oob) {
Brian Norris4a89ff82011-08-30 18:45:45 -0700424 struct mtd_oob_ops ops;
Brian Norrisdf698622012-01-20 20:38:03 -0800425 loff_t wr_ofs = ofs;
Brian Norris4a89ff82011-08-30 18:45:45 -0700426
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300427 nand_get_device(chip, mtd, FL_WRITING);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000428
Brian Norris4a89ff82011-08-30 18:45:45 -0700429 ops.datbuf = NULL;
430 ops.oobbuf = buf;
Brian Norris85443312012-01-13 18:11:49 -0800431 ops.ooboffs = chip->badblockpos;
432 if (chip->options & NAND_BUSWIDTH_16) {
433 ops.ooboffs &= ~0x01;
434 ops.len = ops.ooblen = 2;
435 } else {
436 ops.len = ops.ooblen = 1;
437 }
Brian Norris23b1a992011-10-14 20:09:33 -0700438 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norrisdf698622012-01-20 20:38:03 -0800439
Brian Norrise2414f42012-02-06 13:44:00 -0800440 /* Write to first/last page(s) if necessary */
Brian Norrisdf698622012-01-20 20:38:03 -0800441 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
442 wr_ofs += mtd->erasesize - mtd->writesize;
Brian Norris02ed70b2010-07-21 16:53:47 -0700443 do {
Brian Norrise2414f42012-02-06 13:44:00 -0800444 res = nand_do_write_oob(mtd, wr_ofs, &ops);
445 if (!ret)
446 ret = res;
Brian Norris02ed70b2010-07-21 16:53:47 -0700447
Brian Norris02ed70b2010-07-21 16:53:47 -0700448 i++;
Brian Norrisdf698622012-01-20 20:38:03 -0800449 wr_ofs += mtd->writesize;
Brian Norrise2414f42012-02-06 13:44:00 -0800450 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
Brian Norris02ed70b2010-07-21 16:53:47 -0700451
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300452 nand_release_device(mtd);
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200453 }
Brian Norrise2414f42012-02-06 13:44:00 -0800454
455 /* Update flash-based bad block table */
456 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
457 res = nand_update_bbt(mtd, ofs);
458 if (!ret)
459 ret = res;
460 }
461
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200462 if (!ret)
463 mtd->ecc_stats.badblocks++;
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300464
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200465 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466}
467
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000468/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 * nand_check_wp - [GENERIC] check if the chip is write protected
Brian Norris8b6e50c2011-05-25 14:59:01 -0700470 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700472 * Check, if the device is write protected. The function expects, that the
473 * device is already selected.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100475static int nand_check_wp(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200477 struct nand_chip *chip = mtd->priv;
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200478
Brian Norris8b6e50c2011-05-25 14:59:01 -0700479 /* Broken xD cards report WP despite being writable */
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200480 if (chip->options & NAND_BROKEN_XD)
481 return 0;
482
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 /* Check the WP bit */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200484 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
485 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486}
487
488/**
489 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700490 * @mtd: MTD device structure
491 * @ofs: offset from device start
492 * @getchip: 0, if the chip is already selected
493 * @allowbbt: 1, if its allowed to access the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 *
495 * Check, if the block is bad. Either by reading the bad block table or
496 * calling of the scan function.
497 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200498static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
499 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200501 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000502
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200503 if (!chip->bbt)
504 return chip->block_bad(mtd, ofs, getchip);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000505
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506 /* Return info from the table */
David Woodhousee0c7d762006-05-13 18:07:53 +0100507 return nand_isbad_bbt(mtd, ofs, allowbbt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508}
509
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200510/**
511 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
Brian Norris8b6e50c2011-05-25 14:59:01 -0700512 * @mtd: MTD device structure
513 * @timeo: Timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200514 *
515 * Helper function for nand_wait_ready used when needing to wait in interrupt
516 * context.
517 */
518static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
519{
520 struct nand_chip *chip = mtd->priv;
521 int i;
522
523 /* Wait for the device to get ready */
524 for (i = 0; i < timeo; i++) {
525 if (chip->dev_ready(mtd))
526 break;
527 touch_softlockup_watchdog();
528 mdelay(1);
529 }
530}
531
Brian Norris7854d3f2011-06-23 14:12:08 -0700532/* Wait for the ready pin, after a command. The timeout is caught later. */
David Woodhouse4b648b02006-09-25 17:05:24 +0100533void nand_wait_ready(struct mtd_info *mtd)
Thomas Gleixner3b887752005-02-22 21:56:49 +0000534{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200535 struct nand_chip *chip = mtd->priv;
David Woodhousee0c7d762006-05-13 18:07:53 +0100536 unsigned long timeo = jiffies + 2;
Thomas Gleixner3b887752005-02-22 21:56:49 +0000537
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200538 /* 400ms timeout */
539 if (in_interrupt() || oops_in_progress)
540 return panic_nand_wait_ready(mtd, 400);
541
Richard Purdie8fe833c2006-03-31 02:31:14 -0800542 led_trigger_event(nand_led_trigger, LED_FULL);
Brian Norris7854d3f2011-06-23 14:12:08 -0700543 /* Wait until command is processed or timeout occurs */
Thomas Gleixner3b887752005-02-22 21:56:49 +0000544 do {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200545 if (chip->dev_ready(mtd))
Richard Purdie8fe833c2006-03-31 02:31:14 -0800546 break;
Ingo Molnar8446f1d2005-09-06 15:16:27 -0700547 touch_softlockup_watchdog();
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000548 } while (time_before(jiffies, timeo));
Richard Purdie8fe833c2006-03-31 02:31:14 -0800549 led_trigger_event(nand_led_trigger, LED_OFF);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000550}
David Woodhouse4b648b02006-09-25 17:05:24 +0100551EXPORT_SYMBOL_GPL(nand_wait_ready);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000552
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553/**
554 * nand_command - [DEFAULT] Send command to NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700555 * @mtd: MTD device structure
556 * @command: the command to be sent
557 * @column: the column address for this command, -1 if none
558 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700560 * Send command to NAND device. This function is used for small page devices
561 * (256/512 Bytes per page).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200563static void nand_command(struct mtd_info *mtd, unsigned int command,
564 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200566 register struct nand_chip *chip = mtd->priv;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200567 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568
Brian Norris8b6e50c2011-05-25 14:59:01 -0700569 /* Write out the command to the device */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570 if (command == NAND_CMD_SEQIN) {
571 int readcmd;
572
Joern Engel28318772006-05-22 23:18:05 +0200573 if (column >= mtd->writesize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 /* OOB area */
Joern Engel28318772006-05-22 23:18:05 +0200575 column -= mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 readcmd = NAND_CMD_READOOB;
577 } else if (column < 256) {
578 /* First 256 bytes --> READ0 */
579 readcmd = NAND_CMD_READ0;
580 } else {
581 column -= 256;
582 readcmd = NAND_CMD_READ1;
583 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200584 chip->cmd_ctrl(mtd, readcmd, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200585 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200587 chip->cmd_ctrl(mtd, command, ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588
Brian Norris8b6e50c2011-05-25 14:59:01 -0700589 /* Address cycle, when necessary */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200590 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
591 /* Serially input address */
592 if (column != -1) {
593 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200594 if (chip->options & NAND_BUSWIDTH_16)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200595 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200596 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200597 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200599 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200600 chip->cmd_ctrl(mtd, page_addr, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200601 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200602 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200603 /* One more address cycle for devices > 32MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200604 if (chip->chipsize > (32 << 20))
605 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200606 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200607 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000608
609 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700610 * Program and erase have their own busy handlers status and sequential
611 * in needs no delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100612 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000614
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 case NAND_CMD_PAGEPROG:
616 case NAND_CMD_ERASE1:
617 case NAND_CMD_ERASE2:
618 case NAND_CMD_SEQIN:
619 case NAND_CMD_STATUS:
620 return;
621
622 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200623 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200625 udelay(chip->chip_delay);
626 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200627 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200628 chip->cmd_ctrl(mtd,
629 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200630 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
631 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632 return;
633
David Woodhousee0c7d762006-05-13 18:07:53 +0100634 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000636 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 * If we don't have access to the busy pin, we apply the given
638 * command delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100639 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200640 if (!chip->dev_ready) {
641 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000643 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 }
Brian Norris8b6e50c2011-05-25 14:59:01 -0700645 /*
646 * Apply this short delay always to ensure that we do wait tWB in
647 * any case on any machine.
648 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100649 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000650
651 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652}
653
654/**
655 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700656 * @mtd: MTD device structure
657 * @command: the command to be sent
658 * @column: the column address for this command, -1 if none
659 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 *
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200661 * Send command to NAND device. This is the version for the new large page
Brian Norris7854d3f2011-06-23 14:12:08 -0700662 * devices. We don't have the separate regions as we have in the small page
663 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200665static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
666 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200668 register struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669
670 /* Emulate NAND_CMD_READOOB */
671 if (command == NAND_CMD_READOOB) {
Joern Engel28318772006-05-22 23:18:05 +0200672 column += mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 command = NAND_CMD_READ0;
674 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000675
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200676 /* Command latch cycle */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200677 chip->cmd_ctrl(mtd, command & 0xff,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200678 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679
680 if (column != -1 || page_addr != -1) {
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200681 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682
683 /* Serially input address */
684 if (column != -1) {
685 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200686 if (chip->options & NAND_BUSWIDTH_16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200688 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200689 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200690 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000691 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200693 chip->cmd_ctrl(mtd, page_addr, ctrl);
694 chip->cmd_ctrl(mtd, page_addr >> 8,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200695 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696 /* One more address cycle for devices > 128MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200697 if (chip->chipsize > (128 << 20))
698 chip->cmd_ctrl(mtd, page_addr >> 16,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200699 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200702 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000703
704 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700705 * Program and erase have their own busy handlers status, sequential
706 * in, and deplete1 need no delay.
David A. Marlin30f464b2005-01-17 18:35:25 +0000707 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000709
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710 case NAND_CMD_CACHEDPROG:
711 case NAND_CMD_PAGEPROG:
712 case NAND_CMD_ERASE1:
713 case NAND_CMD_ERASE2:
714 case NAND_CMD_SEQIN:
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200715 case NAND_CMD_RNDIN:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716 case NAND_CMD_STATUS:
David A. Marlin30f464b2005-01-17 18:35:25 +0000717 case NAND_CMD_DEPLETE1:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718 return;
719
David A. Marlin30f464b2005-01-17 18:35:25 +0000720 case NAND_CMD_STATUS_ERROR:
721 case NAND_CMD_STATUS_ERROR0:
722 case NAND_CMD_STATUS_ERROR1:
723 case NAND_CMD_STATUS_ERROR2:
724 case NAND_CMD_STATUS_ERROR3:
Brian Norris8b6e50c2011-05-25 14:59:01 -0700725 /* Read error status commands require only a short delay */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200726 udelay(chip->chip_delay);
David A. Marlin30f464b2005-01-17 18:35:25 +0000727 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728
729 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200730 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200732 udelay(chip->chip_delay);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200733 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
734 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
735 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
736 NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200737 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
738 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 return;
740
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200741 case NAND_CMD_RNDOUT:
742 /* No ready / busy check necessary */
743 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
744 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
745 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
746 NAND_NCE | NAND_CTRL_CHANGE);
747 return;
748
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 case NAND_CMD_READ0:
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200750 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
751 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
752 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
753 NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000754
David Woodhousee0c7d762006-05-13 18:07:53 +0100755 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000757 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758 * If we don't have access to the busy pin, we apply the given
Brian Norris8b6e50c2011-05-25 14:59:01 -0700759 * command delay.
David Woodhousee0c7d762006-05-13 18:07:53 +0100760 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200761 if (!chip->dev_ready) {
762 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000764 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765 }
Thomas Gleixner3b887752005-02-22 21:56:49 +0000766
Brian Norris8b6e50c2011-05-25 14:59:01 -0700767 /*
768 * Apply this short delay always to ensure that we do wait tWB in
769 * any case on any machine.
770 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100771 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000772
773 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774}
775
776/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200777 * panic_nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700778 * @chip: the nand chip descriptor
779 * @mtd: MTD device structure
780 * @new_state: the state which is requested
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200781 *
782 * Used when in panic, no locks are taken.
783 */
784static void panic_nand_get_device(struct nand_chip *chip,
785 struct mtd_info *mtd, int new_state)
786{
Brian Norris7854d3f2011-06-23 14:12:08 -0700787 /* Hardware controller shared among independent devices */
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200788 chip->controller->active = chip;
789 chip->state = new_state;
790}
791
792/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700793 * nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700794 * @chip: the nand chip descriptor
795 * @mtd: MTD device structure
796 * @new_state: the state which is requested
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 *
798 * Get the device and lock it for exclusive access
799 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200800static int
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200801nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200803 spinlock_t *lock = &chip->controller->lock;
804 wait_queue_head_t *wq = &chip->controller->wq;
David Woodhousee0c7d762006-05-13 18:07:53 +0100805 DECLARE_WAITQUEUE(wait, current);
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200806retry:
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100807 spin_lock(lock);
808
vimal singhb8b3ee92009-07-09 20:41:22 +0530809 /* Hardware controller shared among independent devices */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200810 if (!chip->controller->active)
811 chip->controller->active = chip;
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200812
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200813 if (chip->controller->active == chip && chip->state == FL_READY) {
814 chip->state = new_state;
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100815 spin_unlock(lock);
Vitaly Wool962034f2005-09-15 14:58:53 +0100816 return 0;
817 }
818 if (new_state == FL_PM_SUSPENDED) {
Li Yang6b0d9a82009-11-17 14:45:49 -0800819 if (chip->controller->active->state == FL_PM_SUSPENDED) {
820 chip->state = FL_PM_SUSPENDED;
821 spin_unlock(lock);
822 return 0;
Li Yang6b0d9a82009-11-17 14:45:49 -0800823 }
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100824 }
825 set_current_state(TASK_UNINTERRUPTIBLE);
826 add_wait_queue(wq, &wait);
827 spin_unlock(lock);
828 schedule();
829 remove_wait_queue(wq, &wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700830 goto retry;
831}
832
833/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700834 * panic_nand_wait - [GENERIC] wait until the command is done
835 * @mtd: MTD device structure
836 * @chip: NAND chip structure
837 * @timeo: timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200838 *
839 * Wait for command done. This is a helper function for nand_wait used when
840 * we are in interrupt context. May happen when in panic and trying to write
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400841 * an oops through mtdoops.
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200842 */
843static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
844 unsigned long timeo)
845{
846 int i;
847 for (i = 0; i < timeo; i++) {
848 if (chip->dev_ready) {
849 if (chip->dev_ready(mtd))
850 break;
851 } else {
852 if (chip->read_byte(mtd) & NAND_STATUS_READY)
853 break;
854 }
855 mdelay(1);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200856 }
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200857}
858
859/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700860 * nand_wait - [DEFAULT] wait until the command is done
861 * @mtd: MTD device structure
862 * @chip: NAND chip structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700864 * Wait for command done. This applies to erase and program only. Erase can
865 * take up to 400ms and program up to 20ms according to general NAND and
866 * SmartMedia specs.
Randy Dunlap844d3b42006-06-28 21:48:27 -0700867 */
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200868static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700869{
870
David Woodhousee0c7d762006-05-13 18:07:53 +0100871 unsigned long timeo = jiffies;
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200872 int status, state = chip->state;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000873
Linus Torvalds1da177e2005-04-16 15:20:36 -0700874 if (state == FL_ERASING)
David Woodhousee0c7d762006-05-13 18:07:53 +0100875 timeo += (HZ * 400) / 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700876 else
David Woodhousee0c7d762006-05-13 18:07:53 +0100877 timeo += (HZ * 20) / 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878
Richard Purdie8fe833c2006-03-31 02:31:14 -0800879 led_trigger_event(nand_led_trigger, LED_FULL);
880
Brian Norris8b6e50c2011-05-25 14:59:01 -0700881 /*
882 * Apply this short delay always to ensure that we do wait tWB in any
883 * case on any machine.
884 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100885 ndelay(100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200887 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
888 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000889 else
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200890 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200892 if (in_interrupt() || oops_in_progress)
893 panic_nand_wait(mtd, chip, timeo);
894 else {
895 while (time_before(jiffies, timeo)) {
896 if (chip->dev_ready) {
897 if (chip->dev_ready(mtd))
898 break;
899 } else {
900 if (chip->read_byte(mtd) & NAND_STATUS_READY)
901 break;
902 }
903 cond_resched();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700905 }
Richard Purdie8fe833c2006-03-31 02:31:14 -0800906 led_trigger_event(nand_led_trigger, LED_OFF);
907
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200908 status = (int)chip->read_byte(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909 return status;
910}
911
912/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700913 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700914 * @mtd: mtd info
915 * @ofs: offset to start unlock from
916 * @len: length to unlock
Brian Norris8b6e50c2011-05-25 14:59:01 -0700917 * @invert: when = 0, unlock the range of blocks within the lower and
918 * upper boundary address
919 * when = 1, unlock the range of blocks outside the boundaries
920 * of the lower and upper boundary address
Vimal Singh7d70f332010-02-08 15:50:49 +0530921 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700922 * Returs unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530923 */
924static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
925 uint64_t len, int invert)
926{
927 int ret = 0;
928 int status, page;
929 struct nand_chip *chip = mtd->priv;
930
931 /* Submit address of first page to unlock */
932 page = ofs >> chip->page_shift;
933 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
934
935 /* Submit address of last page to unlock */
936 page = (ofs + len) >> chip->page_shift;
937 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
938 (page | invert) & chip->pagemask);
939
940 /* Call wait ready function */
941 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530942 /* See if device thinks it succeeded */
943 if (status & 0x01) {
Brian Norris289c0522011-07-19 10:06:09 -0700944 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530945 __func__, status);
946 ret = -EIO;
947 }
948
949 return ret;
950}
951
952/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700953 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700954 * @mtd: mtd info
955 * @ofs: offset to start unlock from
956 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530957 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700958 * Returns unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530959 */
960int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
961{
962 int ret = 0;
963 int chipnr;
964 struct nand_chip *chip = mtd->priv;
965
Brian Norris289c0522011-07-19 10:06:09 -0700966 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530967 __func__, (unsigned long long)ofs, len);
968
969 if (check_offs_len(mtd, ofs, len))
970 ret = -EINVAL;
971
972 /* Align to last block address if size addresses end of the device */
973 if (ofs + len == mtd->size)
974 len -= mtd->erasesize;
975
976 nand_get_device(chip, mtd, FL_UNLOCKING);
977
978 /* Shift to get chip number */
979 chipnr = ofs >> chip->chip_shift;
980
981 chip->select_chip(mtd, chipnr);
982
983 /* Check, if it is write protected */
984 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700985 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530986 __func__);
987 ret = -EIO;
988 goto out;
989 }
990
991 ret = __nand_unlock(mtd, ofs, len, 0);
992
993out:
Vimal Singh7d70f332010-02-08 15:50:49 +0530994 nand_release_device(mtd);
995
996 return ret;
997}
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200998EXPORT_SYMBOL(nand_unlock);
Vimal Singh7d70f332010-02-08 15:50:49 +0530999
1000/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -07001001 * nand_lock - [REPLACEABLE] locks all blocks present in the device
Randy Dunlapb6d676d2010-08-10 18:02:50 -07001002 * @mtd: mtd info
1003 * @ofs: offset to start unlock from
1004 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +05301005 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001006 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
1007 * have this feature, but it allows only to lock all blocks, not for specified
1008 * range for block. Implementing 'lock' feature by making use of 'unlock', for
1009 * now.
Vimal Singh7d70f332010-02-08 15:50:49 +05301010 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001011 * Returns lock status.
Vimal Singh7d70f332010-02-08 15:50:49 +05301012 */
1013int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1014{
1015 int ret = 0;
1016 int chipnr, status, page;
1017 struct nand_chip *chip = mtd->priv;
1018
Brian Norris289c0522011-07-19 10:06:09 -07001019 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +05301020 __func__, (unsigned long long)ofs, len);
1021
1022 if (check_offs_len(mtd, ofs, len))
1023 ret = -EINVAL;
1024
1025 nand_get_device(chip, mtd, FL_LOCKING);
1026
1027 /* Shift to get chip number */
1028 chipnr = ofs >> chip->chip_shift;
1029
1030 chip->select_chip(mtd, chipnr);
1031
1032 /* Check, if it is write protected */
1033 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -07001034 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +05301035 __func__);
1036 status = MTD_ERASE_FAILED;
1037 ret = -EIO;
1038 goto out;
1039 }
1040
1041 /* Submit address of first page to lock */
1042 page = ofs >> chip->page_shift;
1043 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);
1044
1045 /* Call wait ready function */
1046 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +05301047 /* See if device thinks it succeeded */
1048 if (status & 0x01) {
Brian Norris289c0522011-07-19 10:06:09 -07001049 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +05301050 __func__, status);
1051 ret = -EIO;
1052 goto out;
1053 }
1054
1055 ret = __nand_unlock(mtd, ofs, len, 0x1);
1056
1057out:
Vimal Singh7d70f332010-02-08 15:50:49 +05301058 nand_release_device(mtd);
1059
1060 return ret;
1061}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001062EXPORT_SYMBOL(nand_lock);
Vimal Singh7d70f332010-02-08 15:50:49 +05301063
1064/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001065 * nand_read_page_raw - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001066 * @mtd: mtd info structure
1067 * @chip: nand chip info structure
1068 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001069 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001070 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001071 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001072 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001073 */
1074static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001075 uint8_t *buf, int oob_required, int page)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001076{
1077 chip->read_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001078 if (oob_required)
1079 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001080 return 0;
1081}
1082
1083/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001084 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001085 * @mtd: mtd info structure
1086 * @chip: nand chip info structure
1087 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001088 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001089 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001090 *
1091 * We need a special oob layout and handling even when OOB isn't used.
1092 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001093static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001094 struct nand_chip *chip, uint8_t *buf,
1095 int oob_required, int page)
David Brownell52ff49d2009-03-04 12:01:36 -08001096{
1097 int eccsize = chip->ecc.size;
1098 int eccbytes = chip->ecc.bytes;
1099 uint8_t *oob = chip->oob_poi;
1100 int steps, size;
1101
1102 for (steps = chip->ecc.steps; steps > 0; steps--) {
1103 chip->read_buf(mtd, buf, eccsize);
1104 buf += eccsize;
1105
1106 if (chip->ecc.prepad) {
1107 chip->read_buf(mtd, oob, chip->ecc.prepad);
1108 oob += chip->ecc.prepad;
1109 }
1110
1111 chip->read_buf(mtd, oob, eccbytes);
1112 oob += eccbytes;
1113
1114 if (chip->ecc.postpad) {
1115 chip->read_buf(mtd, oob, chip->ecc.postpad);
1116 oob += chip->ecc.postpad;
1117 }
1118 }
1119
1120 size = mtd->oobsize - (oob - chip->oob_poi);
1121 if (size)
1122 chip->read_buf(mtd, oob, size);
1123
1124 return 0;
1125}
1126
1127/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001128 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001129 * @mtd: mtd info structure
1130 * @chip: nand chip info structure
1131 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001132 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001133 * @page: page number to read
David A. Marlin068e3c02005-01-24 03:07:46 +00001134 */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001135static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001136 uint8_t *buf, int oob_required, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001137{
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001138 int i, eccsize = chip->ecc.size;
1139 int eccbytes = chip->ecc.bytes;
1140 int eccsteps = chip->ecc.steps;
1141 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001142 uint8_t *ecc_calc = chip->buffers->ecccalc;
1143 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001144 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001145 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001146
Brian Norris1fbb9382012-05-02 10:14:55 -07001147 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001148
1149 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1150 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1151
1152 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001153 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001154
1155 eccsteps = chip->ecc.steps;
1156 p = buf;
1157
1158 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1159 int stat;
1160
1161 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001162 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001163 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001164 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001165 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001166 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1167 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001168 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001169 return max_bitflips;
Thomas Gleixner22c60f52005-04-04 19:56:32 +01001170}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001171
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001173 * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001174 * @mtd: mtd info structure
1175 * @chip: nand chip info structure
1176 * @data_offs: offset of requested data within the page
1177 * @readlen: data length
1178 * @bufpoi: buffer to store read data
Alexey Korolev3d459552008-05-15 17:23:18 +01001179 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001180static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1181 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
Alexey Korolev3d459552008-05-15 17:23:18 +01001182{
1183 int start_step, end_step, num_steps;
1184 uint32_t *eccpos = chip->ecc.layout->eccpos;
1185 uint8_t *p;
1186 int data_col_addr, i, gaps = 0;
1187 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1188 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001189 int index = 0;
Mike Dunn3f91e942012-04-25 12:06:09 -07001190 unsigned int max_bitflips = 0;
Alexey Korolev3d459552008-05-15 17:23:18 +01001191
Brian Norris7854d3f2011-06-23 14:12:08 -07001192 /* Column address within the page aligned to ECC size (256bytes) */
Alexey Korolev3d459552008-05-15 17:23:18 +01001193 start_step = data_offs / chip->ecc.size;
1194 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1195 num_steps = end_step - start_step + 1;
1196
Brian Norris8b6e50c2011-05-25 14:59:01 -07001197 /* Data size aligned to ECC ecc.size */
Alexey Korolev3d459552008-05-15 17:23:18 +01001198 datafrag_len = num_steps * chip->ecc.size;
1199 eccfrag_len = num_steps * chip->ecc.bytes;
1200
1201 data_col_addr = start_step * chip->ecc.size;
1202 /* If we read not a page aligned data */
1203 if (data_col_addr != 0)
1204 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1205
1206 p = bufpoi + data_col_addr;
1207 chip->read_buf(mtd, p, datafrag_len);
1208
Brian Norris8b6e50c2011-05-25 14:59:01 -07001209 /* Calculate ECC */
Alexey Korolev3d459552008-05-15 17:23:18 +01001210 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1211 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1212
Brian Norris8b6e50c2011-05-25 14:59:01 -07001213 /*
1214 * The performance is faster if we position offsets according to
Brian Norris7854d3f2011-06-23 14:12:08 -07001215 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
Brian Norris8b6e50c2011-05-25 14:59:01 -07001216 */
Alexey Korolev3d459552008-05-15 17:23:18 +01001217 for (i = 0; i < eccfrag_len - 1; i++) {
1218 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1219 eccpos[i + start_step * chip->ecc.bytes + 1]) {
1220 gaps = 1;
1221 break;
1222 }
1223 }
1224 if (gaps) {
1225 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1226 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1227 } else {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001228 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07001229 * Send the command to read the particular ECC bytes take care
Brian Norris8b6e50c2011-05-25 14:59:01 -07001230 * about buswidth alignment in read_buf.
1231 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001232 index = start_step * chip->ecc.bytes;
1233
1234 aligned_pos = eccpos[index] & ~(busw - 1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001235 aligned_len = eccfrag_len;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001236 if (eccpos[index] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001237 aligned_len++;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001238 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001239 aligned_len++;
1240
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001241 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
1242 mtd->writesize + aligned_pos, -1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001243 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1244 }
1245
1246 for (i = 0; i < eccfrag_len; i++)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001247 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Alexey Korolev3d459552008-05-15 17:23:18 +01001248
1249 p = bufpoi + data_col_addr;
1250 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1251 int stat;
1252
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001253 stat = chip->ecc.correct(mtd, p,
1254 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001255 if (stat < 0) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001256 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001257 } else {
Alexey Korolev3d459552008-05-15 17:23:18 +01001258 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001259 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1260 }
Alexey Korolev3d459552008-05-15 17:23:18 +01001261 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001262 return max_bitflips;
Alexey Korolev3d459552008-05-15 17:23:18 +01001263}
1264
1265/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001266 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001267 * @mtd: mtd info structure
1268 * @chip: nand chip info structure
1269 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001270 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001271 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001272 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001273 * Not for syndrome calculating ECC controllers which need a special oob layout.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001274 */
1275static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001276 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001277{
1278 int i, eccsize = chip->ecc.size;
1279 int eccbytes = chip->ecc.bytes;
1280 int eccsteps = chip->ecc.steps;
1281 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001282 uint8_t *ecc_calc = chip->buffers->ecccalc;
1283 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001284 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001285 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001286
1287 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1288 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1289 chip->read_buf(mtd, p, eccsize);
1290 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1291 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001292 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001293
1294 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001295 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001296
1297 eccsteps = chip->ecc.steps;
1298 p = buf;
1299
1300 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1301 int stat;
1302
1303 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001304 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001305 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001306 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001307 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001308 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1309 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001310 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001311 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001312}
1313
1314/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001315 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
Brian Norris8b6e50c2011-05-25 14:59:01 -07001316 * @mtd: mtd info structure
1317 * @chip: nand chip info structure
1318 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001319 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001320 * @page: page number to read
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001321 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001322 * Hardware ECC for large page chips, require OOB to be read first. For this
1323 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1324 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1325 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1326 * the data area, by overwriting the NAND manufacturer bad block markings.
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001327 */
1328static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001329 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001330{
1331 int i, eccsize = chip->ecc.size;
1332 int eccbytes = chip->ecc.bytes;
1333 int eccsteps = chip->ecc.steps;
1334 uint8_t *p = buf;
1335 uint8_t *ecc_code = chip->buffers->ecccode;
1336 uint32_t *eccpos = chip->ecc.layout->eccpos;
1337 uint8_t *ecc_calc = chip->buffers->ecccalc;
Mike Dunn3f91e942012-04-25 12:06:09 -07001338 unsigned int max_bitflips = 0;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001339
1340 /* Read the OOB area first */
1341 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1342 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1343 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1344
1345 for (i = 0; i < chip->ecc.total; i++)
1346 ecc_code[i] = chip->oob_poi[eccpos[i]];
1347
1348 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1349 int stat;
1350
1351 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1352 chip->read_buf(mtd, p, eccsize);
1353 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1354
1355 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Mike Dunn3f91e942012-04-25 12:06:09 -07001356 if (stat < 0) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001357 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001358 } else {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001359 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001360 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1361 }
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001362 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001363 return max_bitflips;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001364}
1365
1366/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001367 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
Brian Norris8b6e50c2011-05-25 14:59:01 -07001368 * @mtd: mtd info structure
1369 * @chip: nand chip info structure
1370 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001371 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001372 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001373 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001374 * The hw generator calculates the error syndrome automatically. Therefore we
1375 * need a special oob layout and handling.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001376 */
1377static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001378 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001379{
1380 int i, eccsize = chip->ecc.size;
1381 int eccbytes = chip->ecc.bytes;
1382 int eccsteps = chip->ecc.steps;
1383 uint8_t *p = buf;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001384 uint8_t *oob = chip->oob_poi;
Mike Dunn3f91e942012-04-25 12:06:09 -07001385 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001386
1387 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1388 int stat;
1389
1390 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1391 chip->read_buf(mtd, p, eccsize);
1392
1393 if (chip->ecc.prepad) {
1394 chip->read_buf(mtd, oob, chip->ecc.prepad);
1395 oob += chip->ecc.prepad;
1396 }
1397
1398 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1399 chip->read_buf(mtd, oob, eccbytes);
1400 stat = chip->ecc.correct(mtd, p, oob, NULL);
1401
Mike Dunn3f91e942012-04-25 12:06:09 -07001402 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001403 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001404 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001405 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001406 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1407 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001408
1409 oob += eccbytes;
1410
1411 if (chip->ecc.postpad) {
1412 chip->read_buf(mtd, oob, chip->ecc.postpad);
1413 oob += chip->ecc.postpad;
1414 }
1415 }
1416
1417 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04001418 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001419 if (i)
1420 chip->read_buf(mtd, oob, i);
1421
Mike Dunn3f91e942012-04-25 12:06:09 -07001422 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001423}
1424
1425/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001426 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -07001427 * @chip: nand chip structure
1428 * @oob: oob destination address
1429 * @ops: oob ops structure
1430 * @len: size of oob to transfer
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001431 */
1432static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
Vitaly Wool70145682006-11-03 18:20:38 +03001433 struct mtd_oob_ops *ops, size_t len)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001434{
Florian Fainellif8ac0412010-09-07 13:23:43 +02001435 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001436
Brian Norris0612b9d2011-08-30 18:45:40 -07001437 case MTD_OPS_PLACE_OOB:
1438 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001439 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1440 return oob + len;
1441
Brian Norris0612b9d2011-08-30 18:45:40 -07001442 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001443 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001444 uint32_t boffs = 0, roffs = ops->ooboffs;
1445 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001446
Florian Fainellif8ac0412010-09-07 13:23:43 +02001447 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001448 /* Read request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001449 if (unlikely(roffs)) {
1450 if (roffs >= free->length) {
1451 roffs -= free->length;
1452 continue;
1453 }
1454 boffs = free->offset + roffs;
1455 bytes = min_t(size_t, len,
1456 (free->length - roffs));
1457 roffs = 0;
1458 } else {
1459 bytes = min_t(size_t, len, free->length);
1460 boffs = free->offset;
1461 }
1462 memcpy(oob, chip->oob_poi + boffs, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001463 oob += bytes;
1464 }
1465 return oob;
1466 }
1467 default:
1468 BUG();
1469 }
1470 return NULL;
1471}
1472
1473/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001474 * nand_do_read_ops - [INTERN] Read data with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001475 * @mtd: MTD device structure
1476 * @from: offset to read from
1477 * @ops: oob ops structure
David A. Marlin068e3c02005-01-24 03:07:46 +00001478 *
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001479 * Internal function. Called with chip held.
David A. Marlin068e3c02005-01-24 03:07:46 +00001480 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001481static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1482 struct mtd_oob_ops *ops)
David A. Marlin068e3c02005-01-24 03:07:46 +00001483{
Brian Norrise47f3db2012-05-02 10:14:56 -07001484 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001485 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001486 struct mtd_ecc_stats stats;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001487 int ret = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001488 uint32_t readlen = ops->len;
Vitaly Wool70145682006-11-03 18:20:38 +03001489 uint32_t oobreadlen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07001490 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky9aca3342010-02-22 20:39:35 +02001491 mtd->oobavail : mtd->oobsize;
1492
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001493 uint8_t *bufpoi, *oob, *buf;
Mike Dunnedbc45402012-04-25 12:06:11 -07001494 unsigned int max_bitflips = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001495
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001496 stats = mtd->ecc_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001497
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001498 chipnr = (int)(from >> chip->chip_shift);
1499 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001500
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001501 realpage = (int)(from >> chip->page_shift);
1502 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001504 col = (int)(from & (mtd->writesize - 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001505
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001506 buf = ops->datbuf;
1507 oob = ops->oobbuf;
Brian Norrise47f3db2012-05-02 10:14:56 -07001508 oob_required = oob ? 1 : 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001509
Florian Fainellif8ac0412010-09-07 13:23:43 +02001510 while (1) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001511 bytes = min(mtd->writesize - col, readlen);
1512 aligned = (bytes == mtd->writesize);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001513
Brian Norris8b6e50c2011-05-25 14:59:01 -07001514 /* Is the current page in the buffer? */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001515 if (realpage != chip->pagebuf || oob) {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001516 bufpoi = aligned ? buf : chip->buffers->databuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001517
Brian Norrisc00a0992012-05-01 17:12:54 -07001518 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001519
Mike Dunnedbc45402012-04-25 12:06:11 -07001520 /*
1521 * Now read the page into the buffer. Absent an error,
1522 * the read methods return max bitflips per ecc step.
1523 */
Brian Norris0612b9d2011-08-30 18:45:40 -07001524 if (unlikely(ops->mode == MTD_OPS_RAW))
Brian Norris1fbb9382012-05-02 10:14:55 -07001525 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001526 oob_required,
1527 page);
Alexey Korolev3d459552008-05-15 17:23:18 +01001528 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001529 ret = chip->ecc.read_subpage(mtd, chip,
1530 col, bytes, bufpoi);
David Woodhouse956e9442006-09-25 17:12:39 +01001531 else
Sneha Narnakaje46a8cf22009-09-18 12:51:46 -07001532 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001533 oob_required, page);
Brian Norris6d77b9d2011-09-07 13:13:40 -07001534 if (ret < 0) {
1535 if (!aligned)
1536 /* Invalidate page cache */
1537 chip->pagebuf = -1;
David Woodhousee0c7d762006-05-13 18:07:53 +01001538 break;
Brian Norris6d77b9d2011-09-07 13:13:40 -07001539 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001540
Mike Dunnedbc45402012-04-25 12:06:11 -07001541 max_bitflips = max_t(unsigned int, max_bitflips, ret);
1542
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001543 /* Transfer not aligned data */
1544 if (!aligned) {
Artem Bityutskiyc1194c72010-09-03 22:01:16 +03001545 if (!NAND_SUBPAGE_READ(chip) && !oob &&
Brian Norris6d77b9d2011-09-07 13:13:40 -07001546 !(mtd->ecc_stats.failed - stats.failed) &&
Mike Dunnedbc45402012-04-25 12:06:11 -07001547 (ops->mode != MTD_OPS_RAW)) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001548 chip->pagebuf = realpage;
Mike Dunnedbc45402012-04-25 12:06:11 -07001549 chip->pagebuf_bitflips = ret;
1550 } else {
Brian Norris6d77b9d2011-09-07 13:13:40 -07001551 /* Invalidate page cache */
1552 chip->pagebuf = -1;
Mike Dunnedbc45402012-04-25 12:06:11 -07001553 }
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001554 memcpy(buf, chip->buffers->databuf + col, bytes);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001555 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001556
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001557 buf += bytes;
1558
1559 if (unlikely(oob)) {
Maxim Levitskyb64d39d2010-02-22 20:39:37 +02001560 int toread = min(oobreadlen, max_oobsize);
1561
1562 if (toread) {
1563 oob = nand_transfer_oob(chip,
1564 oob, ops, toread);
1565 oobreadlen -= toread;
1566 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001567 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001568 } else {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001569 memcpy(buf, chip->buffers->databuf + col, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001570 buf += bytes;
Mike Dunnedbc45402012-04-25 12:06:11 -07001571 max_bitflips = max_t(unsigned int, max_bitflips,
1572 chip->pagebuf_bitflips);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001573 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001574
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001575 readlen -= bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001576
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001577 if (!readlen)
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001578 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001579
Brian Norris8b6e50c2011-05-25 14:59:01 -07001580 /* For subsequent reads align to page boundary */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001581 col = 0;
1582 /* Increment page address */
1583 realpage++;
1584
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001585 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001586 /* Check, if we cross a chip boundary */
1587 if (!page) {
1588 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001589 chip->select_chip(mtd, -1);
1590 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001591 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001592 }
1593
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001594 ops->retlen = ops->len - (size_t) readlen;
Vitaly Wool70145682006-11-03 18:20:38 +03001595 if (oob)
1596 ops->oobretlen = ops->ooblen - oobreadlen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001597
Mike Dunn3f91e942012-04-25 12:06:09 -07001598 if (ret < 0)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001599 return ret;
1600
Thomas Gleixner9a1fcdf2006-05-29 14:56:39 +02001601 if (mtd->ecc_stats.failed - stats.failed)
1602 return -EBADMSG;
1603
Mike Dunnedbc45402012-04-25 12:06:11 -07001604 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001605}
1606
1607/**
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001608 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001609 * @mtd: MTD device structure
1610 * @from: offset to read from
1611 * @len: number of bytes to read
1612 * @retlen: pointer to variable to store the number of read bytes
1613 * @buf: the databuffer to put data
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001614 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001615 * Get hold of the chip and call nand_do_read.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001616 */
1617static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1618 size_t *retlen, uint8_t *buf)
1619{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001620 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07001621 struct mtd_oob_ops ops;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001622 int ret;
1623
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001624 nand_get_device(chip, mtd, FL_READING);
Brian Norris4a89ff82011-08-30 18:45:45 -07001625 ops.len = len;
1626 ops.datbuf = buf;
1627 ops.oobbuf = NULL;
Brian Norris23b1a992011-10-14 20:09:33 -07001628 ops.mode = 0;
Brian Norris4a89ff82011-08-30 18:45:45 -07001629 ret = nand_do_read_ops(mtd, from, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07001630 *retlen = ops.retlen;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001631 nand_release_device(mtd);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001632 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001633}
1634
1635/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001636 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001637 * @mtd: mtd info structure
1638 * @chip: nand chip info structure
1639 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001640 */
1641static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001642 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001643{
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001644 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001645 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001646 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001647}
1648
1649/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001650 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001651 * with syndromes
Brian Norris8b6e50c2011-05-25 14:59:01 -07001652 * @mtd: mtd info structure
1653 * @chip: nand chip info structure
1654 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001655 */
1656static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001657 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001658{
1659 uint8_t *buf = chip->oob_poi;
1660 int length = mtd->oobsize;
1661 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1662 int eccsize = chip->ecc.size;
1663 uint8_t *bufpoi = buf;
1664 int i, toread, sndrnd = 0, pos;
1665
1666 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1667 for (i = 0; i < chip->ecc.steps; i++) {
1668 if (sndrnd) {
1669 pos = eccsize + i * (eccsize + chunk);
1670 if (mtd->writesize > 512)
1671 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1672 else
1673 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1674 } else
1675 sndrnd = 1;
1676 toread = min_t(int, length, chunk);
1677 chip->read_buf(mtd, bufpoi, toread);
1678 bufpoi += toread;
1679 length -= toread;
1680 }
1681 if (length > 0)
1682 chip->read_buf(mtd, bufpoi, length);
1683
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001684 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001685}
1686
1687/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001688 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001689 * @mtd: mtd info structure
1690 * @chip: nand chip info structure
1691 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001692 */
1693static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1694 int page)
1695{
1696 int status = 0;
1697 const uint8_t *buf = chip->oob_poi;
1698 int length = mtd->oobsize;
1699
1700 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1701 chip->write_buf(mtd, buf, length);
1702 /* Send command to program the OOB data */
1703 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1704
1705 status = chip->waitfunc(mtd, chip);
1706
Savin Zlobec0d420f92006-06-21 11:51:20 +02001707 return status & NAND_STATUS_FAIL ? -EIO : 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001708}
1709
1710/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001711 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001712 * with syndrome - only for large page flash
1713 * @mtd: mtd info structure
1714 * @chip: nand chip info structure
1715 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001716 */
1717static int nand_write_oob_syndrome(struct mtd_info *mtd,
1718 struct nand_chip *chip, int page)
1719{
1720 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1721 int eccsize = chip->ecc.size, length = mtd->oobsize;
1722 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1723 const uint8_t *bufpoi = chip->oob_poi;
1724
1725 /*
1726 * data-ecc-data-ecc ... ecc-oob
1727 * or
1728 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1729 */
1730 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1731 pos = steps * (eccsize + chunk);
1732 steps = 0;
1733 } else
Vitaly Wool8b0036e2006-07-11 09:11:25 +02001734 pos = eccsize;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001735
1736 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1737 for (i = 0; i < steps; i++) {
1738 if (sndcmd) {
1739 if (mtd->writesize <= 512) {
1740 uint32_t fill = 0xFFFFFFFF;
1741
1742 len = eccsize;
1743 while (len > 0) {
1744 int num = min_t(int, len, 4);
1745 chip->write_buf(mtd, (uint8_t *)&fill,
1746 num);
1747 len -= num;
1748 }
1749 } else {
1750 pos = eccsize + i * (eccsize + chunk);
1751 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1752 }
1753 } else
1754 sndcmd = 1;
1755 len = min_t(int, length, chunk);
1756 chip->write_buf(mtd, bufpoi, len);
1757 bufpoi += len;
1758 length -= len;
1759 }
1760 if (length > 0)
1761 chip->write_buf(mtd, bufpoi, length);
1762
1763 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1764 status = chip->waitfunc(mtd, chip);
1765
1766 return status & NAND_STATUS_FAIL ? -EIO : 0;
1767}
1768
1769/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001770 * nand_do_read_oob - [INTERN] NAND read out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001771 * @mtd: MTD device structure
1772 * @from: offset to read from
1773 * @ops: oob operations description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001774 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001775 * NAND read out-of-band data from the spare area.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001776 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001777static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1778 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779{
Brian Norrisc00a0992012-05-01 17:12:54 -07001780 int page, realpage, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001781 struct nand_chip *chip = mtd->priv;
Brian Norris041e4572011-06-23 16:45:24 -07001782 struct mtd_ecc_stats stats;
Vitaly Wool70145682006-11-03 18:20:38 +03001783 int readlen = ops->ooblen;
1784 int len;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001785 uint8_t *buf = ops->oobbuf;
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001786 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001787
Brian Norris289c0522011-07-19 10:06:09 -07001788 pr_debug("%s: from = 0x%08Lx, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05301789 __func__, (unsigned long long)from, readlen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001790
Brian Norris041e4572011-06-23 16:45:24 -07001791 stats = mtd->ecc_stats;
1792
Brian Norris0612b9d2011-08-30 18:45:40 -07001793 if (ops->mode == MTD_OPS_AUTO_OOB)
Vitaly Wool70145682006-11-03 18:20:38 +03001794 len = chip->ecc.layout->oobavail;
Adrian Hunter03736152007-01-31 17:58:29 +02001795 else
1796 len = mtd->oobsize;
1797
1798 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001799 pr_debug("%s: attempt to start read outside oob\n",
1800 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001801 return -EINVAL;
1802 }
1803
1804 /* Do not allow reads past end of device */
1805 if (unlikely(from >= mtd->size ||
1806 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1807 (from >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001808 pr_debug("%s: attempt to read beyond end of device\n",
1809 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001810 return -EINVAL;
1811 }
Vitaly Wool70145682006-11-03 18:20:38 +03001812
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001813 chipnr = (int)(from >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001814 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001815
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001816 /* Shift to get page */
1817 realpage = (int)(from >> chip->page_shift);
1818 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001819
Florian Fainellif8ac0412010-09-07 13:23:43 +02001820 while (1) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001821 if (ops->mode == MTD_OPS_RAW)
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001822 ret = chip->ecc.read_oob_raw(mtd, chip, page);
Brian Norrisc46f6482011-08-30 18:45:38 -07001823 else
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001824 ret = chip->ecc.read_oob(mtd, chip, page);
1825
1826 if (ret < 0)
1827 break;
Vitaly Wool70145682006-11-03 18:20:38 +03001828
1829 len = min(len, readlen);
1830 buf = nand_transfer_oob(chip, buf, ops, len);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001831
Vitaly Wool70145682006-11-03 18:20:38 +03001832 readlen -= len;
Savin Zlobec0d420f92006-06-21 11:51:20 +02001833 if (!readlen)
1834 break;
1835
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001836 /* Increment page address */
1837 realpage++;
1838
1839 page = realpage & chip->pagemask;
1840 /* Check, if we cross a chip boundary */
1841 if (!page) {
1842 chipnr++;
1843 chip->select_chip(mtd, -1);
1844 chip->select_chip(mtd, chipnr);
1845 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846 }
1847
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001848 ops->oobretlen = ops->ooblen - readlen;
1849
1850 if (ret < 0)
1851 return ret;
Brian Norris041e4572011-06-23 16:45:24 -07001852
1853 if (mtd->ecc_stats.failed - stats.failed)
1854 return -EBADMSG;
1855
1856 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001857}
1858
1859/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001860 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001861 * @mtd: MTD device structure
1862 * @from: offset to read from
1863 * @ops: oob operation description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001864 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001865 * NAND read data and/or out-of-band data.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001866 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001867static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1868 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001869{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001870 struct nand_chip *chip = mtd->priv;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001871 int ret = -ENOTSUPP;
1872
1873 ops->retlen = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001874
1875 /* Do not allow reads past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03001876 if (ops->datbuf && (from + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07001877 pr_debug("%s: attempt to read beyond end of device\n",
1878 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001879 return -EINVAL;
1880 }
1881
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001882 nand_get_device(chip, mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001883
Florian Fainellif8ac0412010-09-07 13:23:43 +02001884 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001885 case MTD_OPS_PLACE_OOB:
1886 case MTD_OPS_AUTO_OOB:
1887 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001888 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001889
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001890 default:
1891 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001892 }
1893
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001894 if (!ops->datbuf)
1895 ret = nand_do_read_oob(mtd, from, ops);
1896 else
1897 ret = nand_do_read_ops(mtd, from, ops);
1898
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001899out:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001900 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001901 return ret;
1902}
1903
1904
1905/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001906 * nand_write_page_raw - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001907 * @mtd: mtd info structure
1908 * @chip: nand chip info structure
1909 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001910 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001911 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001912 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001913 */
1914static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001915 const uint8_t *buf, int oob_required)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001916{
1917 chip->write_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001918 if (oob_required)
1919 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001920}
1921
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001922/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001923 * nand_write_page_raw_syndrome - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001924 * @mtd: mtd info structure
1925 * @chip: nand chip info structure
1926 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001927 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001928 *
1929 * We need a special oob layout and handling even when ECC isn't checked.
1930 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001931static void nand_write_page_raw_syndrome(struct mtd_info *mtd,
1932 struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001933 const uint8_t *buf, int oob_required)
David Brownell52ff49d2009-03-04 12:01:36 -08001934{
1935 int eccsize = chip->ecc.size;
1936 int eccbytes = chip->ecc.bytes;
1937 uint8_t *oob = chip->oob_poi;
1938 int steps, size;
1939
1940 for (steps = chip->ecc.steps; steps > 0; steps--) {
1941 chip->write_buf(mtd, buf, eccsize);
1942 buf += eccsize;
1943
1944 if (chip->ecc.prepad) {
1945 chip->write_buf(mtd, oob, chip->ecc.prepad);
1946 oob += chip->ecc.prepad;
1947 }
1948
1949 chip->read_buf(mtd, oob, eccbytes);
1950 oob += eccbytes;
1951
1952 if (chip->ecc.postpad) {
1953 chip->write_buf(mtd, oob, chip->ecc.postpad);
1954 oob += chip->ecc.postpad;
1955 }
1956 }
1957
1958 size = mtd->oobsize - (oob - chip->oob_poi);
1959 if (size)
1960 chip->write_buf(mtd, oob, size);
1961}
1962/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001963 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001964 * @mtd: mtd info structure
1965 * @chip: nand chip info structure
1966 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001967 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001968 */
1969static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001970 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001971{
1972 int i, eccsize = chip->ecc.size;
1973 int eccbytes = chip->ecc.bytes;
1974 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001975 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001976 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001977 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001978
Brian Norris7854d3f2011-06-23 14:12:08 -07001979 /* Software ECC calculation */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001980 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1981 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001982
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001983 for (i = 0; i < chip->ecc.total; i++)
1984 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001985
Brian Norris1fbb9382012-05-02 10:14:55 -07001986 chip->ecc.write_page_raw(mtd, chip, buf, 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001987}
1988
1989/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001990 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001991 * @mtd: mtd info structure
1992 * @chip: nand chip info structure
1993 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001994 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001995 */
1996static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001997 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001998{
1999 int i, eccsize = chip->ecc.size;
2000 int eccbytes = chip->ecc.bytes;
2001 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01002002 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002003 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01002004 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002005
2006 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2007 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
David Woodhouse29da9ce2006-05-26 23:05:44 +01002008 chip->write_buf(mtd, p, eccsize);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002009 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
2010 }
2011
2012 for (i = 0; i < chip->ecc.total; i++)
2013 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2014
2015 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
2016}
2017
2018/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002019 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
Brian Norris8b6e50c2011-05-25 14:59:01 -07002020 * @mtd: mtd info structure
2021 * @chip: nand chip info structure
2022 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07002023 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002024 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002025 * The hw generator calculates the error syndrome automatically. Therefore we
2026 * need a special oob layout and handling.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002027 */
2028static void nand_write_page_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07002029 struct nand_chip *chip,
2030 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002031{
2032 int i, eccsize = chip->ecc.size;
2033 int eccbytes = chip->ecc.bytes;
2034 int eccsteps = chip->ecc.steps;
2035 const uint8_t *p = buf;
2036 uint8_t *oob = chip->oob_poi;
2037
2038 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2039
2040 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2041 chip->write_buf(mtd, p, eccsize);
2042
2043 if (chip->ecc.prepad) {
2044 chip->write_buf(mtd, oob, chip->ecc.prepad);
2045 oob += chip->ecc.prepad;
2046 }
2047
2048 chip->ecc.calculate(mtd, p, oob);
2049 chip->write_buf(mtd, oob, eccbytes);
2050 oob += eccbytes;
2051
2052 if (chip->ecc.postpad) {
2053 chip->write_buf(mtd, oob, chip->ecc.postpad);
2054 oob += chip->ecc.postpad;
2055 }
2056 }
2057
2058 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04002059 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002060 if (i)
2061 chip->write_buf(mtd, oob, i);
2062}
2063
2064/**
David Woodhouse956e9442006-09-25 17:12:39 +01002065 * nand_write_page - [REPLACEABLE] write one page
Brian Norris8b6e50c2011-05-25 14:59:01 -07002066 * @mtd: MTD device structure
2067 * @chip: NAND chip descriptor
2068 * @buf: the data to write
Brian Norris1fbb9382012-05-02 10:14:55 -07002069 * @oob_required: must write chip->oob_poi to OOB
Brian Norris8b6e50c2011-05-25 14:59:01 -07002070 * @page: page number to write
2071 * @cached: cached programming
2072 * @raw: use _raw version of write_page
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002073 */
2074static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07002075 const uint8_t *buf, int oob_required, int page,
2076 int cached, int raw)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002077{
2078 int status;
2079
2080 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
2081
David Woodhouse956e9442006-09-25 17:12:39 +01002082 if (unlikely(raw))
Brian Norris1fbb9382012-05-02 10:14:55 -07002083 chip->ecc.write_page_raw(mtd, chip, buf, oob_required);
David Woodhouse956e9442006-09-25 17:12:39 +01002084 else
Brian Norris1fbb9382012-05-02 10:14:55 -07002085 chip->ecc.write_page(mtd, chip, buf, oob_required);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002086
2087 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07002088 * Cached progamming disabled for now. Not sure if it's worth the
Brian Norris8b6e50c2011-05-25 14:59:01 -07002089 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002090 */
2091 cached = 0;
2092
2093 if (!cached || !(chip->options & NAND_CACHEPRG)) {
2094
2095 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002096 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002097 /*
2098 * See if operation failed and additional status checks are
Brian Norris8b6e50c2011-05-25 14:59:01 -07002099 * available.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002100 */
2101 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2102 status = chip->errstat(mtd, chip, FL_WRITING, status,
2103 page);
2104
2105 if (status & NAND_STATUS_FAIL)
2106 return -EIO;
2107 } else {
2108 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002109 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002110 }
2111
2112#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
2113 /* Send command to read back the data */
2114 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
2115
2116 if (chip->verify_buf(mtd, buf, mtd->writesize))
2117 return -EIO;
Bastian Hecht09cbe582012-04-27 12:19:31 +02002118
2119 /* Make sure the next page prog is preceded by a status read */
2120 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002121#endif
2122 return 0;
2123}
2124
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002125/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002126 * nand_fill_oob - [INTERN] Transfer client buffer to oob
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002127 * @mtd: MTD device structure
Brian Norris8b6e50c2011-05-25 14:59:01 -07002128 * @oob: oob data buffer
2129 * @len: oob data write length
2130 * @ops: oob ops structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002131 */
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002132static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
2133 struct mtd_oob_ops *ops)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002134{
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002135 struct nand_chip *chip = mtd->priv;
2136
2137 /*
2138 * Initialise to all 0xFF, to avoid the possibility of left over OOB
2139 * data from a previous OOB read.
2140 */
2141 memset(chip->oob_poi, 0xff, mtd->oobsize);
2142
Florian Fainellif8ac0412010-09-07 13:23:43 +02002143 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002144
Brian Norris0612b9d2011-08-30 18:45:40 -07002145 case MTD_OPS_PLACE_OOB:
2146 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002147 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
2148 return oob + len;
2149
Brian Norris0612b9d2011-08-30 18:45:40 -07002150 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002151 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002152 uint32_t boffs = 0, woffs = ops->ooboffs;
2153 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002154
Florian Fainellif8ac0412010-09-07 13:23:43 +02002155 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002156 /* Write request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002157 if (unlikely(woffs)) {
2158 if (woffs >= free->length) {
2159 woffs -= free->length;
2160 continue;
2161 }
2162 boffs = free->offset + woffs;
2163 bytes = min_t(size_t, len,
2164 (free->length - woffs));
2165 woffs = 0;
2166 } else {
2167 bytes = min_t(size_t, len, free->length);
2168 boffs = free->offset;
2169 }
Vitaly Wool8b0036e2006-07-11 09:11:25 +02002170 memcpy(chip->oob_poi + boffs, oob, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002171 oob += bytes;
2172 }
2173 return oob;
2174 }
2175 default:
2176 BUG();
2177 }
2178 return NULL;
2179}
2180
Florian Fainellif8ac0412010-09-07 13:23:43 +02002181#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002182
2183/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002184 * nand_do_write_ops - [INTERN] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002185 * @mtd: MTD device structure
2186 * @to: offset to write to
2187 * @ops: oob operations description structure
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002188 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002189 * NAND write with ECC.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002190 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002191static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2192 struct mtd_oob_ops *ops)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002193{
Thomas Gleixner29072b92006-09-28 15:38:36 +02002194 int chipnr, realpage, page, blockmask, column;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002195 struct nand_chip *chip = mtd->priv;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002196 uint32_t writelen = ops->len;
Maxim Levitsky782ce792010-02-22 20:39:36 +02002197
2198 uint32_t oobwritelen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07002199 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky782ce792010-02-22 20:39:36 +02002200 mtd->oobavail : mtd->oobsize;
2201
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002202 uint8_t *oob = ops->oobbuf;
2203 uint8_t *buf = ops->datbuf;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002204 int ret, subpage;
Brian Norrise47f3db2012-05-02 10:14:56 -07002205 int oob_required = oob ? 1 : 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002206
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002207 ops->retlen = 0;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002208 if (!writelen)
2209 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002210
Brian Norris8b6e50c2011-05-25 14:59:01 -07002211 /* Reject writes, which are not page aligned */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002212 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002213 pr_notice("%s: attempt to write non page aligned data\n",
2214 __func__);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002215 return -EINVAL;
2216 }
2217
Thomas Gleixner29072b92006-09-28 15:38:36 +02002218 column = to & (mtd->writesize - 1);
2219 subpage = column || (writelen & (mtd->writesize - 1));
2220
2221 if (subpage && oob)
2222 return -EINVAL;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002223
Thomas Gleixner6a930962006-06-28 00:11:45 +02002224 chipnr = (int)(to >> chip->chip_shift);
2225 chip->select_chip(mtd, chipnr);
2226
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002227 /* Check, if it is write protected */
2228 if (nand_check_wp(mtd))
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002229 return -EIO;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002230
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002231 realpage = (int)(to >> chip->page_shift);
2232 page = realpage & chip->pagemask;
2233 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
2234
2235 /* Invalidate the page cache, when we write to the cached page */
2236 if (to <= (chip->pagebuf << chip->page_shift) &&
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002237 (chip->pagebuf << chip->page_shift) < (to + ops->len))
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002238 chip->pagebuf = -1;
2239
Maxim Levitsky782ce792010-02-22 20:39:36 +02002240 /* Don't allow multipage oob writes with offset */
Jon Poveycdcf12b2010-09-30 20:41:34 +09002241 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen))
Maxim Levitsky782ce792010-02-22 20:39:36 +02002242 return -EINVAL;
2243
Florian Fainellif8ac0412010-09-07 13:23:43 +02002244 while (1) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02002245 int bytes = mtd->writesize;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002246 int cached = writelen > bytes && page != blockmask;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002247 uint8_t *wbuf = buf;
2248
Brian Norris8b6e50c2011-05-25 14:59:01 -07002249 /* Partial page write? */
Thomas Gleixner29072b92006-09-28 15:38:36 +02002250 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2251 cached = 0;
2252 bytes = min_t(int, bytes - column, (int) writelen);
2253 chip->pagebuf = -1;
2254 memset(chip->buffers->databuf, 0xff, mtd->writesize);
2255 memcpy(&chip->buffers->databuf[column], buf, bytes);
2256 wbuf = chip->buffers->databuf;
2257 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002258
Maxim Levitsky782ce792010-02-22 20:39:36 +02002259 if (unlikely(oob)) {
2260 size_t len = min(oobwritelen, oobmaxlen);
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002261 oob = nand_fill_oob(mtd, oob, len, ops);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002262 oobwritelen -= len;
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002263 } else {
2264 /* We still need to erase leftover OOB data */
2265 memset(chip->oob_poi, 0xff, mtd->oobsize);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002266 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002267
Brian Norrise47f3db2012-05-02 10:14:56 -07002268 ret = chip->write_page(mtd, chip, wbuf, oob_required, page,
2269 cached, (ops->mode == MTD_OPS_RAW));
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002270 if (ret)
2271 break;
2272
2273 writelen -= bytes;
2274 if (!writelen)
2275 break;
2276
Thomas Gleixner29072b92006-09-28 15:38:36 +02002277 column = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002278 buf += bytes;
2279 realpage++;
2280
2281 page = realpage & chip->pagemask;
2282 /* Check, if we cross a chip boundary */
2283 if (!page) {
2284 chipnr++;
2285 chip->select_chip(mtd, -1);
2286 chip->select_chip(mtd, chipnr);
2287 }
2288 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002289
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002290 ops->retlen = ops->len - writelen;
Vitaly Wool70145682006-11-03 18:20:38 +03002291 if (unlikely(oob))
2292 ops->oobretlen = ops->ooblen;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002293 return ret;
2294}
2295
2296/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002297 * panic_nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002298 * @mtd: MTD device structure
2299 * @to: offset to write to
2300 * @len: number of bytes to write
2301 * @retlen: pointer to variable to store the number of written bytes
2302 * @buf: the data to write
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002303 *
2304 * NAND write with ECC. Used when performing writes in interrupt context, this
2305 * may for example be called by mtdoops when writing an oops while in panic.
2306 */
2307static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2308 size_t *retlen, const uint8_t *buf)
2309{
2310 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07002311 struct mtd_oob_ops ops;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002312 int ret;
2313
Brian Norris8b6e50c2011-05-25 14:59:01 -07002314 /* Wait for the device to get ready */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002315 panic_nand_wait(mtd, chip, 400);
2316
Brian Norris8b6e50c2011-05-25 14:59:01 -07002317 /* Grab the device */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002318 panic_nand_get_device(chip, mtd, FL_WRITING);
2319
Brian Norris4a89ff82011-08-30 18:45:45 -07002320 ops.len = len;
2321 ops.datbuf = (uint8_t *)buf;
2322 ops.oobbuf = NULL;
Brian Norris23b1a992011-10-14 20:09:33 -07002323 ops.mode = 0;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002324
Brian Norris4a89ff82011-08-30 18:45:45 -07002325 ret = nand_do_write_ops(mtd, to, &ops);
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002326
Brian Norris4a89ff82011-08-30 18:45:45 -07002327 *retlen = ops.retlen;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002328 return ret;
2329}
2330
2331/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002332 * nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002333 * @mtd: MTD device structure
2334 * @to: offset to write to
2335 * @len: number of bytes to write
2336 * @retlen: pointer to variable to store the number of written bytes
2337 * @buf: the data to write
Linus Torvalds1da177e2005-04-16 15:20:36 -07002338 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002339 * NAND write with ECC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002340 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002341static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002342 size_t *retlen, const uint8_t *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002343{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002344 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07002345 struct mtd_oob_ops ops;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002346 int ret;
2347
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002348 nand_get_device(chip, mtd, FL_WRITING);
Brian Norris4a89ff82011-08-30 18:45:45 -07002349 ops.len = len;
2350 ops.datbuf = (uint8_t *)buf;
2351 ops.oobbuf = NULL;
Brian Norris23b1a992011-10-14 20:09:33 -07002352 ops.mode = 0;
Brian Norris4a89ff82011-08-30 18:45:45 -07002353 ret = nand_do_write_ops(mtd, to, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07002354 *retlen = ops.retlen;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002355 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002356 return ret;
2357}
2358
2359/**
2360 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002361 * @mtd: MTD device structure
2362 * @to: offset to write to
2363 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002364 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002365 * NAND write out-of-band.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002366 */
2367static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2368 struct mtd_oob_ops *ops)
2369{
Adrian Hunter03736152007-01-31 17:58:29 +02002370 int chipnr, page, status, len;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002371 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002372
Brian Norris289c0522011-07-19 10:06:09 -07002373 pr_debug("%s: to = 0x%08x, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05302374 __func__, (unsigned int)to, (int)ops->ooblen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002375
Brian Norris0612b9d2011-08-30 18:45:40 -07002376 if (ops->mode == MTD_OPS_AUTO_OOB)
Adrian Hunter03736152007-01-31 17:58:29 +02002377 len = chip->ecc.layout->oobavail;
2378 else
2379 len = mtd->oobsize;
2380
Linus Torvalds1da177e2005-04-16 15:20:36 -07002381 /* Do not allow write past end of page */
Adrian Hunter03736152007-01-31 17:58:29 +02002382 if ((ops->ooboffs + ops->ooblen) > len) {
Brian Norris289c0522011-07-19 10:06:09 -07002383 pr_debug("%s: attempt to write past end of page\n",
2384 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002385 return -EINVAL;
2386 }
2387
Adrian Hunter03736152007-01-31 17:58:29 +02002388 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002389 pr_debug("%s: attempt to start write outside oob\n",
2390 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002391 return -EINVAL;
2392 }
2393
Jason Liu775adc3d42011-02-25 13:06:18 +08002394 /* Do not allow write past end of device */
Adrian Hunter03736152007-01-31 17:58:29 +02002395 if (unlikely(to >= mtd->size ||
2396 ops->ooboffs + ops->ooblen >
2397 ((mtd->size >> chip->page_shift) -
2398 (to >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002399 pr_debug("%s: attempt to write beyond end of device\n",
2400 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002401 return -EINVAL;
2402 }
2403
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002404 chipnr = (int)(to >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002405 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002406
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002407 /* Shift to get page */
2408 page = (int)(to >> chip->page_shift);
2409
2410 /*
2411 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2412 * of my DiskOnChip 2000 test units) will clear the whole data page too
2413 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2414 * it in the doc2000 driver in August 1999. dwmw2.
2415 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002416 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002417
2418 /* Check, if it is write protected */
2419 if (nand_check_wp(mtd))
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002420 return -EROFS;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002421
Linus Torvalds1da177e2005-04-16 15:20:36 -07002422 /* Invalidate the page cache, if we write to the cached page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002423 if (page == chip->pagebuf)
2424 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002425
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002426 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
Brian Norris9ce244b2011-08-30 18:45:37 -07002427
Brian Norris0612b9d2011-08-30 18:45:40 -07002428 if (ops->mode == MTD_OPS_RAW)
Brian Norris9ce244b2011-08-30 18:45:37 -07002429 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
2430 else
2431 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002432
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002433 if (status)
2434 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002435
Vitaly Wool70145682006-11-03 18:20:38 +03002436 ops->oobretlen = ops->ooblen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002437
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002438 return 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002439}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002440
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002441/**
2442 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002443 * @mtd: MTD device structure
2444 * @to: offset to write to
2445 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002446 */
2447static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2448 struct mtd_oob_ops *ops)
2449{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002450 struct nand_chip *chip = mtd->priv;
2451 int ret = -ENOTSUPP;
2452
2453 ops->retlen = 0;
2454
2455 /* Do not allow writes past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03002456 if (ops->datbuf && (to + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07002457 pr_debug("%s: attempt to write beyond end of device\n",
2458 __func__);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002459 return -EINVAL;
2460 }
2461
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002462 nand_get_device(chip, mtd, FL_WRITING);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002463
Florian Fainellif8ac0412010-09-07 13:23:43 +02002464 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07002465 case MTD_OPS_PLACE_OOB:
2466 case MTD_OPS_AUTO_OOB:
2467 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002468 break;
2469
2470 default:
2471 goto out;
2472 }
2473
2474 if (!ops->datbuf)
2475 ret = nand_do_write_oob(mtd, to, ops);
2476 else
2477 ret = nand_do_write_ops(mtd, to, ops);
2478
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002479out:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002480 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002481 return ret;
2482}
2483
Linus Torvalds1da177e2005-04-16 15:20:36 -07002484/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002485 * single_erase_cmd - [GENERIC] NAND standard block erase command function
Brian Norris8b6e50c2011-05-25 14:59:01 -07002486 * @mtd: MTD device structure
2487 * @page: the page address of the block which will be erased
Linus Torvalds1da177e2005-04-16 15:20:36 -07002488 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002489 * Standard erase command for NAND chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002490 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002491static void single_erase_cmd(struct mtd_info *mtd, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002492{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002493 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002494 /* Send commands to erase a block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002495 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2496 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002497}
2498
2499/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002500 * multi_erase_cmd - [GENERIC] AND specific block erase command function
Brian Norris8b6e50c2011-05-25 14:59:01 -07002501 * @mtd: MTD device structure
2502 * @page: the page address of the block which will be erased
Linus Torvalds1da177e2005-04-16 15:20:36 -07002503 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002504 * AND multi block erase command function. Erase 4 consecutive blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002505 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002506static void multi_erase_cmd(struct mtd_info *mtd, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002508 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002509 /* Send commands to erase a block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002510 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2511 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2512 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2513 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2514 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002515}
2516
2517/**
2518 * nand_erase - [MTD Interface] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002519 * @mtd: MTD device structure
2520 * @instr: erase instruction
Linus Torvalds1da177e2005-04-16 15:20:36 -07002521 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002522 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002523 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002524static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002525{
David Woodhousee0c7d762006-05-13 18:07:53 +01002526 return nand_erase_nand(mtd, instr, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002527}
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002528
David A. Marlin30f464b2005-01-17 18:35:25 +00002529#define BBT_PAGE_MASK 0xffffff3f
Linus Torvalds1da177e2005-04-16 15:20:36 -07002530/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002531 * nand_erase_nand - [INTERN] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002532 * @mtd: MTD device structure
2533 * @instr: erase instruction
2534 * @allowbbt: allow erasing the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -07002535 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002536 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002537 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002538int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2539 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002540{
Adrian Hunter69423d92008-12-10 13:37:21 +00002541 int page, status, pages_per_block, ret, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002542 struct nand_chip *chip = mtd->priv;
Florian Fainellif8ac0412010-09-07 13:23:43 +02002543 loff_t rewrite_bbt[NAND_MAX_CHIPS] = {0};
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002544 unsigned int bbt_masked_page = 0xffffffff;
Adrian Hunter69423d92008-12-10 13:37:21 +00002545 loff_t len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002546
Brian Norris289c0522011-07-19 10:06:09 -07002547 pr_debug("%s: start = 0x%012llx, len = %llu\n",
2548 __func__, (unsigned long long)instr->addr,
2549 (unsigned long long)instr->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002550
Vimal Singh6fe5a6a2010-02-03 14:12:24 +05302551 if (check_offs_len(mtd, instr->addr, instr->len))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002552 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002553
Linus Torvalds1da177e2005-04-16 15:20:36 -07002554 /* Grab the lock and see if the device is available */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002555 nand_get_device(chip, mtd, FL_ERASING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002556
2557 /* Shift to get first page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002558 page = (int)(instr->addr >> chip->page_shift);
2559 chipnr = (int)(instr->addr >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002560
2561 /* Calculate pages in each block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002562 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002563
2564 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002565 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002566
Linus Torvalds1da177e2005-04-16 15:20:36 -07002567 /* Check, if it is write protected */
2568 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -07002569 pr_debug("%s: device is write protected!\n",
2570 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002571 instr->state = MTD_ERASE_FAILED;
2572 goto erase_exit;
2573 }
2574
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002575 /*
2576 * If BBT requires refresh, set the BBT page mask to see if the BBT
2577 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2578 * can not be matched. This is also done when the bbt is actually
Brian Norris7854d3f2011-06-23 14:12:08 -07002579 * erased to avoid recursive updates.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002580 */
2581 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2582 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
David A. Marlin30f464b2005-01-17 18:35:25 +00002583
Linus Torvalds1da177e2005-04-16 15:20:36 -07002584 /* Loop through the pages */
2585 len = instr->len;
2586
2587 instr->state = MTD_ERASING;
2588
2589 while (len) {
Wolfram Sang12183a22011-12-21 23:01:20 +01002590 /* Check if we have a bad block, we do not erase bad blocks! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002591 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2592 chip->page_shift, 0, allowbbt)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002593 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
2594 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002595 instr->state = MTD_ERASE_FAILED;
2596 goto erase_exit;
2597 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002598
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002599 /*
2600 * Invalidate the page cache, if we erase the block which
Brian Norris8b6e50c2011-05-25 14:59:01 -07002601 * contains the current cached page.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002602 */
2603 if (page <= chip->pagebuf && chip->pagebuf <
2604 (page + pages_per_block))
2605 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002606
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002607 chip->erase_cmd(mtd, page & chip->pagemask);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002608
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002609 status = chip->waitfunc(mtd, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002610
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002611 /*
2612 * See if operation failed and additional status checks are
2613 * available
2614 */
2615 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2616 status = chip->errstat(mtd, chip, FL_ERASING,
2617 status, page);
David A. Marlin068e3c02005-01-24 03:07:46 +00002618
Linus Torvalds1da177e2005-04-16 15:20:36 -07002619 /* See if block erase succeeded */
David A. Marlina4ab4c52005-01-23 18:30:53 +00002620 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -07002621 pr_debug("%s: failed erase, page 0x%08x\n",
2622 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002623 instr->state = MTD_ERASE_FAILED;
Adrian Hunter69423d92008-12-10 13:37:21 +00002624 instr->fail_addr =
2625 ((loff_t)page << chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002626 goto erase_exit;
2627 }
David A. Marlin30f464b2005-01-17 18:35:25 +00002628
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002629 /*
2630 * If BBT requires refresh, set the BBT rewrite flag to the
Brian Norris8b6e50c2011-05-25 14:59:01 -07002631 * page being erased.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002632 */
2633 if (bbt_masked_page != 0xffffffff &&
2634 (page & BBT_PAGE_MASK) == bbt_masked_page)
Adrian Hunter69423d92008-12-10 13:37:21 +00002635 rewrite_bbt[chipnr] =
2636 ((loff_t)page << chip->page_shift);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002637
Linus Torvalds1da177e2005-04-16 15:20:36 -07002638 /* Increment page address and decrement length */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002639 len -= (1 << chip->phys_erase_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002640 page += pages_per_block;
2641
2642 /* Check, if we cross a chip boundary */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002643 if (len && !(page & chip->pagemask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002644 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002645 chip->select_chip(mtd, -1);
2646 chip->select_chip(mtd, chipnr);
David A. Marlin30f464b2005-01-17 18:35:25 +00002647
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002648 /*
2649 * If BBT requires refresh and BBT-PERCHIP, set the BBT
Brian Norris8b6e50c2011-05-25 14:59:01 -07002650 * page mask to see if this BBT should be rewritten.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002651 */
2652 if (bbt_masked_page != 0xffffffff &&
2653 (chip->bbt_td->options & NAND_BBT_PERCHIP))
2654 bbt_masked_page = chip->bbt_td->pages[chipnr] &
2655 BBT_PAGE_MASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656 }
2657 }
2658 instr->state = MTD_ERASE_DONE;
2659
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002660erase_exit:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002661
2662 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002663
2664 /* Deselect and wake up anyone waiting on the device */
2665 nand_release_device(mtd);
2666
David Woodhouse49defc02007-10-06 15:01:59 -04002667 /* Do call back function */
2668 if (!ret)
2669 mtd_erase_callback(instr);
2670
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002671 /*
2672 * If BBT requires refresh and erase was successful, rewrite any
Brian Norris8b6e50c2011-05-25 14:59:01 -07002673 * selected bad block tables.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002674 */
2675 if (bbt_masked_page == 0xffffffff || ret)
2676 return ret;
2677
2678 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2679 if (!rewrite_bbt[chipnr])
2680 continue;
Brian Norris8b6e50c2011-05-25 14:59:01 -07002681 /* Update the BBT for chip */
Brian Norris289c0522011-07-19 10:06:09 -07002682 pr_debug("%s: nand_update_bbt (%d:0x%0llx 0x%0x)\n",
2683 __func__, chipnr, rewrite_bbt[chipnr],
2684 chip->bbt_td->pages[chipnr]);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002685 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
David A. Marlin30f464b2005-01-17 18:35:25 +00002686 }
2687
Linus Torvalds1da177e2005-04-16 15:20:36 -07002688 /* Return more or less happy */
2689 return ret;
2690}
2691
2692/**
2693 * nand_sync - [MTD Interface] sync
Brian Norris8b6e50c2011-05-25 14:59:01 -07002694 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07002695 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002696 * Sync is actually a wait for chip ready function.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002697 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002698static void nand_sync(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002699{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002700 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002701
Brian Norris289c0522011-07-19 10:06:09 -07002702 pr_debug("%s: called\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002703
2704 /* Grab the lock and see if the device is available */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002705 nand_get_device(chip, mtd, FL_SYNCING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002706 /* Release it and go back */
David Woodhousee0c7d762006-05-13 18:07:53 +01002707 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002708}
2709
Linus Torvalds1da177e2005-04-16 15:20:36 -07002710/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002711 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002712 * @mtd: MTD device structure
2713 * @offs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002714 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002715static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002716{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002717 return nand_block_checkbad(mtd, offs, 1, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002718}
2719
2720/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002721 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002722 * @mtd: MTD device structure
2723 * @ofs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002724 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002725static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002726{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002727 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002728 int ret;
2729
Florian Fainellif8ac0412010-09-07 13:23:43 +02002730 ret = nand_block_isbad(mtd, ofs);
2731 if (ret) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002732 /* If it was bad already, return success and do nothing */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002733 if (ret > 0)
2734 return 0;
David Woodhousee0c7d762006-05-13 18:07:53 +01002735 return ret;
2736 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002737
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002738 return chip->block_markbad(mtd, ofs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002739}
2740
2741/**
Vitaly Wool962034f2005-09-15 14:58:53 +01002742 * nand_suspend - [MTD Interface] Suspend the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002743 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002744 */
2745static int nand_suspend(struct mtd_info *mtd)
2746{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002747 struct nand_chip *chip = mtd->priv;
Vitaly Wool962034f2005-09-15 14:58:53 +01002748
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002749 return nand_get_device(chip, mtd, FL_PM_SUSPENDED);
Vitaly Wool962034f2005-09-15 14:58:53 +01002750}
2751
2752/**
2753 * nand_resume - [MTD Interface] Resume the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002754 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002755 */
2756static void nand_resume(struct mtd_info *mtd)
2757{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002758 struct nand_chip *chip = mtd->priv;
Vitaly Wool962034f2005-09-15 14:58:53 +01002759
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002760 if (chip->state == FL_PM_SUSPENDED)
Vitaly Wool962034f2005-09-15 14:58:53 +01002761 nand_release_device(mtd);
2762 else
Brian Norrisd0370212011-07-19 10:06:08 -07002763 pr_err("%s called for a chip which is not in suspended state\n",
2764 __func__);
Vitaly Wool962034f2005-09-15 14:58:53 +01002765}
2766
Brian Norris8b6e50c2011-05-25 14:59:01 -07002767/* Set default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002768static void nand_set_defaults(struct nand_chip *chip, int busw)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002769{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002770 /* check for proper chip_delay setup, set 20us if not */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002771 if (!chip->chip_delay)
2772 chip->chip_delay = 20;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002773
2774 /* check, if a user supplied command function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002775 if (chip->cmdfunc == NULL)
2776 chip->cmdfunc = nand_command;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002777
2778 /* check, if a user supplied wait function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002779 if (chip->waitfunc == NULL)
2780 chip->waitfunc = nand_wait;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002781
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002782 if (!chip->select_chip)
2783 chip->select_chip = nand_select_chip;
2784 if (!chip->read_byte)
2785 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2786 if (!chip->read_word)
2787 chip->read_word = nand_read_word;
2788 if (!chip->block_bad)
2789 chip->block_bad = nand_block_bad;
2790 if (!chip->block_markbad)
2791 chip->block_markbad = nand_default_block_markbad;
2792 if (!chip->write_buf)
2793 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2794 if (!chip->read_buf)
2795 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2796 if (!chip->verify_buf)
2797 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2798 if (!chip->scan_bbt)
2799 chip->scan_bbt = nand_default_bbt;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002800
2801 if (!chip->controller) {
2802 chip->controller = &chip->hwcontrol;
2803 spin_lock_init(&chip->controller->lock);
2804 init_waitqueue_head(&chip->controller->wq);
2805 }
2806
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002807}
2808
Brian Norris8b6e50c2011-05-25 14:59:01 -07002809/* Sanitize ONFI strings so we can safely print them */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002810static void sanitize_string(uint8_t *s, size_t len)
2811{
2812 ssize_t i;
2813
Brian Norris8b6e50c2011-05-25 14:59:01 -07002814 /* Null terminate */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002815 s[len - 1] = 0;
2816
Brian Norris8b6e50c2011-05-25 14:59:01 -07002817 /* Remove non printable chars */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002818 for (i = 0; i < len - 1; i++) {
2819 if (s[i] < ' ' || s[i] > 127)
2820 s[i] = '?';
2821 }
2822
Brian Norris8b6e50c2011-05-25 14:59:01 -07002823 /* Remove trailing spaces */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002824 strim(s);
2825}
2826
2827static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
2828{
2829 int i;
2830 while (len--) {
2831 crc ^= *p++ << 8;
2832 for (i = 0; i < 8; i++)
2833 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
2834 }
2835
2836 return crc;
2837}
2838
2839/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07002840 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002841 */
2842static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002843 int *busw)
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002844{
2845 struct nand_onfi_params *p = &chip->onfi_params;
2846 int i;
2847 int val;
2848
Brian Norris7854d3f2011-06-23 14:12:08 -07002849 /* Try ONFI for unknown chip or LP */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002850 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2851 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2852 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2853 return 0;
2854
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002855 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2856 for (i = 0; i < 3; i++) {
2857 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2858 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2859 le16_to_cpu(p->crc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07002860 pr_info("ONFI param page %d valid\n", i);
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002861 break;
2862 }
2863 }
2864
2865 if (i == 3)
2866 return 0;
2867
Brian Norris8b6e50c2011-05-25 14:59:01 -07002868 /* Check version */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002869 val = le16_to_cpu(p->revision);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002870 if (val & (1 << 5))
2871 chip->onfi_version = 23;
2872 else if (val & (1 << 4))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002873 chip->onfi_version = 22;
2874 else if (val & (1 << 3))
2875 chip->onfi_version = 21;
2876 else if (val & (1 << 2))
2877 chip->onfi_version = 20;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002878 else if (val & (1 << 1))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002879 chip->onfi_version = 10;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002880 else
2881 chip->onfi_version = 0;
2882
2883 if (!chip->onfi_version) {
Brian Norrisd0370212011-07-19 10:06:08 -07002884 pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002885 return 0;
2886 }
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002887
2888 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2889 sanitize_string(p->model, sizeof(p->model));
2890 if (!mtd->name)
2891 mtd->name = p->model;
2892 mtd->writesize = le32_to_cpu(p->byte_per_page);
2893 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2894 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Matthieu CASTET63795752012-03-19 15:35:25 +01002895 chip->chipsize = le32_to_cpu(p->blocks_per_lun);
2896 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002897 *busw = 0;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002898 if (le16_to_cpu(p->features) & 1)
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002899 *busw = NAND_BUSWIDTH_16;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002900
2901 chip->options &= ~NAND_CHIPOPTIONS_MSK;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002902
Huang Shijied42b5de2012-02-17 11:22:37 +08002903 pr_info("ONFI flash detected\n");
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002904 return 1;
2905}
2906
2907/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07002908 * Get the flash and manufacturer id and lookup if the type is supported.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002909 */
2910static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002911 struct nand_chip *chip,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002912 int busw,
2913 int *maf_id, int *dev_id,
David Woodhouse5e81e882010-02-26 18:32:56 +00002914 struct nand_flash_dev *type)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002915{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002916 int i, maf_idx;
Kevin Cernekee426c4572010-05-04 20:58:03 -07002917 u8 id_data[8];
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002918 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002919
2920 /* Select the device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002921 chip->select_chip(mtd, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002922
Karl Beldanef89a882008-09-15 14:37:29 +02002923 /*
2924 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002925 * after power-up.
Karl Beldanef89a882008-09-15 14:37:29 +02002926 */
2927 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2928
Linus Torvalds1da177e2005-04-16 15:20:36 -07002929 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002930 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002931
2932 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002933 *maf_id = chip->read_byte(mtd);
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002934 *dev_id = chip->read_byte(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002935
Brian Norris8b6e50c2011-05-25 14:59:01 -07002936 /*
2937 * Try again to make sure, as some systems the bus-hold or other
Ben Dooksed8165c2008-04-14 14:58:58 +01002938 * interface concerns can cause random data which looks like a
2939 * possibly credible NAND flash to appear. If the two results do
2940 * not match, ignore the device completely.
2941 */
2942
2943 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2944
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002945 for (i = 0; i < 2; i++)
Kevin Cernekee426c4572010-05-04 20:58:03 -07002946 id_data[i] = chip->read_byte(mtd);
Ben Dooksed8165c2008-04-14 14:58:58 +01002947
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002948 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07002949 pr_info("%s: second ID read did not match "
Brian Norrisd0370212011-07-19 10:06:08 -07002950 "%02x,%02x against %02x,%02x\n", __func__,
2951 *maf_id, *dev_id, id_data[0], id_data[1]);
Ben Dooksed8165c2008-04-14 14:58:58 +01002952 return ERR_PTR(-ENODEV);
2953 }
2954
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002955 if (!type)
David Woodhouse5e81e882010-02-26 18:32:56 +00002956 type = nand_flash_ids;
2957
2958 for (; type->name != NULL; type++)
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002959 if (*dev_id == type->id)
Florian Fainellif8ac0412010-09-07 13:23:43 +02002960 break;
David Woodhouse5e81e882010-02-26 18:32:56 +00002961
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002962 chip->onfi_version = 0;
2963 if (!type->name || !type->pagesize) {
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002964 /* Check is chip is ONFI compliant */
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002965 ret = nand_flash_detect_onfi(mtd, chip, &busw);
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002966 if (ret)
2967 goto ident_done;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002968 }
2969
2970 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2971
2972 /* Read entire ID string */
2973
2974 for (i = 0; i < 8; i++)
2975 id_data[i] = chip->read_byte(mtd);
2976
David Woodhouse5e81e882010-02-26 18:32:56 +00002977 if (!type->name)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002978 return ERR_PTR(-ENODEV);
2979
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02002980 if (!mtd->name)
2981 mtd->name = type->name;
2982
Adrian Hunter69423d92008-12-10 13:37:21 +00002983 chip->chipsize = (uint64_t)type->chipsize << 20;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002984
Huang Shijie12a40a52010-09-27 10:43:53 +08002985 if (!type->pagesize && chip->init_size) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002986 /* Set the pagesize, oobsize, erasesize by the driver */
Huang Shijie12a40a52010-09-27 10:43:53 +08002987 busw = chip->init_size(mtd, chip, id_data);
2988 } else if (!type->pagesize) {
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002989 int extid;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002990 /* The 3rd id byte holds MLC / multichip data */
Kevin Cernekee426c4572010-05-04 20:58:03 -07002991 chip->cellinfo = id_data[2];
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002992 /* The 4th id byte is the important one */
Kevin Cernekee426c4572010-05-04 20:58:03 -07002993 extid = id_data[3];
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002994
Kevin Cernekee426c4572010-05-04 20:58:03 -07002995 /*
2996 * Field definitions are in the following datasheets:
2997 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
Brian Norris34c5bf62010-08-20 10:50:43 -07002998 * New style (6 byte ID): Samsung K9GBG08U0M (p.40)
Kevin Cernekee426c4572010-05-04 20:58:03 -07002999 *
3000 * Check for wraparound + Samsung ID + nonzero 6th byte
3001 * to decide what to do.
3002 */
3003 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
3004 id_data[0] == NAND_MFR_SAMSUNG &&
Tilman Sauerbeckcfe3fda2010-08-20 14:01:47 -07003005 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
Kevin Cernekee426c4572010-05-04 20:58:03 -07003006 id_data[5] != 0x00) {
3007 /* Calc pagesize */
3008 mtd->writesize = 2048 << (extid & 0x03);
3009 extid >>= 2;
3010 /* Calc oobsize */
Brian Norris34c5bf62010-08-20 10:50:43 -07003011 switch (extid & 0x03) {
3012 case 1:
3013 mtd->oobsize = 128;
3014 break;
3015 case 2:
3016 mtd->oobsize = 218;
3017 break;
3018 case 3:
3019 mtd->oobsize = 400;
3020 break;
3021 default:
3022 mtd->oobsize = 436;
3023 break;
3024 }
Kevin Cernekee426c4572010-05-04 20:58:03 -07003025 extid >>= 2;
3026 /* Calc blocksize */
3027 mtd->erasesize = (128 * 1024) <<
3028 (((extid >> 1) & 0x04) | (extid & 0x03));
3029 busw = 0;
3030 } else {
3031 /* Calc pagesize */
3032 mtd->writesize = 1024 << (extid & 0x03);
3033 extid >>= 2;
3034 /* Calc oobsize */
3035 mtd->oobsize = (8 << (extid & 0x01)) *
3036 (mtd->writesize >> 9);
3037 extid >>= 2;
3038 /* Calc blocksize. Blocksize is multiples of 64KiB */
3039 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3040 extid >>= 2;
3041 /* Get buswidth information */
3042 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
3043 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003044 } else {
3045 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003046 * Old devices have chip data hardcoded in the device id table.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003047 */
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02003048 mtd->erasesize = type->erasesize;
3049 mtd->writesize = type->pagesize;
Thomas Gleixner4cbb9b82006-05-23 12:37:31 +02003050 mtd->oobsize = mtd->writesize / 32;
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02003051 busw = type->options & NAND_BUSWIDTH_16;
Brian Norris2173bae2010-08-19 08:11:02 -07003052
3053 /*
3054 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3055 * some Spansion chips have erasesize that conflicts with size
Brian Norris8b6e50c2011-05-25 14:59:01 -07003056 * listed in nand_ids table.
Brian Norris2173bae2010-08-19 08:11:02 -07003057 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3058 */
3059 if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
3060 id_data[5] == 0x00 && id_data[6] == 0x00 &&
3061 id_data[7] == 0x00 && mtd->writesize == 512) {
3062 mtd->erasesize = 128 * 1024;
3063 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3064 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003065 }
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003066 /* Get chip options, preserve non chip based options */
3067 chip->options &= ~NAND_CHIPOPTIONS_MSK;
3068 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
3069
Brian Norris8b6e50c2011-05-25 14:59:01 -07003070 /*
3071 * Check if chip is not a Samsung device. Do not clear the
3072 * options for chips which do not have an extended id.
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003073 */
3074 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
3075 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
3076ident_done:
3077
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003078 /* Try to identify manufacturer */
David Woodhouse9a909862006-07-15 13:26:18 +01003079 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003080 if (nand_manuf_ids[maf_idx].id == *maf_id)
3081 break;
3082 }
3083
3084 /*
3085 * Check, if buswidth is correct. Hardware drivers should set
Brian Norris8b6e50c2011-05-25 14:59:01 -07003086 * chip correct!
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003087 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003088 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003089 pr_info("NAND device: Manufacturer ID:"
Brian Norrisd0370212011-07-19 10:06:08 -07003090 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
3091 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
Brian Norris9a4d4d62011-07-19 10:06:07 -07003092 pr_warn("NAND bus width %d instead %d bit\n",
Brian Norrisd0370212011-07-19 10:06:08 -07003093 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
3094 busw ? 16 : 8);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003095 return ERR_PTR(-EINVAL);
3096 }
3097
3098 /* Calculate the address shift from the page size */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003099 chip->page_shift = ffs(mtd->writesize) - 1;
Brian Norris8b6e50c2011-05-25 14:59:01 -07003100 /* Convert chipsize to number of pages per chip -1 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003101 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003102
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003103 chip->bbt_erase_shift = chip->phys_erase_shift =
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003104 ffs(mtd->erasesize) - 1;
Adrian Hunter69423d92008-12-10 13:37:21 +00003105 if (chip->chipsize & 0xffffffff)
3106 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003107 else {
3108 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
3109 chip->chip_shift += 32 - 1;
3110 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003111
Artem Bityutskiy26d9be12011-04-28 20:26:59 +03003112 chip->badblockbits = 8;
3113
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003114 /* Set the bad block position */
Brian Norris065a1ed2010-08-18 11:25:04 -07003115 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
Brian Norrisc7b28e22010-07-13 15:13:00 -07003116 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
Brian Norris065a1ed2010-08-18 11:25:04 -07003117 else
3118 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003119
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -07003120 /*
3121 * Bad block marker is stored in the last page of each block
Brian Norrisc7b28e22010-07-13 15:13:00 -07003122 * on Samsung and Hynix MLC devices; stored in first two pages
3123 * of each block on Micron devices with 2KiB pages and on
Brian Norris8c342332011-11-02 13:34:44 -07003124 * SLC Samsung, Hynix, Toshiba, AMD/Spansion, and Macronix.
3125 * All others scan only the first page.
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -07003126 */
3127 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3128 (*maf_id == NAND_MFR_SAMSUNG ||
3129 *maf_id == NAND_MFR_HYNIX))
Brian Norris5fb15492011-05-31 16:31:21 -07003130 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
Brian Norrisc7b28e22010-07-13 15:13:00 -07003131 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3132 (*maf_id == NAND_MFR_SAMSUNG ||
3133 *maf_id == NAND_MFR_HYNIX ||
Brian Norris13ed7ae2010-08-20 12:36:12 -07003134 *maf_id == NAND_MFR_TOSHIBA ||
Brian Norris8c342332011-11-02 13:34:44 -07003135 *maf_id == NAND_MFR_AMD ||
3136 *maf_id == NAND_MFR_MACRONIX)) ||
Brian Norrisc7b28e22010-07-13 15:13:00 -07003137 (mtd->writesize == 2048 &&
3138 *maf_id == NAND_MFR_MICRON))
Brian Norris5fb15492011-05-31 16:31:21 -07003139 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
Brian Norrisc7b28e22010-07-13 15:13:00 -07003140
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003141 /* Check for AND chips with 4 page planes */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003142 if (chip->options & NAND_4PAGE_ARRAY)
3143 chip->erase_cmd = multi_erase_cmd;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003144 else
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003145 chip->erase_cmd = single_erase_cmd;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003146
Brian Norris8b6e50c2011-05-25 14:59:01 -07003147 /* Do not replace user supplied command function! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003148 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3149 chip->cmdfunc = nand_command_lp;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003150
Huang Shijie886bd332012-04-09 11:41:37 +08003151 pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
3152 " page size: %d, OOB size: %d\n",
3153 *maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
3154 chip->onfi_version ? chip->onfi_params.model : type->name,
3155 mtd->writesize, mtd->oobsize);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003156
3157 return type;
3158}
3159
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003160/**
David Woodhouse3b85c322006-09-25 17:06:53 +01003161 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003162 * @mtd: MTD device structure
3163 * @maxchips: number of chips to scan for
3164 * @table: alternative NAND ID table
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003165 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003166 * This is the first phase of the normal nand_scan() function. It reads the
3167 * flash ID and sets up MTD fields accordingly.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003168 *
David Woodhouse3b85c322006-09-25 17:06:53 +01003169 * The mtd->owner field must be set to the module of the caller.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003170 */
David Woodhouse5e81e882010-02-26 18:32:56 +00003171int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3172 struct nand_flash_dev *table)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003173{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003174 int i, busw, nand_maf_id, nand_dev_id;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003175 struct nand_chip *chip = mtd->priv;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003176 struct nand_flash_dev *type;
3177
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003178 /* Get buswidth to select the correct functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003179 busw = chip->options & NAND_BUSWIDTH_16;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003180 /* Set the default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003181 nand_set_defaults(chip, busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003182
3183 /* Read the flash type */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003184 type = nand_get_flash_type(mtd, chip, busw,
3185 &nand_maf_id, &nand_dev_id, table);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003186
3187 if (IS_ERR(type)) {
Ben Dooksb1c6e6d2009-11-02 18:12:33 +00003188 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
Brian Norrisd0370212011-07-19 10:06:08 -07003189 pr_warn("No NAND device found\n");
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003190 chip->select_chip(mtd, -1);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003191 return PTR_ERR(type);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003192 }
3193
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003194 /* Check for a chip array */
David Woodhousee0c7d762006-05-13 18:07:53 +01003195 for (i = 1; i < maxchips; i++) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003196 chip->select_chip(mtd, i);
Karl Beldanef89a882008-09-15 14:37:29 +02003197 /* See comment in nand_get_flash_type for reset */
3198 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003199 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003200 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003201 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003202 if (nand_maf_id != chip->read_byte(mtd) ||
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003203 nand_dev_id != chip->read_byte(mtd))
Linus Torvalds1da177e2005-04-16 15:20:36 -07003204 break;
3205 }
3206 if (i > 1)
Brian Norris9a4d4d62011-07-19 10:06:07 -07003207 pr_info("%d NAND chips detected\n", i);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003208
Linus Torvalds1da177e2005-04-16 15:20:36 -07003209 /* Store the number of chips and calc total size for mtd */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003210 chip->numchips = i;
3211 mtd->size = i * chip->chipsize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003212
David Woodhouse3b85c322006-09-25 17:06:53 +01003213 return 0;
3214}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003215EXPORT_SYMBOL(nand_scan_ident);
David Woodhouse3b85c322006-09-25 17:06:53 +01003216
3217
3218/**
3219 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003220 * @mtd: MTD device structure
David Woodhouse3b85c322006-09-25 17:06:53 +01003221 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003222 * This is the second phase of the normal nand_scan() function. It fills out
3223 * all the uninitialized function pointers with the defaults and scans for a
3224 * bad block table if appropriate.
David Woodhouse3b85c322006-09-25 17:06:53 +01003225 */
3226int nand_scan_tail(struct mtd_info *mtd)
3227{
3228 int i;
3229 struct nand_chip *chip = mtd->priv;
3230
Brian Norrise2414f42012-02-06 13:44:00 -08003231 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
3232 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
3233 !(chip->bbt_options & NAND_BBT_USE_FLASH));
3234
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003235 if (!(chip->options & NAND_OWN_BUFFERS))
3236 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
3237 if (!chip->buffers)
3238 return -ENOMEM;
3239
David Woodhouse7dcdcbef2006-10-21 17:09:53 +01003240 /* Set the internal oob buffer location, just after the page data */
David Woodhouse784f4d52006-10-22 01:47:45 +01003241 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003242
3243 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003244 * If no default placement scheme is given, select an appropriate one.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003245 */
Ivan Djelic193bd402011-03-11 11:05:33 +01003246 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003247 switch (mtd->oobsize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003248 case 8:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003249 chip->ecc.layout = &nand_oob_8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003250 break;
3251 case 16:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003252 chip->ecc.layout = &nand_oob_16;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003253 break;
3254 case 64:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003255 chip->ecc.layout = &nand_oob_64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003256 break;
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003257 case 128:
3258 chip->ecc.layout = &nand_oob_128;
3259 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003260 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003261 pr_warn("No oob scheme defined for oobsize %d\n",
3262 mtd->oobsize);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003263 BUG();
3264 }
3265 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003266
David Woodhouse956e9442006-09-25 17:12:39 +01003267 if (!chip->write_page)
3268 chip->write_page = nand_write_page;
3269
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003270 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003271 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003272 * selected and we have 256 byte pagesize fallback to software ECC
David Woodhousee0c7d762006-05-13 18:07:53 +01003273 */
David Woodhouse956e9442006-09-25 17:12:39 +01003274
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003275 switch (chip->ecc.mode) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003276 case NAND_ECC_HW_OOB_FIRST:
3277 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3278 if (!chip->ecc.calculate || !chip->ecc.correct ||
3279 !chip->ecc.hwctl) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003280 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003281 "hardware ECC not possible\n");
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003282 BUG();
3283 }
3284 if (!chip->ecc.read_page)
3285 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
3286
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003287 case NAND_ECC_HW:
Brian Norris8b6e50c2011-05-25 14:59:01 -07003288 /* Use standard hwecc read page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003289 if (!chip->ecc.read_page)
3290 chip->ecc.read_page = nand_read_page_hwecc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003291 if (!chip->ecc.write_page)
3292 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003293 if (!chip->ecc.read_page_raw)
3294 chip->ecc.read_page_raw = nand_read_page_raw;
3295 if (!chip->ecc.write_page_raw)
3296 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003297 if (!chip->ecc.read_oob)
3298 chip->ecc.read_oob = nand_read_oob_std;
3299 if (!chip->ecc.write_oob)
3300 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003301
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003302 case NAND_ECC_HW_SYNDROME:
Scott Wood78b65172007-12-13 11:15:28 -06003303 if ((!chip->ecc.calculate || !chip->ecc.correct ||
3304 !chip->ecc.hwctl) &&
3305 (!chip->ecc.read_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003306 chip->ecc.read_page == nand_read_page_hwecc ||
Scott Wood78b65172007-12-13 11:15:28 -06003307 !chip->ecc.write_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003308 chip->ecc.write_page == nand_write_page_hwecc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003309 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003310 "hardware ECC not possible\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003311 BUG();
3312 }
Brian Norris8b6e50c2011-05-25 14:59:01 -07003313 /* Use standard syndrome read/write page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003314 if (!chip->ecc.read_page)
3315 chip->ecc.read_page = nand_read_page_syndrome;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003316 if (!chip->ecc.write_page)
3317 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell52ff49d2009-03-04 12:01:36 -08003318 if (!chip->ecc.read_page_raw)
3319 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
3320 if (!chip->ecc.write_page_raw)
3321 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003322 if (!chip->ecc.read_oob)
3323 chip->ecc.read_oob = nand_read_oob_syndrome;
3324 if (!chip->ecc.write_oob)
3325 chip->ecc.write_oob = nand_write_oob_syndrome;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003326
Mike Dunne2788c92012-04-25 12:06:10 -07003327 if (mtd->writesize >= chip->ecc.size) {
3328 if (!chip->ecc.strength) {
3329 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
3330 BUG();
3331 }
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003332 break;
Mike Dunne2788c92012-04-25 12:06:10 -07003333 }
Brian Norris9a4d4d62011-07-19 10:06:07 -07003334 pr_warn("%d byte HW ECC not possible on "
Brian Norrisd0370212011-07-19 10:06:08 -07003335 "%d byte page size, fallback to SW ECC\n",
3336 chip->ecc.size, mtd->writesize);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003337 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003338
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003339 case NAND_ECC_SOFT:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003340 chip->ecc.calculate = nand_calculate_ecc;
3341 chip->ecc.correct = nand_correct_data;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003342 chip->ecc.read_page = nand_read_page_swecc;
Alexey Korolev3d459552008-05-15 17:23:18 +01003343 chip->ecc.read_subpage = nand_read_subpage;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003344 chip->ecc.write_page = nand_write_page_swecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003345 chip->ecc.read_page_raw = nand_read_page_raw;
3346 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003347 chip->ecc.read_oob = nand_read_oob_std;
3348 chip->ecc.write_oob = nand_write_oob_std;
Singh, Vimal9a732902008-12-12 00:10:57 +00003349 if (!chip->ecc.size)
3350 chip->ecc.size = 256;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003351 chip->ecc.bytes = 3;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003352 chip->ecc.strength = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003353 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003354
Ivan Djelic193bd402011-03-11 11:05:33 +01003355 case NAND_ECC_SOFT_BCH:
3356 if (!mtd_nand_has_bch()) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003357 pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003358 BUG();
3359 }
3360 chip->ecc.calculate = nand_bch_calculate_ecc;
3361 chip->ecc.correct = nand_bch_correct_data;
3362 chip->ecc.read_page = nand_read_page_swecc;
3363 chip->ecc.read_subpage = nand_read_subpage;
3364 chip->ecc.write_page = nand_write_page_swecc;
3365 chip->ecc.read_page_raw = nand_read_page_raw;
3366 chip->ecc.write_page_raw = nand_write_page_raw;
3367 chip->ecc.read_oob = nand_read_oob_std;
3368 chip->ecc.write_oob = nand_write_oob_std;
3369 /*
3370 * Board driver should supply ecc.size and ecc.bytes values to
3371 * select how many bits are correctable; see nand_bch_init()
Brian Norris8b6e50c2011-05-25 14:59:01 -07003372 * for details. Otherwise, default to 4 bits for large page
3373 * devices.
Ivan Djelic193bd402011-03-11 11:05:33 +01003374 */
3375 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3376 chip->ecc.size = 512;
3377 chip->ecc.bytes = 7;
3378 }
3379 chip->ecc.priv = nand_bch_init(mtd,
3380 chip->ecc.size,
3381 chip->ecc.bytes,
3382 &chip->ecc.layout);
3383 if (!chip->ecc.priv) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003384 pr_warn("BCH ECC initialization failed!\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003385 BUG();
3386 }
Mike Dunn6a918ba2012-03-11 14:21:11 -07003387 chip->ecc.strength =
Mike Dunne2788c92012-04-25 12:06:10 -07003388 chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
Ivan Djelic193bd402011-03-11 11:05:33 +01003389 break;
3390
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003391 case NAND_ECC_NONE:
Brian Norris9a4d4d62011-07-19 10:06:07 -07003392 pr_warn("NAND_ECC_NONE selected by board driver. "
Brian Norrisd0370212011-07-19 10:06:08 -07003393 "This is not recommended!\n");
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02003394 chip->ecc.read_page = nand_read_page_raw;
3395 chip->ecc.write_page = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003396 chip->ecc.read_oob = nand_read_oob_std;
David Brownell52ff49d2009-03-04 12:01:36 -08003397 chip->ecc.read_page_raw = nand_read_page_raw;
3398 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003399 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003400 chip->ecc.size = mtd->writesize;
3401 chip->ecc.bytes = 0;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003402 chip->ecc.strength = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003403 break;
David Woodhouse956e9442006-09-25 17:12:39 +01003404
Linus Torvalds1da177e2005-04-16 15:20:36 -07003405 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003406 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003407 BUG();
3408 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003409
Brian Norris9ce244b2011-08-30 18:45:37 -07003410 /* For many systems, the standard OOB write also works for raw */
Brian Norrisc46f6482011-08-30 18:45:38 -07003411 if (!chip->ecc.read_oob_raw)
3412 chip->ecc.read_oob_raw = chip->ecc.read_oob;
Brian Norris9ce244b2011-08-30 18:45:37 -07003413 if (!chip->ecc.write_oob_raw)
3414 chip->ecc.write_oob_raw = chip->ecc.write_oob;
3415
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003416 /*
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003417 * The number of bytes available for a client to place data into
Brian Norris8b6e50c2011-05-25 14:59:01 -07003418 * the out of band area.
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003419 */
3420 chip->ecc.layout->oobavail = 0;
David Brownell81d19b02009-04-21 19:51:20 -07003421 for (i = 0; chip->ecc.layout->oobfree[i].length
3422 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003423 chip->ecc.layout->oobavail +=
3424 chip->ecc.layout->oobfree[i].length;
Vitaly Wool1f922672007-03-06 16:56:34 +03003425 mtd->oobavail = chip->ecc.layout->oobavail;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003426
3427 /*
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003428 * Set the number of read / write steps for one page depending on ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07003429 * mode.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003430 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003431 chip->ecc.steps = mtd->writesize / chip->ecc.size;
Florian Fainellif8ac0412010-09-07 13:23:43 +02003432 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003433 pr_warn("Invalid ECC parameters\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003434 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003435 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003436 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003437
Brian Norris8b6e50c2011-05-25 14:59:01 -07003438 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Thomas Gleixner29072b92006-09-28 15:38:36 +02003439 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3440 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
Florian Fainellif8ac0412010-09-07 13:23:43 +02003441 switch (chip->ecc.steps) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02003442 case 2:
3443 mtd->subpage_sft = 1;
3444 break;
3445 case 4:
3446 case 8:
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003447 case 16:
Thomas Gleixner29072b92006-09-28 15:38:36 +02003448 mtd->subpage_sft = 2;
3449 break;
3450 }
3451 }
3452 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3453
Thomas Gleixner04bbd0e2006-05-25 09:45:29 +02003454 /* Initialize state */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003455 chip->state = FL_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003456
3457 /* De-select the device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003458 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003459
3460 /* Invalidate the pagebuffer reference */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003461 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003462
3463 /* Fill in remaining MTD driver data */
3464 mtd->type = MTD_NANDFLASH;
Maxim Levitsky93edbad2010-02-22 20:39:40 +02003465 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
3466 MTD_CAP_NANDFLASH;
Artem Bityutskiy3c3c10b2012-01-30 14:58:32 +02003467 mtd->_erase = nand_erase;
3468 mtd->_point = NULL;
3469 mtd->_unpoint = NULL;
3470 mtd->_read = nand_read;
3471 mtd->_write = nand_write;
3472 mtd->_panic_write = panic_nand_write;
3473 mtd->_read_oob = nand_read_oob;
3474 mtd->_write_oob = nand_write_oob;
3475 mtd->_sync = nand_sync;
3476 mtd->_lock = NULL;
3477 mtd->_unlock = NULL;
3478 mtd->_suspend = nand_suspend;
3479 mtd->_resume = nand_resume;
3480 mtd->_block_isbad = nand_block_isbad;
3481 mtd->_block_markbad = nand_block_markbad;
Anatolij Gustschincbcab652010-12-16 23:42:16 +01003482 mtd->writebufsize = mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003483
Mike Dunn6a918ba2012-03-11 14:21:11 -07003484 /* propagate ecc info to mtd_info */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003485 mtd->ecclayout = chip->ecc.layout;
Mike Dunn86c20722012-04-25 12:06:05 -07003486 mtd->ecc_strength = chip->ecc.strength;
Shmulik Ladkaniea3b2ea2012-06-08 18:29:06 +03003487 /*
3488 * Initialize bitflip_threshold to its default prior scan_bbt() call.
3489 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
3490 * properly set.
3491 */
3492 if (!mtd->bitflip_threshold)
3493 mtd->bitflip_threshold = mtd->ecc_strength;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003494
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003495 /* Check, if we should skip the bad block table scan */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003496 if (chip->options & NAND_SKIP_BBTSCAN)
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003497 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003498
3499 /* Build bad block table */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003500 return chip->scan_bbt(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003501}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003502EXPORT_SYMBOL(nand_scan_tail);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003503
Brian Norris8b6e50c2011-05-25 14:59:01 -07003504/*
3505 * is_module_text_address() isn't exported, and it's mostly a pointless
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003506 * test if this is a module _anyway_ -- they'd have to try _really_ hard
Brian Norris8b6e50c2011-05-25 14:59:01 -07003507 * to call us from in-kernel code if the core NAND support is modular.
3508 */
David Woodhouse3b85c322006-09-25 17:06:53 +01003509#ifdef MODULE
3510#define caller_is_module() (1)
3511#else
3512#define caller_is_module() \
Rusty Russella6e6abd2009-03-31 13:05:31 -06003513 is_module_text_address((unsigned long)__builtin_return_address(0))
David Woodhouse3b85c322006-09-25 17:06:53 +01003514#endif
3515
3516/**
3517 * nand_scan - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003518 * @mtd: MTD device structure
3519 * @maxchips: number of chips to scan for
David Woodhouse3b85c322006-09-25 17:06:53 +01003520 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003521 * This fills out all the uninitialized function pointers with the defaults.
3522 * The flash ID is read and the mtd/chip structures are filled with the
3523 * appropriate values. The mtd->owner field must be set to the module of the
3524 * caller.
David Woodhouse3b85c322006-09-25 17:06:53 +01003525 */
3526int nand_scan(struct mtd_info *mtd, int maxchips)
3527{
3528 int ret;
3529
3530 /* Many callers got this wrong, so check for it for a while... */
3531 if (!mtd->owner && caller_is_module()) {
Brian Norrisd0370212011-07-19 10:06:08 -07003532 pr_crit("%s called with NULL mtd->owner!\n", __func__);
David Woodhouse3b85c322006-09-25 17:06:53 +01003533 BUG();
3534 }
3535
David Woodhouse5e81e882010-02-26 18:32:56 +00003536 ret = nand_scan_ident(mtd, maxchips, NULL);
David Woodhouse3b85c322006-09-25 17:06:53 +01003537 if (!ret)
3538 ret = nand_scan_tail(mtd);
3539 return ret;
3540}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003541EXPORT_SYMBOL(nand_scan);
David Woodhouse3b85c322006-09-25 17:06:53 +01003542
Linus Torvalds1da177e2005-04-16 15:20:36 -07003543/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003544 * nand_release - [NAND Interface] Free resources held by the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003545 * @mtd: MTD device structure
3546 */
David Woodhousee0c7d762006-05-13 18:07:53 +01003547void nand_release(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003548{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003549 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003550
Ivan Djelic193bd402011-03-11 11:05:33 +01003551 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3552 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3553
Jamie Iles5ffcaf32011-05-23 10:22:46 +01003554 mtd_device_unregister(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003555
Jesper Juhlfa671642005-11-07 01:01:27 -08003556 /* Free bad block table memory */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003557 kfree(chip->bbt);
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003558 if (!(chip->options & NAND_OWN_BUFFERS))
3559 kfree(chip->buffers);
Brian Norris58373ff2010-07-15 12:15:44 -07003560
3561 /* Free bad block descriptor memory */
3562 if (chip->badblock_pattern && chip->badblock_pattern->options
3563 & NAND_BBT_DYNAMICSTRUCT)
3564 kfree(chip->badblock_pattern);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003565}
David Woodhousee0c7d762006-05-13 18:07:53 +01003566EXPORT_SYMBOL_GPL(nand_release);
Richard Purdie8fe833c2006-03-31 02:31:14 -08003567
3568static int __init nand_base_init(void)
3569{
3570 led_trigger_register_simple("nand-disk", &nand_led_trigger);
3571 return 0;
3572}
3573
3574static void __exit nand_base_exit(void)
3575{
3576 led_trigger_unregister_simple(nand_led_trigger);
3577}
3578
3579module_init(nand_base_init);
3580module_exit(nand_base_exit);
3581
David Woodhousee0c7d762006-05-13 18:07:53 +01003582MODULE_LICENSE("GPL");
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003583MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
3584MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
David Woodhousee0c7d762006-05-13 18:07:53 +01003585MODULE_DESCRIPTION("Generic NAND flash driver code");