blob: 4bd6b729f710f8ef79583f7d600fb68b4cc03723 [file] [log] [blame]
Stephen Streete0c99052006-03-07 23:53:24 -08001/*
2 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
Mika Westerberga0d26422013-01-22 12:26:32 +02003 * Copyright (C) 2013, Intel Corporation
Stephen Streete0c99052006-03-07 23:53:24 -08004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/device.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
25#include <linux/interrupt.h>
26#include <linux/platform_device.h>
Sebastian Andrzej Siewior8348c252010-11-22 17:12:15 -080027#include <linux/spi/pxa2xx_spi.h>
Stephen Streete0c99052006-03-07 23:53:24 -080028#include <linux/spi/spi.h>
29#include <linux/workqueue.h>
Stephen Streete0c99052006-03-07 23:53:24 -080030#include <linux/delay.h>
Eric Miaoa7bb3902009-04-06 19:00:54 -070031#include <linux/gpio.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Mika Westerberg3343b7a2013-01-22 12:26:27 +020033#include <linux/clk.h>
Mika Westerberg7d94a502013-01-22 12:26:30 +020034#include <linux/pm_runtime.h>
Stephen Streete0c99052006-03-07 23:53:24 -080035
36#include <asm/io.h>
37#include <asm/irq.h>
Stephen Streete0c99052006-03-07 23:53:24 -080038#include <asm/delay.h>
Stephen Streete0c99052006-03-07 23:53:24 -080039
Mika Westerbergcd7bed02013-01-22 12:26:28 +020040#include "spi-pxa2xx.h"
Stephen Streete0c99052006-03-07 23:53:24 -080041
42MODULE_AUTHOR("Stephen Street");
Will Newton037cdaf2007-12-10 15:49:25 -080043MODULE_DESCRIPTION("PXA2xx SSP SPI Controller");
Stephen Streete0c99052006-03-07 23:53:24 -080044MODULE_LICENSE("GPL");
Kay Sievers7e38c3c2008-04-10 21:29:20 -070045MODULE_ALIAS("platform:pxa2xx-spi");
Stephen Streete0c99052006-03-07 23:53:24 -080046
47#define MAX_BUSES 3
48
Vernon Sauderf1f640a2008-10-15 22:02:43 -070049#define TIMOUT_DFLT 1000
50
Ned Forresterb97c74b2008-02-23 15:23:40 -080051/*
52 * for testing SSCR1 changes that require SSP restart, basically
53 * everything except the service and interrupt enables, the pxa270 developer
54 * manual says only SSCR1_SCFR, SSCR1_SPH, SSCR1_SPO need to be in this
55 * list, but the PXA255 dev man says all bits without really meaning the
56 * service and interrupt enables
57 */
58#define SSCR1_CHANGE_MASK (SSCR1_TTELP | SSCR1_TTE | SSCR1_SCFR \
Stephen Street8d94cc52006-12-10 02:18:54 -080059 | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \
Ned Forresterb97c74b2008-02-23 15:23:40 -080060 | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \
61 | SSCR1_IFS | SSCR1_STRF | SSCR1_EFWR \
62 | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \
63 | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)
Stephen Street8d94cc52006-12-10 02:18:54 -080064
Mika Westerberga0d26422013-01-22 12:26:32 +020065#define LPSS_RX_THRESH_DFLT 64
66#define LPSS_TX_LOTHRESH_DFLT 160
67#define LPSS_TX_HITHRESH_DFLT 224
68
69/* Offset from drv_data->lpss_base */
70#define SPI_CS_CONTROL 0x18
71#define SPI_CS_CONTROL_SW_MODE BIT(0)
72#define SPI_CS_CONTROL_CS_HIGH BIT(1)
73
74static bool is_lpss_ssp(const struct driver_data *drv_data)
75{
76 return drv_data->ssp_type == LPSS_SSP;
77}
78
79/*
80 * Read and write LPSS SSP private registers. Caller must first check that
81 * is_lpss_ssp() returns true before these can be called.
82 */
83static u32 __lpss_ssp_read_priv(struct driver_data *drv_data, unsigned offset)
84{
85 WARN_ON(!drv_data->lpss_base);
86 return readl(drv_data->lpss_base + offset);
87}
88
89static void __lpss_ssp_write_priv(struct driver_data *drv_data,
90 unsigned offset, u32 value)
91{
92 WARN_ON(!drv_data->lpss_base);
93 writel(value, drv_data->lpss_base + offset);
94}
95
96/*
97 * lpss_ssp_setup - perform LPSS SSP specific setup
98 * @drv_data: pointer to the driver private data
99 *
100 * Perform LPSS SSP specific setup. This function must be called first if
101 * one is going to use LPSS SSP private registers.
102 */
103static void lpss_ssp_setup(struct driver_data *drv_data)
104{
105 unsigned offset = 0x400;
106 u32 value, orig;
107
108 if (!is_lpss_ssp(drv_data))
109 return;
110
111 /*
112 * Perform auto-detection of the LPSS SSP private registers. They
113 * can be either at 1k or 2k offset from the base address.
114 */
115 orig = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
116
117 value = orig | SPI_CS_CONTROL_SW_MODE;
118 writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL);
119 value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
120 if (value != (orig | SPI_CS_CONTROL_SW_MODE)) {
121 offset = 0x800;
122 goto detection_done;
123 }
124
125 value &= ~SPI_CS_CONTROL_SW_MODE;
126 writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL);
127 value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL);
128 if (value != orig) {
129 offset = 0x800;
130 goto detection_done;
131 }
132
133detection_done:
134 /* Now set the LPSS base */
135 drv_data->lpss_base = drv_data->ioaddr + offset;
136
137 /* Enable software chip select control */
138 value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH;
139 __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
140}
141
142static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
143{
144 u32 value;
145
146 if (!is_lpss_ssp(drv_data))
147 return;
148
149 value = __lpss_ssp_read_priv(drv_data, SPI_CS_CONTROL);
150 if (enable)
151 value &= ~SPI_CS_CONTROL_CS_HIGH;
152 else
153 value |= SPI_CS_CONTROL_CS_HIGH;
154 __lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
155}
156
Eric Miaoa7bb3902009-04-06 19:00:54 -0700157static void cs_assert(struct driver_data *drv_data)
158{
159 struct chip_data *chip = drv_data->cur_chip;
160
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800161 if (drv_data->ssp_type == CE4100_SSP) {
162 write_SSSR(drv_data->cur_chip->frm, drv_data->ioaddr);
163 return;
164 }
165
Eric Miaoa7bb3902009-04-06 19:00:54 -0700166 if (chip->cs_control) {
167 chip->cs_control(PXA2XX_CS_ASSERT);
168 return;
169 }
170
Mika Westerberga0d26422013-01-22 12:26:32 +0200171 if (gpio_is_valid(chip->gpio_cs)) {
Eric Miaoa7bb3902009-04-06 19:00:54 -0700172 gpio_set_value(chip->gpio_cs, chip->gpio_cs_inverted);
Mika Westerberga0d26422013-01-22 12:26:32 +0200173 return;
174 }
175
176 lpss_ssp_cs_control(drv_data, true);
Eric Miaoa7bb3902009-04-06 19:00:54 -0700177}
178
179static void cs_deassert(struct driver_data *drv_data)
180{
181 struct chip_data *chip = drv_data->cur_chip;
182
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800183 if (drv_data->ssp_type == CE4100_SSP)
184 return;
185
Eric Miaoa7bb3902009-04-06 19:00:54 -0700186 if (chip->cs_control) {
Daniel Ribeiro2b2562d2009-04-08 22:48:03 -0300187 chip->cs_control(PXA2XX_CS_DEASSERT);
Eric Miaoa7bb3902009-04-06 19:00:54 -0700188 return;
189 }
190
Mika Westerberga0d26422013-01-22 12:26:32 +0200191 if (gpio_is_valid(chip->gpio_cs)) {
Eric Miaoa7bb3902009-04-06 19:00:54 -0700192 gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted);
Mika Westerberga0d26422013-01-22 12:26:32 +0200193 return;
194 }
195
196 lpss_ssp_cs_control(drv_data, false);
Eric Miaoa7bb3902009-04-06 19:00:54 -0700197}
198
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200199int pxa2xx_spi_flush(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800200{
201 unsigned long limit = loops_per_jiffy << 1;
202
David Brownellcf433692008-04-28 02:14:17 -0700203 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800204
205 do {
206 while (read_SSSR(reg) & SSSR_RNE) {
207 read_SSDR(reg);
208 }
Roel Kluin306c68a2009-04-21 12:24:46 -0700209 } while ((read_SSSR(reg) & SSSR_BSY) && --limit);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800210 write_SSSR_CS(drv_data, SSSR_ROR);
Stephen Streete0c99052006-03-07 23:53:24 -0800211
212 return limit;
213}
214
Stephen Street8d94cc52006-12-10 02:18:54 -0800215static int null_writer(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800216{
David Brownellcf433692008-04-28 02:14:17 -0700217 void __iomem *reg = drv_data->ioaddr;
Stephen Street9708c122006-03-28 14:05:23 -0800218 u8 n_bytes = drv_data->n_bytes;
Stephen Streete0c99052006-03-07 23:53:24 -0800219
Sebastian Andrzej Siewior4a256052010-11-22 17:12:15 -0800220 if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
Stephen Street8d94cc52006-12-10 02:18:54 -0800221 || (drv_data->tx == drv_data->tx_end))
222 return 0;
223
224 write_SSDR(0, reg);
225 drv_data->tx += n_bytes;
226
227 return 1;
Stephen Streete0c99052006-03-07 23:53:24 -0800228}
229
Stephen Street8d94cc52006-12-10 02:18:54 -0800230static int null_reader(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800231{
David Brownellcf433692008-04-28 02:14:17 -0700232 void __iomem *reg = drv_data->ioaddr;
Stephen Street9708c122006-03-28 14:05:23 -0800233 u8 n_bytes = drv_data->n_bytes;
Stephen Streete0c99052006-03-07 23:53:24 -0800234
235 while ((read_SSSR(reg) & SSSR_RNE)
Stephen Street8d94cc52006-12-10 02:18:54 -0800236 && (drv_data->rx < drv_data->rx_end)) {
Stephen Streete0c99052006-03-07 23:53:24 -0800237 read_SSDR(reg);
238 drv_data->rx += n_bytes;
239 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800240
241 return drv_data->rx == drv_data->rx_end;
Stephen Streete0c99052006-03-07 23:53:24 -0800242}
243
Stephen Street8d94cc52006-12-10 02:18:54 -0800244static int u8_writer(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800245{
David Brownellcf433692008-04-28 02:14:17 -0700246 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800247
Sebastian Andrzej Siewior4a256052010-11-22 17:12:15 -0800248 if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
Stephen Street8d94cc52006-12-10 02:18:54 -0800249 || (drv_data->tx == drv_data->tx_end))
250 return 0;
251
252 write_SSDR(*(u8 *)(drv_data->tx), reg);
253 ++drv_data->tx;
254
255 return 1;
Stephen Streete0c99052006-03-07 23:53:24 -0800256}
257
Stephen Street8d94cc52006-12-10 02:18:54 -0800258static int u8_reader(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800259{
David Brownellcf433692008-04-28 02:14:17 -0700260 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800261
262 while ((read_SSSR(reg) & SSSR_RNE)
Stephen Street8d94cc52006-12-10 02:18:54 -0800263 && (drv_data->rx < drv_data->rx_end)) {
Stephen Streete0c99052006-03-07 23:53:24 -0800264 *(u8 *)(drv_data->rx) = read_SSDR(reg);
265 ++drv_data->rx;
266 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800267
268 return drv_data->rx == drv_data->rx_end;
Stephen Streete0c99052006-03-07 23:53:24 -0800269}
270
Stephen Street8d94cc52006-12-10 02:18:54 -0800271static int u16_writer(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800272{
David Brownellcf433692008-04-28 02:14:17 -0700273 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800274
Sebastian Andrzej Siewior4a256052010-11-22 17:12:15 -0800275 if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
Stephen Street8d94cc52006-12-10 02:18:54 -0800276 || (drv_data->tx == drv_data->tx_end))
277 return 0;
278
279 write_SSDR(*(u16 *)(drv_data->tx), reg);
280 drv_data->tx += 2;
281
282 return 1;
Stephen Streete0c99052006-03-07 23:53:24 -0800283}
284
Stephen Street8d94cc52006-12-10 02:18:54 -0800285static int u16_reader(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800286{
David Brownellcf433692008-04-28 02:14:17 -0700287 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800288
289 while ((read_SSSR(reg) & SSSR_RNE)
Stephen Street8d94cc52006-12-10 02:18:54 -0800290 && (drv_data->rx < drv_data->rx_end)) {
Stephen Streete0c99052006-03-07 23:53:24 -0800291 *(u16 *)(drv_data->rx) = read_SSDR(reg);
292 drv_data->rx += 2;
293 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800294
295 return drv_data->rx == drv_data->rx_end;
Stephen Streete0c99052006-03-07 23:53:24 -0800296}
Stephen Street8d94cc52006-12-10 02:18:54 -0800297
298static int u32_writer(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800299{
David Brownellcf433692008-04-28 02:14:17 -0700300 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800301
Sebastian Andrzej Siewior4a256052010-11-22 17:12:15 -0800302 if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK)
Stephen Street8d94cc52006-12-10 02:18:54 -0800303 || (drv_data->tx == drv_data->tx_end))
304 return 0;
305
306 write_SSDR(*(u32 *)(drv_data->tx), reg);
307 drv_data->tx += 4;
308
309 return 1;
Stephen Streete0c99052006-03-07 23:53:24 -0800310}
311
Stephen Street8d94cc52006-12-10 02:18:54 -0800312static int u32_reader(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800313{
David Brownellcf433692008-04-28 02:14:17 -0700314 void __iomem *reg = drv_data->ioaddr;
Stephen Streete0c99052006-03-07 23:53:24 -0800315
316 while ((read_SSSR(reg) & SSSR_RNE)
Stephen Street8d94cc52006-12-10 02:18:54 -0800317 && (drv_data->rx < drv_data->rx_end)) {
Stephen Streete0c99052006-03-07 23:53:24 -0800318 *(u32 *)(drv_data->rx) = read_SSDR(reg);
319 drv_data->rx += 4;
320 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800321
322 return drv_data->rx == drv_data->rx_end;
Stephen Streete0c99052006-03-07 23:53:24 -0800323}
324
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200325void *pxa2xx_spi_next_transfer(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800326{
327 struct spi_message *msg = drv_data->cur_msg;
328 struct spi_transfer *trans = drv_data->cur_transfer;
329
330 /* Move to next transfer */
331 if (trans->transfer_list.next != &msg->transfers) {
332 drv_data->cur_transfer =
333 list_entry(trans->transfer_list.next,
334 struct spi_transfer,
335 transfer_list);
336 return RUNNING_STATE;
337 } else
338 return DONE_STATE;
339}
340
Stephen Streete0c99052006-03-07 23:53:24 -0800341/* caller already set message->status; dma and pio irqs are blocked */
Stephen Street5daa3ba2006-05-20 15:00:19 -0700342static void giveback(struct driver_data *drv_data)
Stephen Streete0c99052006-03-07 23:53:24 -0800343{
344 struct spi_transfer* last_transfer;
Stephen Street5daa3ba2006-05-20 15:00:19 -0700345 struct spi_message *msg;
Stephen Streete0c99052006-03-07 23:53:24 -0800346
Stephen Street5daa3ba2006-05-20 15:00:19 -0700347 msg = drv_data->cur_msg;
348 drv_data->cur_msg = NULL;
349 drv_data->cur_transfer = NULL;
Stephen Street5daa3ba2006-05-20 15:00:19 -0700350
351 last_transfer = list_entry(msg->transfers.prev,
Stephen Streete0c99052006-03-07 23:53:24 -0800352 struct spi_transfer,
353 transfer_list);
354
Ned Forrester84235972008-09-13 02:33:17 -0700355 /* Delay if requested before any change in chip select */
356 if (last_transfer->delay_usecs)
357 udelay(last_transfer->delay_usecs);
358
359 /* Drop chip select UNLESS cs_change is true or we are returning
360 * a message with an error, or next message is for another chip
361 */
Stephen Streete0c99052006-03-07 23:53:24 -0800362 if (!last_transfer->cs_change)
Eric Miaoa7bb3902009-04-06 19:00:54 -0700363 cs_deassert(drv_data);
Ned Forrester84235972008-09-13 02:33:17 -0700364 else {
365 struct spi_message *next_msg;
366
367 /* Holding of cs was hinted, but we need to make sure
368 * the next message is for the same chip. Don't waste
369 * time with the following tests unless this was hinted.
370 *
371 * We cannot postpone this until pump_messages, because
372 * after calling msg->complete (below) the driver that
373 * sent the current message could be unloaded, which
374 * could invalidate the cs_control() callback...
375 */
376
377 /* get a pointer to the next message, if any */
Mika Westerberg7f86bde2013-01-22 12:26:26 +0200378 next_msg = spi_get_next_queued_message(drv_data->master);
Ned Forrester84235972008-09-13 02:33:17 -0700379
380 /* see if the next and current messages point
381 * to the same chip
382 */
383 if (next_msg && next_msg->spi != msg->spi)
384 next_msg = NULL;
385 if (!next_msg || msg->state == ERROR_STATE)
Eric Miaoa7bb3902009-04-06 19:00:54 -0700386 cs_deassert(drv_data);
Ned Forrester84235972008-09-13 02:33:17 -0700387 }
Stephen Streete0c99052006-03-07 23:53:24 -0800388
Mika Westerberg7f86bde2013-01-22 12:26:26 +0200389 spi_finalize_current_message(drv_data->master);
Eric Miaoa7bb3902009-04-06 19:00:54 -0700390 drv_data->cur_chip = NULL;
Stephen Streete0c99052006-03-07 23:53:24 -0800391}
392
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800393static void reset_sccr1(struct driver_data *drv_data)
394{
395 void __iomem *reg = drv_data->ioaddr;
396 struct chip_data *chip = drv_data->cur_chip;
397 u32 sccr1_reg;
398
399 sccr1_reg = read_SSCR1(reg) & ~drv_data->int_cr1;
400 sccr1_reg &= ~SSCR1_RFT;
401 sccr1_reg |= chip->threshold;
402 write_SSCR1(sccr1_reg, reg);
403}
404
Stephen Street8d94cc52006-12-10 02:18:54 -0800405static void int_error_stop(struct driver_data *drv_data, const char* msg)
406{
David Brownellcf433692008-04-28 02:14:17 -0700407 void __iomem *reg = drv_data->ioaddr;
Stephen Street8d94cc52006-12-10 02:18:54 -0800408
409 /* Stop and reset SSP */
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800410 write_SSSR_CS(drv_data, drv_data->clear_sr);
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800411 reset_sccr1(drv_data);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800412 if (!pxa25x_ssp_comp(drv_data))
Stephen Street8d94cc52006-12-10 02:18:54 -0800413 write_SSTO(0, reg);
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200414 pxa2xx_spi_flush(drv_data);
Stephen Street8d94cc52006-12-10 02:18:54 -0800415 write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
416
417 dev_err(&drv_data->pdev->dev, "%s\n", msg);
418
419 drv_data->cur_msg->state = ERROR_STATE;
420 tasklet_schedule(&drv_data->pump_transfers);
421}
422
423static void int_transfer_complete(struct driver_data *drv_data)
424{
David Brownellcf433692008-04-28 02:14:17 -0700425 void __iomem *reg = drv_data->ioaddr;
Stephen Street8d94cc52006-12-10 02:18:54 -0800426
427 /* Stop SSP */
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800428 write_SSSR_CS(drv_data, drv_data->clear_sr);
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800429 reset_sccr1(drv_data);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800430 if (!pxa25x_ssp_comp(drv_data))
Stephen Street8d94cc52006-12-10 02:18:54 -0800431 write_SSTO(0, reg);
432
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300433 /* Update total byte transferred return count actual bytes read */
Stephen Street8d94cc52006-12-10 02:18:54 -0800434 drv_data->cur_msg->actual_length += drv_data->len -
435 (drv_data->rx_end - drv_data->rx);
436
Ned Forrester84235972008-09-13 02:33:17 -0700437 /* Transfer delays and chip select release are
438 * handled in pump_transfers or giveback
439 */
Stephen Street8d94cc52006-12-10 02:18:54 -0800440
441 /* Move to next transfer */
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200442 drv_data->cur_msg->state = pxa2xx_spi_next_transfer(drv_data);
Stephen Street8d94cc52006-12-10 02:18:54 -0800443
444 /* Schedule transfer tasklet */
445 tasklet_schedule(&drv_data->pump_transfers);
446}
447
Stephen Streete0c99052006-03-07 23:53:24 -0800448static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
449{
David Brownellcf433692008-04-28 02:14:17 -0700450 void __iomem *reg = drv_data->ioaddr;
Stephen Street8d94cc52006-12-10 02:18:54 -0800451
Stephen Street5daa3ba2006-05-20 15:00:19 -0700452 u32 irq_mask = (read_SSCR1(reg) & SSCR1_TIE) ?
453 drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS;
Stephen Streete0c99052006-03-07 23:53:24 -0800454
Stephen Street8d94cc52006-12-10 02:18:54 -0800455 u32 irq_status = read_SSSR(reg) & irq_mask;
Stephen Streete0c99052006-03-07 23:53:24 -0800456
Stephen Street8d94cc52006-12-10 02:18:54 -0800457 if (irq_status & SSSR_ROR) {
458 int_error_stop(drv_data, "interrupt_transfer: fifo overrun");
459 return IRQ_HANDLED;
460 }
Stephen Streete0c99052006-03-07 23:53:24 -0800461
Stephen Street8d94cc52006-12-10 02:18:54 -0800462 if (irq_status & SSSR_TINT) {
463 write_SSSR(SSSR_TINT, reg);
464 if (drv_data->read(drv_data)) {
465 int_transfer_complete(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800466 return IRQ_HANDLED;
467 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800468 }
Stephen Streete0c99052006-03-07 23:53:24 -0800469
Stephen Street8d94cc52006-12-10 02:18:54 -0800470 /* Drain rx fifo, Fill tx fifo and prevent overruns */
471 do {
472 if (drv_data->read(drv_data)) {
473 int_transfer_complete(drv_data);
474 return IRQ_HANDLED;
Stephen Streete0c99052006-03-07 23:53:24 -0800475 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800476 } while (drv_data->write(drv_data));
Stephen Streete0c99052006-03-07 23:53:24 -0800477
Stephen Street8d94cc52006-12-10 02:18:54 -0800478 if (drv_data->read(drv_data)) {
479 int_transfer_complete(drv_data);
480 return IRQ_HANDLED;
481 }
Stephen Streete0c99052006-03-07 23:53:24 -0800482
Stephen Street8d94cc52006-12-10 02:18:54 -0800483 if (drv_data->tx == drv_data->tx_end) {
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800484 u32 bytes_left;
485 u32 sccr1_reg;
486
487 sccr1_reg = read_SSCR1(reg);
488 sccr1_reg &= ~SSCR1_TIE;
489
490 /*
491 * PXA25x_SSP has no timeout, set up rx threshould for the
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300492 * remaining RX bytes.
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800493 */
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800494 if (pxa25x_ssp_comp(drv_data)) {
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800495
496 sccr1_reg &= ~SSCR1_RFT;
497
498 bytes_left = drv_data->rx_end - drv_data->rx;
499 switch (drv_data->n_bytes) {
500 case 4:
501 bytes_left >>= 1;
502 case 2:
503 bytes_left >>= 1;
Stephen Street8d94cc52006-12-10 02:18:54 -0800504 }
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800505
506 if (bytes_left > RX_THRESH_DFLT)
507 bytes_left = RX_THRESH_DFLT;
508
509 sccr1_reg |= SSCR1_RxTresh(bytes_left);
Stephen Streete0c99052006-03-07 23:53:24 -0800510 }
Sebastian Andrzej Siewior579d3bb2010-11-22 17:12:17 -0800511 write_SSCR1(sccr1_reg, reg);
Stephen Streete0c99052006-03-07 23:53:24 -0800512 }
513
Stephen Street5daa3ba2006-05-20 15:00:19 -0700514 /* We did something */
515 return IRQ_HANDLED;
Stephen Streete0c99052006-03-07 23:53:24 -0800516}
517
David Howells7d12e782006-10-05 14:55:46 +0100518static irqreturn_t ssp_int(int irq, void *dev_id)
Stephen Streete0c99052006-03-07 23:53:24 -0800519{
Jeff Garzikc7bec5a2006-10-06 15:00:58 -0400520 struct driver_data *drv_data = dev_id;
David Brownellcf433692008-04-28 02:14:17 -0700521 void __iomem *reg = drv_data->ioaddr;
Mika Westerberg7d94a502013-01-22 12:26:30 +0200522 u32 sccr1_reg;
Sebastian Andrzej Siewior49cbb1e2010-11-22 17:12:14 -0800523 u32 mask = drv_data->mask_sr;
524 u32 status;
525
Mika Westerberg7d94a502013-01-22 12:26:30 +0200526 /*
527 * The IRQ might be shared with other peripherals so we must first
528 * check that are we RPM suspended or not. If we are we assume that
529 * the IRQ was not for us (we shouldn't be RPM suspended when the
530 * interrupt is enabled).
531 */
532 if (pm_runtime_suspended(&drv_data->pdev->dev))
533 return IRQ_NONE;
534
535 sccr1_reg = read_SSCR1(reg);
Sebastian Andrzej Siewior49cbb1e2010-11-22 17:12:14 -0800536 status = read_SSSR(reg);
537
538 /* Ignore possible writes if we don't need to write */
539 if (!(sccr1_reg & SSCR1_TIE))
540 mask &= ~SSSR_TFS;
541
542 if (!(status & mask))
543 return IRQ_NONE;
Stephen Streete0c99052006-03-07 23:53:24 -0800544
545 if (!drv_data->cur_msg) {
Stephen Street5daa3ba2006-05-20 15:00:19 -0700546
547 write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg);
548 write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800549 if (!pxa25x_ssp_comp(drv_data))
Stephen Street5daa3ba2006-05-20 15:00:19 -0700550 write_SSTO(0, reg);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800551 write_SSSR_CS(drv_data, drv_data->clear_sr);
Stephen Street5daa3ba2006-05-20 15:00:19 -0700552
Stephen Streete0c99052006-03-07 23:53:24 -0800553 dev_err(&drv_data->pdev->dev, "bad message state "
Stephen Street8d94cc52006-12-10 02:18:54 -0800554 "in interrupt handler\n");
Stephen Street5daa3ba2006-05-20 15:00:19 -0700555
Stephen Streete0c99052006-03-07 23:53:24 -0800556 /* Never fail */
557 return IRQ_HANDLED;
558 }
559
560 return drv_data->transfer_handler(drv_data);
561}
562
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200563static unsigned int ssp_get_clk_div(struct driver_data *drv_data, int rate)
eric miao2f1a74e2007-11-21 18:50:53 +0800564{
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200565 unsigned long ssp_clk = drv_data->max_clk_rate;
566 const struct ssp_device *ssp = drv_data->ssp;
567
568 rate = min_t(int, ssp_clk, rate);
eric miao2f1a74e2007-11-21 18:50:53 +0800569
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800570 if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP)
eric miao2f1a74e2007-11-21 18:50:53 +0800571 return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
572 else
573 return ((ssp_clk / rate - 1) & 0xfff) << 8;
574}
575
Stephen Streete0c99052006-03-07 23:53:24 -0800576static void pump_transfers(unsigned long data)
577{
578 struct driver_data *drv_data = (struct driver_data *)data;
579 struct spi_message *message = NULL;
580 struct spi_transfer *transfer = NULL;
581 struct spi_transfer *previous = NULL;
582 struct chip_data *chip = NULL;
David Brownellcf433692008-04-28 02:14:17 -0700583 void __iomem *reg = drv_data->ioaddr;
Stephen Street9708c122006-03-28 14:05:23 -0800584 u32 clk_div = 0;
585 u8 bits = 0;
586 u32 speed = 0;
587 u32 cr0;
Stephen Street8d94cc52006-12-10 02:18:54 -0800588 u32 cr1;
589 u32 dma_thresh = drv_data->cur_chip->dma_threshold;
590 u32 dma_burst = drv_data->cur_chip->dma_burst_size;
Stephen Streete0c99052006-03-07 23:53:24 -0800591
592 /* Get current state information */
593 message = drv_data->cur_msg;
594 transfer = drv_data->cur_transfer;
595 chip = drv_data->cur_chip;
596
597 /* Handle for abort */
598 if (message->state == ERROR_STATE) {
599 message->status = -EIO;
Stephen Street5daa3ba2006-05-20 15:00:19 -0700600 giveback(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800601 return;
602 }
603
604 /* Handle end of message */
605 if (message->state == DONE_STATE) {
606 message->status = 0;
Stephen Street5daa3ba2006-05-20 15:00:19 -0700607 giveback(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800608 return;
609 }
610
Ned Forrester84235972008-09-13 02:33:17 -0700611 /* Delay if requested at end of transfer before CS change */
Stephen Streete0c99052006-03-07 23:53:24 -0800612 if (message->state == RUNNING_STATE) {
613 previous = list_entry(transfer->transfer_list.prev,
614 struct spi_transfer,
615 transfer_list);
616 if (previous->delay_usecs)
617 udelay(previous->delay_usecs);
Ned Forrester84235972008-09-13 02:33:17 -0700618
619 /* Drop chip select only if cs_change is requested */
620 if (previous->cs_change)
Eric Miaoa7bb3902009-04-06 19:00:54 -0700621 cs_deassert(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800622 }
623
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200624 /* Check if we can DMA this transfer */
625 if (!pxa2xx_spi_dma_is_possible(transfer->len) && chip->enable_dma) {
Ned Forrester7e964452008-09-13 02:33:18 -0700626
627 /* reject already-mapped transfers; PIO won't always work */
628 if (message->is_dma_mapped
629 || transfer->rx_dma || transfer->tx_dma) {
630 dev_err(&drv_data->pdev->dev,
631 "pump_transfers: mapped transfer length "
Mike Rapoport20b918d2008-10-01 10:39:24 -0700632 "of %u is greater than %d\n",
Ned Forrester7e964452008-09-13 02:33:18 -0700633 transfer->len, MAX_DMA_LEN);
634 message->status = -EINVAL;
635 giveback(drv_data);
636 return;
637 }
638
639 /* warn ... we force this to PIO mode */
640 if (printk_ratelimit())
641 dev_warn(&message->spi->dev, "pump_transfers: "
642 "DMA disabled for transfer length %ld "
643 "greater than %d\n",
644 (long)drv_data->len, MAX_DMA_LEN);
Stephen Street8d94cc52006-12-10 02:18:54 -0800645 }
646
Stephen Streete0c99052006-03-07 23:53:24 -0800647 /* Setup the transfer state based on the type of transfer */
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200648 if (pxa2xx_spi_flush(drv_data) == 0) {
Stephen Streete0c99052006-03-07 23:53:24 -0800649 dev_err(&drv_data->pdev->dev, "pump_transfers: flush failed\n");
650 message->status = -EIO;
Stephen Street5daa3ba2006-05-20 15:00:19 -0700651 giveback(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800652 return;
653 }
Stephen Street9708c122006-03-28 14:05:23 -0800654 drv_data->n_bytes = chip->n_bytes;
Stephen Streete0c99052006-03-07 23:53:24 -0800655 drv_data->tx = (void *)transfer->tx_buf;
656 drv_data->tx_end = drv_data->tx + transfer->len;
657 drv_data->rx = transfer->rx_buf;
658 drv_data->rx_end = drv_data->rx + transfer->len;
659 drv_data->rx_dma = transfer->rx_dma;
660 drv_data->tx_dma = transfer->tx_dma;
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200661 drv_data->len = transfer->len;
Stephen Streete0c99052006-03-07 23:53:24 -0800662 drv_data->write = drv_data->tx ? chip->write : null_writer;
663 drv_data->read = drv_data->rx ? chip->read : null_reader;
Stephen Street9708c122006-03-28 14:05:23 -0800664
665 /* Change speed and bit per word on a per transfer */
Stephen Street8d94cc52006-12-10 02:18:54 -0800666 cr0 = chip->cr0;
Stephen Street9708c122006-03-28 14:05:23 -0800667 if (transfer->speed_hz || transfer->bits_per_word) {
668
Stephen Street9708c122006-03-28 14:05:23 -0800669 bits = chip->bits_per_word;
670 speed = chip->speed_hz;
671
672 if (transfer->speed_hz)
673 speed = transfer->speed_hz;
674
675 if (transfer->bits_per_word)
676 bits = transfer->bits_per_word;
677
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200678 clk_div = ssp_get_clk_div(drv_data, speed);
Stephen Street9708c122006-03-28 14:05:23 -0800679
680 if (bits <= 8) {
681 drv_data->n_bytes = 1;
Stephen Street9708c122006-03-28 14:05:23 -0800682 drv_data->read = drv_data->read != null_reader ?
683 u8_reader : null_reader;
684 drv_data->write = drv_data->write != null_writer ?
685 u8_writer : null_writer;
686 } else if (bits <= 16) {
687 drv_data->n_bytes = 2;
Stephen Street9708c122006-03-28 14:05:23 -0800688 drv_data->read = drv_data->read != null_reader ?
689 u16_reader : null_reader;
690 drv_data->write = drv_data->write != null_writer ?
691 u16_writer : null_writer;
692 } else if (bits <= 32) {
693 drv_data->n_bytes = 4;
Stephen Street9708c122006-03-28 14:05:23 -0800694 drv_data->read = drv_data->read != null_reader ?
695 u32_reader : null_reader;
696 drv_data->write = drv_data->write != null_writer ?
697 u32_writer : null_writer;
698 }
Stephen Street8d94cc52006-12-10 02:18:54 -0800699 /* if bits/word is changed in dma mode, then must check the
700 * thresholds and burst also */
701 if (chip->enable_dma) {
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200702 if (pxa2xx_spi_set_dma_burst_and_threshold(chip,
703 message->spi,
Stephen Street8d94cc52006-12-10 02:18:54 -0800704 bits, &dma_burst,
705 &dma_thresh))
706 if (printk_ratelimit())
707 dev_warn(&message->spi->dev,
Ned Forrester7e964452008-09-13 02:33:18 -0700708 "pump_transfers: "
Stephen Street8d94cc52006-12-10 02:18:54 -0800709 "DMA burst size reduced to "
710 "match bits_per_word\n");
711 }
Stephen Street9708c122006-03-28 14:05:23 -0800712
713 cr0 = clk_div
714 | SSCR0_Motorola
Stephen Street5daa3ba2006-05-20 15:00:19 -0700715 | SSCR0_DataSize(bits > 16 ? bits - 16 : bits)
Stephen Street9708c122006-03-28 14:05:23 -0800716 | SSCR0_SSE
717 | (bits > 16 ? SSCR0_EDSS : 0);
Stephen Street9708c122006-03-28 14:05:23 -0800718 }
719
Stephen Streete0c99052006-03-07 23:53:24 -0800720 message->state = RUNNING_STATE;
721
Ned Forrester7e964452008-09-13 02:33:18 -0700722 drv_data->dma_mapped = 0;
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200723 if (pxa2xx_spi_dma_is_possible(drv_data->len))
724 drv_data->dma_mapped = pxa2xx_spi_map_dma_buffers(drv_data);
Ned Forrester7e964452008-09-13 02:33:18 -0700725 if (drv_data->dma_mapped) {
Stephen Streete0c99052006-03-07 23:53:24 -0800726
727 /* Ensure we have the correct interrupt handler */
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200728 drv_data->transfer_handler = pxa2xx_spi_dma_transfer;
Stephen Streete0c99052006-03-07 23:53:24 -0800729
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200730 pxa2xx_spi_dma_prepare(drv_data, dma_burst);
Stephen Streete0c99052006-03-07 23:53:24 -0800731
Stephen Street8d94cc52006-12-10 02:18:54 -0800732 /* Clear status and start DMA engine */
733 cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1;
Stephen Streete0c99052006-03-07 23:53:24 -0800734 write_SSSR(drv_data->clear_sr, reg);
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200735
736 pxa2xx_spi_dma_start(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -0800737 } else {
738 /* Ensure we have the correct interrupt handler */
739 drv_data->transfer_handler = interrupt_transfer;
740
Stephen Street8d94cc52006-12-10 02:18:54 -0800741 /* Clear status */
742 cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1;
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800743 write_SSSR_CS(drv_data, drv_data->clear_sr);
Stephen Street8d94cc52006-12-10 02:18:54 -0800744 }
745
Mika Westerberga0d26422013-01-22 12:26:32 +0200746 if (is_lpss_ssp(drv_data)) {
747 if ((read_SSIRF(reg) & 0xff) != chip->lpss_rx_threshold)
748 write_SSIRF(chip->lpss_rx_threshold, reg);
749 if ((read_SSITF(reg) & 0xffff) != chip->lpss_tx_threshold)
750 write_SSITF(chip->lpss_tx_threshold, reg);
751 }
752
Stephen Street8d94cc52006-12-10 02:18:54 -0800753 /* see if we need to reload the config registers */
754 if ((read_SSCR0(reg) != cr0)
755 || (read_SSCR1(reg) & SSCR1_CHANGE_MASK) !=
756 (cr1 & SSCR1_CHANGE_MASK)) {
757
Ned Forresterb97c74b2008-02-23 15:23:40 -0800758 /* stop the SSP, and update the other bits */
Stephen Street8d94cc52006-12-10 02:18:54 -0800759 write_SSCR0(cr0 & ~SSCR0_SSE, reg);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800760 if (!pxa25x_ssp_comp(drv_data))
Stephen Streete0c99052006-03-07 23:53:24 -0800761 write_SSTO(chip->timeout, reg);
Ned Forresterb97c74b2008-02-23 15:23:40 -0800762 /* first set CR1 without interrupt and service enables */
763 write_SSCR1(cr1 & SSCR1_CHANGE_MASK, reg);
764 /* restart the SSP */
Stephen Street8d94cc52006-12-10 02:18:54 -0800765 write_SSCR0(cr0, reg);
Ned Forresterb97c74b2008-02-23 15:23:40 -0800766
Stephen Street8d94cc52006-12-10 02:18:54 -0800767 } else {
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800768 if (!pxa25x_ssp_comp(drv_data))
Stephen Street8d94cc52006-12-10 02:18:54 -0800769 write_SSTO(chip->timeout, reg);
Stephen Streete0c99052006-03-07 23:53:24 -0800770 }
Ned Forresterb97c74b2008-02-23 15:23:40 -0800771
Eric Miaoa7bb3902009-04-06 19:00:54 -0700772 cs_assert(drv_data);
Ned Forresterb97c74b2008-02-23 15:23:40 -0800773
774 /* after chip select, release the data by enabling service
775 * requests and interrupts, without changing any mode bits */
776 write_SSCR1(cr1, reg);
Stephen Streete0c99052006-03-07 23:53:24 -0800777}
778
Mika Westerberg7f86bde2013-01-22 12:26:26 +0200779static int pxa2xx_spi_transfer_one_message(struct spi_master *master,
780 struct spi_message *msg)
Stephen Streete0c99052006-03-07 23:53:24 -0800781{
Mika Westerberg7f86bde2013-01-22 12:26:26 +0200782 struct driver_data *drv_data = spi_master_get_devdata(master);
Stephen Streete0c99052006-03-07 23:53:24 -0800783
Mika Westerberg7f86bde2013-01-22 12:26:26 +0200784 drv_data->cur_msg = msg;
Stephen Streete0c99052006-03-07 23:53:24 -0800785 /* Initial message state*/
786 drv_data->cur_msg->state = START_STATE;
787 drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next,
788 struct spi_transfer,
789 transfer_list);
790
Stephen Street8d94cc52006-12-10 02:18:54 -0800791 /* prepare to setup the SSP, in pump_transfers, using the per
792 * chip configuration */
Stephen Streete0c99052006-03-07 23:53:24 -0800793 drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi);
Stephen Streete0c99052006-03-07 23:53:24 -0800794
795 /* Mark as busy and launch transfers */
796 tasklet_schedule(&drv_data->pump_transfers);
Stephen Streete0c99052006-03-07 23:53:24 -0800797 return 0;
798}
799
Mika Westerberg7d94a502013-01-22 12:26:30 +0200800static int pxa2xx_spi_prepare_transfer(struct spi_master *master)
801{
802 struct driver_data *drv_data = spi_master_get_devdata(master);
803
804 pm_runtime_get_sync(&drv_data->pdev->dev);
805 return 0;
806}
807
808static int pxa2xx_spi_unprepare_transfer(struct spi_master *master)
809{
810 struct driver_data *drv_data = spi_master_get_devdata(master);
811
812 /* Disable the SSP now */
813 write_SSCR0(read_SSCR0(drv_data->ioaddr) & ~SSCR0_SSE,
814 drv_data->ioaddr);
815
816 pm_runtime_mark_last_busy(&drv_data->pdev->dev);
817 pm_runtime_put_autosuspend(&drv_data->pdev->dev);
818 return 0;
819}
820
Eric Miaoa7bb3902009-04-06 19:00:54 -0700821static int setup_cs(struct spi_device *spi, struct chip_data *chip,
822 struct pxa2xx_spi_chip *chip_info)
823{
824 int err = 0;
825
826 if (chip == NULL || chip_info == NULL)
827 return 0;
828
829 /* NOTE: setup() can be called multiple times, possibly with
830 * different chip_info, release previously requested GPIO
831 */
832 if (gpio_is_valid(chip->gpio_cs))
833 gpio_free(chip->gpio_cs);
834
835 /* If (*cs_control) is provided, ignore GPIO chip select */
836 if (chip_info->cs_control) {
837 chip->cs_control = chip_info->cs_control;
838 return 0;
839 }
840
841 if (gpio_is_valid(chip_info->gpio_cs)) {
842 err = gpio_request(chip_info->gpio_cs, "SPI_CS");
843 if (err) {
844 dev_err(&spi->dev, "failed to request chip select "
845 "GPIO%d\n", chip_info->gpio_cs);
846 return err;
847 }
848
849 chip->gpio_cs = chip_info->gpio_cs;
850 chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH;
851
852 err = gpio_direction_output(chip->gpio_cs,
853 !chip->gpio_cs_inverted);
854 }
855
856 return err;
857}
858
Stephen Streete0c99052006-03-07 23:53:24 -0800859static int setup(struct spi_device *spi)
860{
861 struct pxa2xx_spi_chip *chip_info = NULL;
862 struct chip_data *chip;
863 struct driver_data *drv_data = spi_master_get_devdata(spi->master);
864 unsigned int clk_div;
Mika Westerberga0d26422013-01-22 12:26:32 +0200865 uint tx_thres, tx_hi_thres, rx_thres;
866
867 if (is_lpss_ssp(drv_data)) {
868 tx_thres = LPSS_TX_LOTHRESH_DFLT;
869 tx_hi_thres = LPSS_TX_HITHRESH_DFLT;
870 rx_thres = LPSS_RX_THRESH_DFLT;
871 } else {
872 tx_thres = TX_THRESH_DFLT;
873 tx_hi_thres = 0;
874 rx_thres = RX_THRESH_DFLT;
875 }
Stephen Streete0c99052006-03-07 23:53:24 -0800876
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800877 if (!pxa25x_ssp_comp(drv_data)
Stephen Street8d94cc52006-12-10 02:18:54 -0800878 && (spi->bits_per_word < 4 || spi->bits_per_word > 32)) {
879 dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
880 "b/w not 4-32 for type non-PXA25x_SSP\n",
881 drv_data->ssp_type, spi->bits_per_word);
Stephen Streete0c99052006-03-07 23:53:24 -0800882 return -EINVAL;
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800883 } else if (pxa25x_ssp_comp(drv_data)
Stephen Street8d94cc52006-12-10 02:18:54 -0800884 && (spi->bits_per_word < 4
885 || spi->bits_per_word > 16)) {
886 dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
887 "b/w not 4-16 for type PXA25x_SSP\n",
888 drv_data->ssp_type, spi->bits_per_word);
Stephen Streete0c99052006-03-07 23:53:24 -0800889 return -EINVAL;
Stephen Street8d94cc52006-12-10 02:18:54 -0800890 }
Stephen Streete0c99052006-03-07 23:53:24 -0800891
Stephen Street8d94cc52006-12-10 02:18:54 -0800892 /* Only alloc on first setup */
Stephen Streete0c99052006-03-07 23:53:24 -0800893 chip = spi_get_ctldata(spi);
Stephen Street8d94cc52006-12-10 02:18:54 -0800894 if (!chip) {
Stephen Streete0c99052006-03-07 23:53:24 -0800895 chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
Stephen Street8d94cc52006-12-10 02:18:54 -0800896 if (!chip) {
897 dev_err(&spi->dev,
898 "failed setup: can't allocate chip data\n");
Stephen Streete0c99052006-03-07 23:53:24 -0800899 return -ENOMEM;
Stephen Street8d94cc52006-12-10 02:18:54 -0800900 }
Stephen Streete0c99052006-03-07 23:53:24 -0800901
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800902 if (drv_data->ssp_type == CE4100_SSP) {
903 if (spi->chip_select > 4) {
904 dev_err(&spi->dev, "failed setup: "
905 "cs number must not be > 4.\n");
906 kfree(chip);
907 return -EINVAL;
908 }
909
910 chip->frm = spi->chip_select;
911 } else
912 chip->gpio_cs = -1;
Stephen Streete0c99052006-03-07 23:53:24 -0800913 chip->enable_dma = 0;
Vernon Sauderf1f640a2008-10-15 22:02:43 -0700914 chip->timeout = TIMOUT_DFLT;
Stephen Streete0c99052006-03-07 23:53:24 -0800915 }
916
Stephen Street8d94cc52006-12-10 02:18:54 -0800917 /* protocol drivers may change the chip settings, so...
918 * if chip_info exists, use it */
919 chip_info = spi->controller_data;
920
Stephen Streete0c99052006-03-07 23:53:24 -0800921 /* chip_info isn't always needed */
Stephen Street8d94cc52006-12-10 02:18:54 -0800922 chip->cr1 = 0;
Stephen Streete0c99052006-03-07 23:53:24 -0800923 if (chip_info) {
Vernon Sauderf1f640a2008-10-15 22:02:43 -0700924 if (chip_info->timeout)
925 chip->timeout = chip_info->timeout;
926 if (chip_info->tx_threshold)
927 tx_thres = chip_info->tx_threshold;
Mika Westerberga0d26422013-01-22 12:26:32 +0200928 if (chip_info->tx_hi_threshold)
929 tx_hi_thres = chip_info->tx_hi_threshold;
Vernon Sauderf1f640a2008-10-15 22:02:43 -0700930 if (chip_info->rx_threshold)
931 rx_thres = chip_info->rx_threshold;
932 chip->enable_dma = drv_data->master_info->enable_dma;
Stephen Streete0c99052006-03-07 23:53:24 -0800933 chip->dma_threshold = 0;
Stephen Streete0c99052006-03-07 23:53:24 -0800934 if (chip_info->enable_loopback)
935 chip->cr1 = SSCR1_LBM;
936 }
937
Vernon Sauderf1f640a2008-10-15 22:02:43 -0700938 chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) |
939 (SSCR1_TxTresh(tx_thres) & SSCR1_TFT);
940
Mika Westerberga0d26422013-01-22 12:26:32 +0200941 chip->lpss_rx_threshold = SSIRF_RxThresh(rx_thres);
942 chip->lpss_tx_threshold = SSITF_TxLoThresh(tx_thres)
943 | SSITF_TxHiThresh(tx_hi_thres);
944
Stephen Street8d94cc52006-12-10 02:18:54 -0800945 /* set dma burst and threshold outside of chip_info path so that if
946 * chip_info goes away after setting chip->enable_dma, the
947 * burst and threshold can still respond to changes in bits_per_word */
948 if (chip->enable_dma) {
949 /* set up legal burst and threshold for dma */
Mika Westerbergcd7bed02013-01-22 12:26:28 +0200950 if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi,
951 spi->bits_per_word,
Stephen Street8d94cc52006-12-10 02:18:54 -0800952 &chip->dma_burst_size,
953 &chip->dma_threshold)) {
954 dev_warn(&spi->dev, "in setup: DMA burst size reduced "
955 "to match bits_per_word\n");
956 }
957 }
958
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200959 clk_div = ssp_get_clk_div(drv_data, spi->max_speed_hz);
Stephen Street9708c122006-03-28 14:05:23 -0800960 chip->speed_hz = spi->max_speed_hz;
Stephen Streete0c99052006-03-07 23:53:24 -0800961
962 chip->cr0 = clk_div
963 | SSCR0_Motorola
Stephen Street5daa3ba2006-05-20 15:00:19 -0700964 | SSCR0_DataSize(spi->bits_per_word > 16 ?
965 spi->bits_per_word - 16 : spi->bits_per_word)
Stephen Streete0c99052006-03-07 23:53:24 -0800966 | SSCR0_SSE
967 | (spi->bits_per_word > 16 ? SSCR0_EDSS : 0);
Justin Clacherty7f6ee1a2007-01-26 00:56:44 -0800968 chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH);
969 chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0)
970 | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0);
Stephen Streete0c99052006-03-07 23:53:24 -0800971
Mika Westerbergb8331722013-01-22 12:26:31 +0200972 if (spi->mode & SPI_LOOP)
973 chip->cr1 |= SSCR1_LBM;
974
Stephen Streete0c99052006-03-07 23:53:24 -0800975 /* NOTE: PXA25x_SSP _could_ use external clocking ... */
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -0800976 if (!pxa25x_ssp_comp(drv_data))
David Brownell7d077192009-06-17 16:26:03 -0700977 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200978 drv_data->max_clk_rate
Eric Miaoc9840da2010-03-16 16:48:01 +0800979 / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)),
980 chip->enable_dma ? "DMA" : "PIO");
Stephen Streete0c99052006-03-07 23:53:24 -0800981 else
David Brownell7d077192009-06-17 16:26:03 -0700982 dev_dbg(&spi->dev, "%ld Hz actual, %s\n",
Mika Westerberg3343b7a2013-01-22 12:26:27 +0200983 drv_data->max_clk_rate / 2
Eric Miaoc9840da2010-03-16 16:48:01 +0800984 / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)),
985 chip->enable_dma ? "DMA" : "PIO");
Stephen Streete0c99052006-03-07 23:53:24 -0800986
987 if (spi->bits_per_word <= 8) {
988 chip->n_bytes = 1;
Stephen Streete0c99052006-03-07 23:53:24 -0800989 chip->read = u8_reader;
990 chip->write = u8_writer;
991 } else if (spi->bits_per_word <= 16) {
992 chip->n_bytes = 2;
Stephen Streete0c99052006-03-07 23:53:24 -0800993 chip->read = u16_reader;
994 chip->write = u16_writer;
995 } else if (spi->bits_per_word <= 32) {
996 chip->cr0 |= SSCR0_EDSS;
997 chip->n_bytes = 4;
Stephen Streete0c99052006-03-07 23:53:24 -0800998 chip->read = u32_reader;
999 chip->write = u32_writer;
1000 } else {
1001 dev_err(&spi->dev, "invalid wordsize\n");
Stephen Streete0c99052006-03-07 23:53:24 -08001002 return -ENODEV;
1003 }
Stephen Street9708c122006-03-28 14:05:23 -08001004 chip->bits_per_word = spi->bits_per_word;
Stephen Streete0c99052006-03-07 23:53:24 -08001005
1006 spi_set_ctldata(spi, chip);
1007
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -08001008 if (drv_data->ssp_type == CE4100_SSP)
1009 return 0;
1010
Eric Miaoa7bb3902009-04-06 19:00:54 -07001011 return setup_cs(spi, chip, chip_info);
Stephen Streete0c99052006-03-07 23:53:24 -08001012}
1013
Hans-Peter Nilsson0ffa0282007-02-12 00:52:45 -08001014static void cleanup(struct spi_device *spi)
Stephen Streete0c99052006-03-07 23:53:24 -08001015{
Hans-Peter Nilsson0ffa0282007-02-12 00:52:45 -08001016 struct chip_data *chip = spi_get_ctldata(spi);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -08001017 struct driver_data *drv_data = spi_master_get_devdata(spi->master);
Stephen Streete0c99052006-03-07 23:53:24 -08001018
Daniel Ribeiro7348d822009-05-12 13:19:36 -07001019 if (!chip)
1020 return;
1021
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -08001022 if (drv_data->ssp_type != CE4100_SSP && gpio_is_valid(chip->gpio_cs))
Eric Miaoa7bb3902009-04-06 19:00:54 -07001023 gpio_free(chip->gpio_cs);
1024
Stephen Streete0c99052006-03-07 23:53:24 -08001025 kfree(chip);
1026}
1027
Grant Likelyfd4a3192012-12-07 16:57:14 +00001028static int pxa2xx_spi_probe(struct platform_device *pdev)
Stephen Streete0c99052006-03-07 23:53:24 -08001029{
1030 struct device *dev = &pdev->dev;
1031 struct pxa2xx_spi_master *platform_info;
1032 struct spi_master *master;
Guennadi Liakhovetski65a00a22008-10-15 22:02:42 -07001033 struct driver_data *drv_data;
eric miao2f1a74e2007-11-21 18:50:53 +08001034 struct ssp_device *ssp;
Guennadi Liakhovetski65a00a22008-10-15 22:02:42 -07001035 int status;
Stephen Streete0c99052006-03-07 23:53:24 -08001036
Mika Westerberg851bacf2013-01-07 12:44:33 +02001037 platform_info = dev_get_platdata(dev);
1038 if (!platform_info) {
1039 dev_err(&pdev->dev, "missing platform data\n");
1040 return -ENODEV;
1041 }
Stephen Streete0c99052006-03-07 23:53:24 -08001042
Haojian Zhuangbaffe162010-05-05 10:11:15 -04001043 ssp = pxa_ssp_request(pdev->id, pdev->name);
Mika Westerberg851bacf2013-01-07 12:44:33 +02001044 if (!ssp)
1045 ssp = &platform_info->ssp;
1046
1047 if (!ssp->mmio_base) {
1048 dev_err(&pdev->dev, "failed to get ssp\n");
Stephen Streete0c99052006-03-07 23:53:24 -08001049 return -ENODEV;
1050 }
1051
1052 /* Allocate master with space for drv_data and null dma buffer */
1053 master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
1054 if (!master) {
Guennadi Liakhovetski65a00a22008-10-15 22:02:42 -07001055 dev_err(&pdev->dev, "cannot alloc spi_master\n");
Haojian Zhuangbaffe162010-05-05 10:11:15 -04001056 pxa_ssp_free(ssp);
Stephen Streete0c99052006-03-07 23:53:24 -08001057 return -ENOMEM;
1058 }
1059 drv_data = spi_master_get_devdata(master);
1060 drv_data->master = master;
1061 drv_data->master_info = platform_info;
1062 drv_data->pdev = pdev;
eric miao2f1a74e2007-11-21 18:50:53 +08001063 drv_data->ssp = ssp;
Stephen Streete0c99052006-03-07 23:53:24 -08001064
Sebastian Andrzej Siewior21486af2010-10-08 18:11:19 +02001065 master->dev.parent = &pdev->dev;
Sebastian Andrzej Siewior21486af2010-10-08 18:11:19 +02001066 master->dev.of_node = pdev->dev.of_node;
David Brownelle7db06b2009-06-17 16:26:04 -07001067 /* the spi->mode bits understood by this driver: */
Mika Westerbergb8331722013-01-22 12:26:31 +02001068 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
David Brownelle7db06b2009-06-17 16:26:04 -07001069
Mika Westerberg851bacf2013-01-07 12:44:33 +02001070 master->bus_num = ssp->port_id;
Stephen Streete0c99052006-03-07 23:53:24 -08001071 master->num_chipselect = platform_info->num_chipselect;
Mike Rapoport7ad0ba92009-04-06 19:00:57 -07001072 master->dma_alignment = DMA_ALIGNMENT;
Stephen Streete0c99052006-03-07 23:53:24 -08001073 master->cleanup = cleanup;
1074 master->setup = setup;
Mika Westerberg7f86bde2013-01-22 12:26:26 +02001075 master->transfer_one_message = pxa2xx_spi_transfer_one_message;
Mika Westerberg7d94a502013-01-22 12:26:30 +02001076 master->prepare_transfer_hardware = pxa2xx_spi_prepare_transfer;
1077 master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer;
Stephen Streete0c99052006-03-07 23:53:24 -08001078
eric miao2f1a74e2007-11-21 18:50:53 +08001079 drv_data->ssp_type = ssp->type;
Mika Westerberg2b9b84f2013-01-22 12:26:25 +02001080 drv_data->null_dma_buf = (u32 *)PTR_ALIGN(&drv_data[1], DMA_ALIGNMENT);
Stephen Streete0c99052006-03-07 23:53:24 -08001081
eric miao2f1a74e2007-11-21 18:50:53 +08001082 drv_data->ioaddr = ssp->mmio_base;
1083 drv_data->ssdr_physical = ssp->phys_base + SSDR;
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -08001084 if (pxa25x_ssp_comp(drv_data)) {
Stephen Streete0c99052006-03-07 23:53:24 -08001085 drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
1086 drv_data->dma_cr1 = 0;
1087 drv_data->clear_sr = SSSR_ROR;
1088 drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR;
1089 } else {
1090 drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE;
Mika Westerberg59288082013-01-22 12:26:29 +02001091 drv_data->dma_cr1 = DEFAULT_DMA_CR1;
Stephen Streete0c99052006-03-07 23:53:24 -08001092 drv_data->clear_sr = SSSR_ROR | SSSR_TINT;
1093 drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR;
1094 }
1095
Sebastian Andrzej Siewior49cbb1e2010-11-22 17:12:14 -08001096 status = request_irq(ssp->irq, ssp_int, IRQF_SHARED, dev_name(dev),
1097 drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -08001098 if (status < 0) {
Guennadi Liakhovetski65a00a22008-10-15 22:02:42 -07001099 dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq);
Stephen Streete0c99052006-03-07 23:53:24 -08001100 goto out_error_master_alloc;
1101 }
1102
1103 /* Setup DMA if requested */
1104 drv_data->tx_channel = -1;
1105 drv_data->rx_channel = -1;
1106 if (platform_info->enable_dma) {
Mika Westerbergcd7bed02013-01-22 12:26:28 +02001107 status = pxa2xx_spi_dma_setup(drv_data);
1108 if (status) {
1109 dev_warn(dev, "failed to setup DMA, using PIO\n");
1110 platform_info->enable_dma = false;
Stephen Streete0c99052006-03-07 23:53:24 -08001111 }
Stephen Streete0c99052006-03-07 23:53:24 -08001112 }
1113
1114 /* Enable SOC clock */
Mika Westerberg3343b7a2013-01-22 12:26:27 +02001115 clk_prepare_enable(ssp->clk);
1116
1117 drv_data->max_clk_rate = clk_get_rate(ssp->clk);
Stephen Streete0c99052006-03-07 23:53:24 -08001118
1119 /* Load default SSP configuration */
1120 write_SSCR0(0, drv_data->ioaddr);
Vernon Sauderf1f640a2008-10-15 22:02:43 -07001121 write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) |
1122 SSCR1_TxTresh(TX_THRESH_DFLT),
1123 drv_data->ioaddr);
Eric Miaoc9840da2010-03-16 16:48:01 +08001124 write_SSCR0(SSCR0_SCR(2)
Stephen Streete0c99052006-03-07 23:53:24 -08001125 | SSCR0_Motorola
1126 | SSCR0_DataSize(8),
1127 drv_data->ioaddr);
Sebastian Andrzej Siewior2a8626a2010-11-22 17:12:17 -08001128 if (!pxa25x_ssp_comp(drv_data))
Stephen Streete0c99052006-03-07 23:53:24 -08001129 write_SSTO(0, drv_data->ioaddr);
1130 write_SSPSP(0, drv_data->ioaddr);
1131
Mika Westerberga0d26422013-01-22 12:26:32 +02001132 lpss_ssp_setup(drv_data);
1133
Mika Westerberg7f86bde2013-01-22 12:26:26 +02001134 tasklet_init(&drv_data->pump_transfers, pump_transfers,
1135 (unsigned long)drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -08001136
1137 /* Register with the SPI framework */
1138 platform_set_drvdata(pdev, drv_data);
1139 status = spi_register_master(master);
1140 if (status != 0) {
1141 dev_err(&pdev->dev, "problem registering spi master\n");
Mika Westerberg7f86bde2013-01-22 12:26:26 +02001142 goto out_error_clock_enabled;
Stephen Streete0c99052006-03-07 23:53:24 -08001143 }
1144
Mika Westerberg7d94a502013-01-22 12:26:30 +02001145 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1146 pm_runtime_use_autosuspend(&pdev->dev);
1147 pm_runtime_set_active(&pdev->dev);
1148 pm_runtime_enable(&pdev->dev);
1149
Stephen Streete0c99052006-03-07 23:53:24 -08001150 return status;
1151
Stephen Streete0c99052006-03-07 23:53:24 -08001152out_error_clock_enabled:
Mika Westerberg3343b7a2013-01-22 12:26:27 +02001153 clk_disable_unprepare(ssp->clk);
Mika Westerbergcd7bed02013-01-22 12:26:28 +02001154 pxa2xx_spi_dma_release(drv_data);
eric miao2f1a74e2007-11-21 18:50:53 +08001155 free_irq(ssp->irq, drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -08001156
1157out_error_master_alloc:
1158 spi_master_put(master);
Haojian Zhuangbaffe162010-05-05 10:11:15 -04001159 pxa_ssp_free(ssp);
Stephen Streete0c99052006-03-07 23:53:24 -08001160 return status;
1161}
1162
1163static int pxa2xx_spi_remove(struct platform_device *pdev)
1164{
1165 struct driver_data *drv_data = platform_get_drvdata(pdev);
Julia Lawall51e911e2009-01-06 14:41:45 -08001166 struct ssp_device *ssp;
Stephen Streete0c99052006-03-07 23:53:24 -08001167
1168 if (!drv_data)
1169 return 0;
Julia Lawall51e911e2009-01-06 14:41:45 -08001170 ssp = drv_data->ssp;
Stephen Streete0c99052006-03-07 23:53:24 -08001171
Mika Westerberg7d94a502013-01-22 12:26:30 +02001172 pm_runtime_get_sync(&pdev->dev);
1173
Stephen Streete0c99052006-03-07 23:53:24 -08001174 /* Disable the SSP at the peripheral and SOC level */
1175 write_SSCR0(0, drv_data->ioaddr);
Mika Westerberg3343b7a2013-01-22 12:26:27 +02001176 clk_disable_unprepare(ssp->clk);
Stephen Streete0c99052006-03-07 23:53:24 -08001177
1178 /* Release DMA */
Mika Westerbergcd7bed02013-01-22 12:26:28 +02001179 if (drv_data->master_info->enable_dma)
1180 pxa2xx_spi_dma_release(drv_data);
Stephen Streete0c99052006-03-07 23:53:24 -08001181
Mika Westerberg7d94a502013-01-22 12:26:30 +02001182 pm_runtime_put_noidle(&pdev->dev);
1183 pm_runtime_disable(&pdev->dev);
1184
Stephen Streete0c99052006-03-07 23:53:24 -08001185 /* Release IRQ */
eric miao2f1a74e2007-11-21 18:50:53 +08001186 free_irq(ssp->irq, drv_data);
1187
1188 /* Release SSP */
Haojian Zhuangbaffe162010-05-05 10:11:15 -04001189 pxa_ssp_free(ssp);
Stephen Streete0c99052006-03-07 23:53:24 -08001190
1191 /* Disconnect from the SPI framework */
1192 spi_unregister_master(drv_data->master);
1193
1194 /* Prevent double remove */
1195 platform_set_drvdata(pdev, NULL);
1196
1197 return 0;
1198}
1199
1200static void pxa2xx_spi_shutdown(struct platform_device *pdev)
1201{
1202 int status = 0;
1203
1204 if ((status = pxa2xx_spi_remove(pdev)) != 0)
1205 dev_err(&pdev->dev, "shutdown failed with %d\n", status);
1206}
1207
1208#ifdef CONFIG_PM
Mike Rapoport86d25932009-07-21 17:50:16 +03001209static int pxa2xx_spi_suspend(struct device *dev)
Stephen Streete0c99052006-03-07 23:53:24 -08001210{
Mike Rapoport86d25932009-07-21 17:50:16 +03001211 struct driver_data *drv_data = dev_get_drvdata(dev);
eric miao2f1a74e2007-11-21 18:50:53 +08001212 struct ssp_device *ssp = drv_data->ssp;
Stephen Streete0c99052006-03-07 23:53:24 -08001213 int status = 0;
1214
Mika Westerberg7f86bde2013-01-22 12:26:26 +02001215 status = spi_master_suspend(drv_data->master);
Stephen Streete0c99052006-03-07 23:53:24 -08001216 if (status != 0)
1217 return status;
1218 write_SSCR0(0, drv_data->ioaddr);
Mika Westerberg3343b7a2013-01-22 12:26:27 +02001219 clk_disable_unprepare(ssp->clk);
Stephen Streete0c99052006-03-07 23:53:24 -08001220
1221 return 0;
1222}
1223
Mike Rapoport86d25932009-07-21 17:50:16 +03001224static int pxa2xx_spi_resume(struct device *dev)
Stephen Streete0c99052006-03-07 23:53:24 -08001225{
Mike Rapoport86d25932009-07-21 17:50:16 +03001226 struct driver_data *drv_data = dev_get_drvdata(dev);
eric miao2f1a74e2007-11-21 18:50:53 +08001227 struct ssp_device *ssp = drv_data->ssp;
Stephen Streete0c99052006-03-07 23:53:24 -08001228 int status = 0;
1229
Mika Westerbergcd7bed02013-01-22 12:26:28 +02001230 pxa2xx_spi_dma_resume(drv_data);
Daniel Ribeiro148da332009-04-21 12:24:43 -07001231
Stephen Streete0c99052006-03-07 23:53:24 -08001232 /* Enable the SSP clock */
Mika Westerberg3343b7a2013-01-22 12:26:27 +02001233 clk_prepare_enable(ssp->clk);
Stephen Streete0c99052006-03-07 23:53:24 -08001234
1235 /* Start the queue running */
Mika Westerberg7f86bde2013-01-22 12:26:26 +02001236 status = spi_master_resume(drv_data->master);
Stephen Streete0c99052006-03-07 23:53:24 -08001237 if (status != 0) {
Mike Rapoport86d25932009-07-21 17:50:16 +03001238 dev_err(dev, "problem starting queue (%d)\n", status);
Stephen Streete0c99052006-03-07 23:53:24 -08001239 return status;
1240 }
1241
1242 return 0;
1243}
Mika Westerberg7d94a502013-01-22 12:26:30 +02001244#endif
1245
1246#ifdef CONFIG_PM_RUNTIME
1247static int pxa2xx_spi_runtime_suspend(struct device *dev)
1248{
1249 struct driver_data *drv_data = dev_get_drvdata(dev);
1250
1251 clk_disable_unprepare(drv_data->ssp->clk);
1252 return 0;
1253}
1254
1255static int pxa2xx_spi_runtime_resume(struct device *dev)
1256{
1257 struct driver_data *drv_data = dev_get_drvdata(dev);
1258
1259 clk_prepare_enable(drv_data->ssp->clk);
1260 return 0;
1261}
1262#endif
Mike Rapoport86d25932009-07-21 17:50:16 +03001263
Alexey Dobriyan47145212009-12-14 18:00:08 -08001264static const struct dev_pm_ops pxa2xx_spi_pm_ops = {
Mika Westerberg7d94a502013-01-22 12:26:30 +02001265 SET_SYSTEM_SLEEP_PM_OPS(pxa2xx_spi_suspend, pxa2xx_spi_resume)
1266 SET_RUNTIME_PM_OPS(pxa2xx_spi_runtime_suspend,
1267 pxa2xx_spi_runtime_resume, NULL)
Mike Rapoport86d25932009-07-21 17:50:16 +03001268};
Stephen Streete0c99052006-03-07 23:53:24 -08001269
1270static struct platform_driver driver = {
1271 .driver = {
Mike Rapoport86d25932009-07-21 17:50:16 +03001272 .name = "pxa2xx-spi",
1273 .owner = THIS_MODULE,
Mike Rapoport86d25932009-07-21 17:50:16 +03001274 .pm = &pxa2xx_spi_pm_ops,
Stephen Streete0c99052006-03-07 23:53:24 -08001275 },
Sebastian Andrzej Siewiorfbd29a12010-11-19 09:00:11 -08001276 .probe = pxa2xx_spi_probe,
David Brownelld1e44d92007-10-16 01:27:46 -07001277 .remove = pxa2xx_spi_remove,
Stephen Streete0c99052006-03-07 23:53:24 -08001278 .shutdown = pxa2xx_spi_shutdown,
Stephen Streete0c99052006-03-07 23:53:24 -08001279};
1280
1281static int __init pxa2xx_spi_init(void)
1282{
Sebastian Andrzej Siewiorfbd29a12010-11-19 09:00:11 -08001283 return platform_driver_register(&driver);
Stephen Streete0c99052006-03-07 23:53:24 -08001284}
Antonio Ospite5b61a742009-09-22 16:46:10 -07001285subsys_initcall(pxa2xx_spi_init);
Stephen Streete0c99052006-03-07 23:53:24 -08001286
1287static void __exit pxa2xx_spi_exit(void)
1288{
1289 platform_driver_unregister(&driver);
1290}
1291module_exit(pxa2xx_spi_exit);