blob: a7b044536de48e0f804d2270fc69a3cdbe6a3335 [file] [log] [blame]
Sanjay Lal669e8462012-11-21 18:34:02 -08001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10*/
11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
18#include <asm/page.h>
19#include <asm/cacheflush.h>
20#include <asm/mmu_context.h>
21
22#include <linux/kvm_host.h>
23
24#include "kvm_mips_int.h"
25#include "kvm_mips_comm.h"
26
27#define CREATE_TRACE_POINTS
28#include "trace.h"
29
30#ifndef VECTORSPACING
31#define VECTORSPACING 0x100 /* for EI/VI mode */
32#endif
33
34#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35struct kvm_stats_debugfs_item debugfs_entries[] = {
36 { "wait", VCPU_STAT(wait_exits) },
37 { "cache", VCPU_STAT(cache_exits) },
38 { "signal", VCPU_STAT(signal_exits) },
39 { "interrupt", VCPU_STAT(int_exits) },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
41 { "tlbmod", VCPU_STAT(tlbmod_exits) },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
46 { "syscall", VCPU_STAT(syscall_exits) },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
48 { "break_inst", VCPU_STAT(break_inst_exits) },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
51 {NULL}
52};
53
54static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55{
56 int i;
57 for_each_possible_cpu(i) {
58 vcpu->arch.guest_kernel_asid[i] = 0;
59 vcpu->arch.guest_user_asid[i] = 0;
60 }
61 return 0;
62}
63
64gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
65{
66 return gfn;
67}
68
69/* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
70 * are "runnable" if interrupts are pending
71 */
72int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
73{
74 return !!(vcpu->arch.pending_exceptions);
75}
76
77int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
78{
79 return 1;
80}
81
82int kvm_arch_hardware_enable(void *garbage)
83{
84 return 0;
85}
86
87void kvm_arch_hardware_disable(void *garbage)
88{
89}
90
91int kvm_arch_hardware_setup(void)
92{
93 return 0;
94}
95
96void kvm_arch_hardware_unsetup(void)
97{
98}
99
100void kvm_arch_check_processor_compat(void *rtn)
101{
102 int *r = (int *)rtn;
103 *r = 0;
104 return;
105}
106
107static void kvm_mips_init_tlbs(struct kvm *kvm)
108{
109 unsigned long wired;
110
111 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
112 wired = read_c0_wired();
113 write_c0_wired(wired + 1);
114 mtc0_tlbw_hazard();
115 kvm->arch.commpage_tlb = wired;
116
117 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
118 kvm->arch.commpage_tlb);
119}
120
121static void kvm_mips_init_vm_percpu(void *arg)
122{
123 struct kvm *kvm = (struct kvm *)arg;
124
125 kvm_mips_init_tlbs(kvm);
126 kvm_mips_callbacks->vm_init(kvm);
127
128}
129
130int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
131{
132 if (atomic_inc_return(&kvm_mips_instance) == 1) {
133 kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
134 __func__);
135 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
136 }
137
138
139 return 0;
140}
141
142void kvm_mips_free_vcpus(struct kvm *kvm)
143{
144 unsigned int i;
145 struct kvm_vcpu *vcpu;
146
147 /* Put the pages we reserved for the guest pmap */
148 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
149 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
150 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
151 }
152
153 if (kvm->arch.guest_pmap)
154 kfree(kvm->arch.guest_pmap);
155
156 kvm_for_each_vcpu(i, vcpu, kvm) {
157 kvm_arch_vcpu_free(vcpu);
158 }
159
160 mutex_lock(&kvm->lock);
161
162 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
163 kvm->vcpus[i] = NULL;
164
165 atomic_set(&kvm->online_vcpus, 0);
166
167 mutex_unlock(&kvm->lock);
168}
169
170void kvm_arch_sync_events(struct kvm *kvm)
171{
172}
173
174static void kvm_mips_uninit_tlbs(void *arg)
175{
176 /* Restore wired count */
177 write_c0_wired(0);
178 mtc0_tlbw_hazard();
179 /* Clear out all the TLBs */
180 kvm_local_flush_tlb_all();
181}
182
183void kvm_arch_destroy_vm(struct kvm *kvm)
184{
185 kvm_mips_free_vcpus(kvm);
186
187 /* If this is the last instance, restore wired count */
188 if (atomic_dec_return(&kvm_mips_instance) == 0) {
189 kvm_info("%s: last KVM instance, restoring TLB parameters\n",
190 __func__);
191 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
192 }
193}
194
195long
196kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
197{
David Daneyed829852013-05-23 09:49:10 -0700198 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800199}
200
201void kvm_arch_free_memslot(struct kvm_memory_slot *free,
202 struct kvm_memory_slot *dont)
203{
204}
205
206int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
207{
208 return 0;
209}
210
Takuya Yoshikawaa043deb2013-07-04 13:40:29 +0900211void kvm_arch_memslots_updated(struct kvm *kvm)
212{
213}
214
Sanjay Lal669e8462012-11-21 18:34:02 -0800215int kvm_arch_prepare_memory_region(struct kvm *kvm,
Linus Torvaldsdaf799c2013-05-10 07:48:05 -0700216 struct kvm_memory_slot *memslot,
217 struct kvm_userspace_memory_region *mem,
218 enum kvm_mr_change change)
Sanjay Lal669e8462012-11-21 18:34:02 -0800219{
220 return 0;
221}
222
223void kvm_arch_commit_memory_region(struct kvm *kvm,
Linus Torvaldsdaf799c2013-05-10 07:48:05 -0700224 struct kvm_userspace_memory_region *mem,
225 const struct kvm_memory_slot *old,
226 enum kvm_mr_change change)
Sanjay Lal669e8462012-11-21 18:34:02 -0800227{
228 unsigned long npages = 0;
229 int i, err = 0;
230
231 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
232 __func__, kvm, mem->slot, mem->guest_phys_addr,
233 mem->memory_size, mem->userspace_addr);
234
235 /* Setup Guest PMAP table */
236 if (!kvm->arch.guest_pmap) {
237 if (mem->slot == 0)
238 npages = mem->memory_size >> PAGE_SHIFT;
239
240 if (npages) {
241 kvm->arch.guest_pmap_npages = npages;
242 kvm->arch.guest_pmap =
243 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
244
245 if (!kvm->arch.guest_pmap) {
246 kvm_err("Failed to allocate guest PMAP");
247 err = -ENOMEM;
248 goto out;
249 }
250
251 kvm_info
252 ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
253 npages, kvm->arch.guest_pmap);
254
255 /* Now setup the page table */
256 for (i = 0; i < npages; i++) {
257 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
258 }
259 }
260 }
261out:
262 return;
263}
264
265void kvm_arch_flush_shadow_all(struct kvm *kvm)
266{
267}
268
269void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
270 struct kvm_memory_slot *slot)
271{
272}
273
274void kvm_arch_flush_shadow(struct kvm *kvm)
275{
276}
277
278struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
279{
280 extern char mips32_exception[], mips32_exceptionEnd[];
281 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
282 int err, size, offset;
283 void *gebase;
284 int i;
285
286 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
287
288 if (!vcpu) {
289 err = -ENOMEM;
290 goto out;
291 }
292
293 err = kvm_vcpu_init(vcpu, kvm, id);
294
295 if (err)
296 goto out_free_cpu;
297
298 kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
299
300 /* Allocate space for host mode exception handlers that handle
301 * guest mode exits
302 */
303 if (cpu_has_veic || cpu_has_vint) {
304 size = 0x200 + VECTORSPACING * 64;
305 } else {
306 size = 0x200;
307 }
308
309 /* Save Linux EBASE */
310 vcpu->arch.host_ebase = (void *)read_c0_ebase();
311
312 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
313
314 if (!gebase) {
315 err = -ENOMEM;
316 goto out_free_cpu;
317 }
318 kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
319 ALIGN(size, PAGE_SIZE), gebase);
320
321 /* Save new ebase */
322 vcpu->arch.guest_ebase = gebase;
323
324 /* Copy L1 Guest Exception handler to correct offset */
325
326 /* TLB Refill, EXL = 0 */
327 memcpy(gebase, mips32_exception,
328 mips32_exceptionEnd - mips32_exception);
329
330 /* General Exception Entry point */
331 memcpy(gebase + 0x180, mips32_exception,
332 mips32_exceptionEnd - mips32_exception);
333
334 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
335 for (i = 0; i < 8; i++) {
336 kvm_debug("L1 Vectored handler @ %p\n",
337 gebase + 0x200 + (i * VECTORSPACING));
338 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
339 mips32_exceptionEnd - mips32_exception);
340 }
341
342 /* General handler, relocate to unmapped space for sanity's sake */
343 offset = 0x2000;
344 kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
345 gebase + offset,
346 mips32_GuestExceptionEnd - mips32_GuestException);
347
348 memcpy(gebase + offset, mips32_GuestException,
349 mips32_GuestExceptionEnd - mips32_GuestException);
350
351 /* Invalidate the icache for these ranges */
352 mips32_SyncICache((unsigned long) gebase, ALIGN(size, PAGE_SIZE));
353
354 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
355 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
356
357 if (!vcpu->arch.kseg0_commpage) {
358 err = -ENOMEM;
359 goto out_free_gebase;
360 }
361
362 kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
363 kvm_mips_commpage_init(vcpu);
364
365 /* Init */
366 vcpu->arch.last_sched_cpu = -1;
367
368 /* Start off the timer */
369 kvm_mips_emulate_count(vcpu);
370
371 return vcpu;
372
373out_free_gebase:
374 kfree(gebase);
375
376out_free_cpu:
377 kfree(vcpu);
378
379out:
380 return ERR_PTR(err);
381}
382
383void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
384{
385 hrtimer_cancel(&vcpu->arch.comparecount_timer);
386
387 kvm_vcpu_uninit(vcpu);
388
389 kvm_mips_dump_stats(vcpu);
390
391 if (vcpu->arch.guest_ebase)
392 kfree(vcpu->arch.guest_ebase);
393
394 if (vcpu->arch.kseg0_commpage)
395 kfree(vcpu->arch.kseg0_commpage);
396
397}
398
399void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
400{
401 kvm_arch_vcpu_free(vcpu);
402}
403
404int
405kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
406 struct kvm_guest_debug *dbg)
407{
David Daneyed829852013-05-23 09:49:10 -0700408 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800409}
410
411int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
412{
413 int r = 0;
414 sigset_t sigsaved;
415
416 if (vcpu->sigset_active)
417 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
418
419 if (vcpu->mmio_needed) {
420 if (!vcpu->mmio_is_write)
421 kvm_mips_complete_mmio_load(vcpu, run);
422 vcpu->mmio_needed = 0;
423 }
424
425 /* Check if we have any exceptions/interrupts pending */
426 kvm_mips_deliver_interrupts(vcpu,
427 kvm_read_c0_guest_cause(vcpu->arch.cop0));
428
429 local_irq_disable();
430 kvm_guest_enter();
431
432 r = __kvm_mips_vcpu_run(run, vcpu);
433
434 kvm_guest_exit();
435 local_irq_enable();
436
437 if (vcpu->sigset_active)
438 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
439
440 return r;
441}
442
443int
444kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
445{
446 int intr = (int)irq->irq;
447 struct kvm_vcpu *dvcpu = NULL;
448
449 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
450 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
451 (int)intr);
452
453 if (irq->cpu == -1)
454 dvcpu = vcpu;
455 else
456 dvcpu = vcpu->kvm->vcpus[irq->cpu];
457
458 if (intr == 2 || intr == 3 || intr == 4) {
459 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
460
461 } else if (intr == -2 || intr == -3 || intr == -4) {
462 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
463 } else {
464 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
465 irq->cpu, irq->irq);
466 return -EINVAL;
467 }
468
469 dvcpu->arch.wait = 0;
470
471 if (waitqueue_active(&dvcpu->wq)) {
472 wake_up_interruptible(&dvcpu->wq);
473 }
474
475 return 0;
476}
477
478int
479kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
480 struct kvm_mp_state *mp_state)
481{
David Daneyed829852013-05-23 09:49:10 -0700482 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800483}
484
485int
486kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
487 struct kvm_mp_state *mp_state)
488{
David Daneyed829852013-05-23 09:49:10 -0700489 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800490}
491
David Daney681865d2013-06-10 12:33:48 -0700492#define MIPS_CP0_32(_R, _S) \
493 (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
494
495#define MIPS_CP0_64(_R, _S) \
496 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
497
498#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
499#define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
500#define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0)
501#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
502#define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
503#define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
504#define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1)
505#define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
506#define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
507#define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
508#define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
509#define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
510#define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
511#define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
512#define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
513#define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
514#define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
515#define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
516#define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
517#define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
518#define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
519#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
520#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
David Daney4c73fb22013-05-23 09:49:09 -0700521
522static u64 kvm_mips_get_one_regs[] = {
523 KVM_REG_MIPS_R0,
524 KVM_REG_MIPS_R1,
525 KVM_REG_MIPS_R2,
526 KVM_REG_MIPS_R3,
527 KVM_REG_MIPS_R4,
528 KVM_REG_MIPS_R5,
529 KVM_REG_MIPS_R6,
530 KVM_REG_MIPS_R7,
531 KVM_REG_MIPS_R8,
532 KVM_REG_MIPS_R9,
533 KVM_REG_MIPS_R10,
534 KVM_REG_MIPS_R11,
535 KVM_REG_MIPS_R12,
536 KVM_REG_MIPS_R13,
537 KVM_REG_MIPS_R14,
538 KVM_REG_MIPS_R15,
539 KVM_REG_MIPS_R16,
540 KVM_REG_MIPS_R17,
541 KVM_REG_MIPS_R18,
542 KVM_REG_MIPS_R19,
543 KVM_REG_MIPS_R20,
544 KVM_REG_MIPS_R21,
545 KVM_REG_MIPS_R22,
546 KVM_REG_MIPS_R23,
547 KVM_REG_MIPS_R24,
548 KVM_REG_MIPS_R25,
549 KVM_REG_MIPS_R26,
550 KVM_REG_MIPS_R27,
551 KVM_REG_MIPS_R28,
552 KVM_REG_MIPS_R29,
553 KVM_REG_MIPS_R30,
554 KVM_REG_MIPS_R31,
555
556 KVM_REG_MIPS_HI,
557 KVM_REG_MIPS_LO,
558 KVM_REG_MIPS_PC,
559
560 KVM_REG_MIPS_CP0_INDEX,
561 KVM_REG_MIPS_CP0_CONTEXT,
562 KVM_REG_MIPS_CP0_PAGEMASK,
563 KVM_REG_MIPS_CP0_WIRED,
564 KVM_REG_MIPS_CP0_BADVADDR,
565 KVM_REG_MIPS_CP0_ENTRYHI,
566 KVM_REG_MIPS_CP0_STATUS,
567 KVM_REG_MIPS_CP0_CAUSE,
568 /* EPC set via kvm_regs, et al. */
569 KVM_REG_MIPS_CP0_CONFIG,
570 KVM_REG_MIPS_CP0_CONFIG1,
571 KVM_REG_MIPS_CP0_CONFIG2,
572 KVM_REG_MIPS_CP0_CONFIG3,
573 KVM_REG_MIPS_CP0_CONFIG7,
574 KVM_REG_MIPS_CP0_ERROREPC
575};
576
577static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
578 const struct kvm_one_reg *reg)
579{
David Daney4c73fb22013-05-23 09:49:09 -0700580 struct mips_coproc *cop0 = vcpu->arch.cop0;
581 s64 v;
582
583 switch (reg->id) {
584 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
585 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
586 break;
587 case KVM_REG_MIPS_HI:
588 v = (long)vcpu->arch.hi;
589 break;
590 case KVM_REG_MIPS_LO:
591 v = (long)vcpu->arch.lo;
592 break;
593 case KVM_REG_MIPS_PC:
594 v = (long)vcpu->arch.pc;
595 break;
596
597 case KVM_REG_MIPS_CP0_INDEX:
598 v = (long)kvm_read_c0_guest_index(cop0);
599 break;
600 case KVM_REG_MIPS_CP0_CONTEXT:
601 v = (long)kvm_read_c0_guest_context(cop0);
602 break;
603 case KVM_REG_MIPS_CP0_PAGEMASK:
604 v = (long)kvm_read_c0_guest_pagemask(cop0);
605 break;
606 case KVM_REG_MIPS_CP0_WIRED:
607 v = (long)kvm_read_c0_guest_wired(cop0);
608 break;
609 case KVM_REG_MIPS_CP0_BADVADDR:
610 v = (long)kvm_read_c0_guest_badvaddr(cop0);
611 break;
612 case KVM_REG_MIPS_CP0_ENTRYHI:
613 v = (long)kvm_read_c0_guest_entryhi(cop0);
614 break;
615 case KVM_REG_MIPS_CP0_STATUS:
616 v = (long)kvm_read_c0_guest_status(cop0);
617 break;
618 case KVM_REG_MIPS_CP0_CAUSE:
619 v = (long)kvm_read_c0_guest_cause(cop0);
620 break;
621 case KVM_REG_MIPS_CP0_ERROREPC:
622 v = (long)kvm_read_c0_guest_errorepc(cop0);
623 break;
624 case KVM_REG_MIPS_CP0_CONFIG:
625 v = (long)kvm_read_c0_guest_config(cop0);
626 break;
627 case KVM_REG_MIPS_CP0_CONFIG1:
628 v = (long)kvm_read_c0_guest_config1(cop0);
629 break;
630 case KVM_REG_MIPS_CP0_CONFIG2:
631 v = (long)kvm_read_c0_guest_config2(cop0);
632 break;
633 case KVM_REG_MIPS_CP0_CONFIG3:
634 v = (long)kvm_read_c0_guest_config3(cop0);
635 break;
636 case KVM_REG_MIPS_CP0_CONFIG7:
637 v = (long)kvm_read_c0_guest_config7(cop0);
638 break;
639 default:
640 return -EINVAL;
641 }
David Daney681865d2013-06-10 12:33:48 -0700642 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
643 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
644 return put_user(v, uaddr64);
645 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
646 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
647 u32 v32 = (u32)v;
648 return put_user(v32, uaddr32);
649 } else {
650 return -EINVAL;
651 }
David Daney4c73fb22013-05-23 09:49:09 -0700652}
653
654static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
655 const struct kvm_one_reg *reg)
656{
David Daney4c73fb22013-05-23 09:49:09 -0700657 struct mips_coproc *cop0 = vcpu->arch.cop0;
658 u64 v;
659
David Daney681865d2013-06-10 12:33:48 -0700660 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
661 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
662
663 if (get_user(v, uaddr64) != 0)
664 return -EFAULT;
665 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
666 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
667 s32 v32;
668
669 if (get_user(v32, uaddr32) != 0)
670 return -EFAULT;
671 v = (s64)v32;
672 } else {
673 return -EINVAL;
674 }
David Daney4c73fb22013-05-23 09:49:09 -0700675
676 switch (reg->id) {
677 case KVM_REG_MIPS_R0:
678 /* Silently ignore requests to set $0 */
679 break;
680 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
681 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
682 break;
683 case KVM_REG_MIPS_HI:
684 vcpu->arch.hi = v;
685 break;
686 case KVM_REG_MIPS_LO:
687 vcpu->arch.lo = v;
688 break;
689 case KVM_REG_MIPS_PC:
690 vcpu->arch.pc = v;
691 break;
692
693 case KVM_REG_MIPS_CP0_INDEX:
694 kvm_write_c0_guest_index(cop0, v);
695 break;
696 case KVM_REG_MIPS_CP0_CONTEXT:
697 kvm_write_c0_guest_context(cop0, v);
698 break;
699 case KVM_REG_MIPS_CP0_PAGEMASK:
700 kvm_write_c0_guest_pagemask(cop0, v);
701 break;
702 case KVM_REG_MIPS_CP0_WIRED:
703 kvm_write_c0_guest_wired(cop0, v);
704 break;
705 case KVM_REG_MIPS_CP0_BADVADDR:
706 kvm_write_c0_guest_badvaddr(cop0, v);
707 break;
708 case KVM_REG_MIPS_CP0_ENTRYHI:
709 kvm_write_c0_guest_entryhi(cop0, v);
710 break;
711 case KVM_REG_MIPS_CP0_STATUS:
712 kvm_write_c0_guest_status(cop0, v);
713 break;
714 case KVM_REG_MIPS_CP0_CAUSE:
715 kvm_write_c0_guest_cause(cop0, v);
716 break;
717 case KVM_REG_MIPS_CP0_ERROREPC:
718 kvm_write_c0_guest_errorepc(cop0, v);
719 break;
720 default:
721 return -EINVAL;
722 }
723 return 0;
724}
725
Sanjay Lal669e8462012-11-21 18:34:02 -0800726long
727kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
728{
729 struct kvm_vcpu *vcpu = filp->private_data;
730 void __user *argp = (void __user *)arg;
731 long r;
Sanjay Lal669e8462012-11-21 18:34:02 -0800732
733 switch (ioctl) {
David Daney4c73fb22013-05-23 09:49:09 -0700734 case KVM_SET_ONE_REG:
735 case KVM_GET_ONE_REG: {
736 struct kvm_one_reg reg;
737 if (copy_from_user(&reg, argp, sizeof(reg)))
738 return -EFAULT;
739 if (ioctl == KVM_SET_ONE_REG)
740 return kvm_mips_set_reg(vcpu, &reg);
741 else
742 return kvm_mips_get_reg(vcpu, &reg);
743 }
744 case KVM_GET_REG_LIST: {
745 struct kvm_reg_list __user *user_list = argp;
746 u64 __user *reg_dest;
747 struct kvm_reg_list reg_list;
748 unsigned n;
749
750 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
751 return -EFAULT;
752 n = reg_list.n;
753 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
754 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
755 return -EFAULT;
756 if (n < reg_list.n)
757 return -E2BIG;
758 reg_dest = user_list->reg;
759 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
760 sizeof(kvm_mips_get_one_regs)))
761 return -EFAULT;
762 return 0;
763 }
Sanjay Lal669e8462012-11-21 18:34:02 -0800764 case KVM_NMI:
765 /* Treat the NMI as a CPU reset */
766 r = kvm_mips_reset_vcpu(vcpu);
767 break;
768 case KVM_INTERRUPT:
769 {
770 struct kvm_mips_interrupt irq;
771 r = -EFAULT;
772 if (copy_from_user(&irq, argp, sizeof(irq)))
773 goto out;
774
Sanjay Lal669e8462012-11-21 18:34:02 -0800775 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
776 irq.irq);
777
778 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
779 break;
780 }
781 default:
David Daney4c73fb22013-05-23 09:49:09 -0700782 r = -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800783 }
784
785out:
786 return r;
787}
788
789/*
790 * Get (and clear) the dirty memory log for a memory slot.
791 */
792int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
793{
794 struct kvm_memory_slot *memslot;
795 unsigned long ga, ga_end;
796 int is_dirty = 0;
797 int r;
798 unsigned long n;
799
800 mutex_lock(&kvm->slots_lock);
801
802 r = kvm_get_dirty_log(kvm, log, &is_dirty);
803 if (r)
804 goto out;
805
806 /* If nothing is dirty, don't bother messing with page tables. */
807 if (is_dirty) {
808 memslot = &kvm->memslots->memslots[log->slot];
809
810 ga = memslot->base_gfn << PAGE_SHIFT;
811 ga_end = ga + (memslot->npages << PAGE_SHIFT);
812
813 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
814 ga_end);
815
816 n = kvm_dirty_bitmap_bytes(memslot);
817 memset(memslot->dirty_bitmap, 0, n);
818 }
819
820 r = 0;
821out:
822 mutex_unlock(&kvm->slots_lock);
823 return r;
824
825}
826
827long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
828{
829 long r;
830
831 switch (ioctl) {
832 default:
David Daneyed829852013-05-23 09:49:10 -0700833 r = -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800834 }
835
836 return r;
837}
838
839int kvm_arch_init(void *opaque)
840{
841 int ret;
842
843 if (kvm_mips_callbacks) {
844 kvm_err("kvm: module already exists\n");
845 return -EEXIST;
846 }
847
848 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
849
850 return ret;
851}
852
853void kvm_arch_exit(void)
854{
855 kvm_mips_callbacks = NULL;
856}
857
858int
859kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
860{
David Daneyed829852013-05-23 09:49:10 -0700861 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800862}
863
864int
865kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
866{
David Daneyed829852013-05-23 09:49:10 -0700867 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800868}
869
870int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
871{
872 return 0;
873}
874
875int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
876{
David Daneyed829852013-05-23 09:49:10 -0700877 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800878}
879
880int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
881{
David Daneyed829852013-05-23 09:49:10 -0700882 return -ENOIOCTLCMD;
Sanjay Lal669e8462012-11-21 18:34:02 -0800883}
884
885int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
886{
887 return VM_FAULT_SIGBUS;
888}
889
890int kvm_dev_ioctl_check_extension(long ext)
891{
892 int r;
893
894 switch (ext) {
David Daney4c73fb22013-05-23 09:49:09 -0700895 case KVM_CAP_ONE_REG:
896 r = 1;
897 break;
Sanjay Lal669e8462012-11-21 18:34:02 -0800898 case KVM_CAP_COALESCED_MMIO:
899 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
900 break;
901 default:
902 r = 0;
903 break;
904 }
905 return r;
Sanjay Lal669e8462012-11-21 18:34:02 -0800906}
907
908int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
909{
910 return kvm_mips_pending_timer(vcpu);
911}
912
913int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
914{
915 int i;
916 struct mips_coproc *cop0;
917
918 if (!vcpu)
919 return -1;
920
921 printk("VCPU Register Dump:\n");
922 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
923 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
924
925 for (i = 0; i < 32; i += 4) {
926 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
927 vcpu->arch.gprs[i],
928 vcpu->arch.gprs[i + 1],
929 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
930 }
931 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
932 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
933
934 cop0 = vcpu->arch.cop0;
935 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
936 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
937
938 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
939
940 return 0;
941}
942
943int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
944{
945 int i;
946
David Daney8d17dd02013-05-23 09:49:08 -0700947 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
David Daneybf32ebf2013-05-23 09:49:07 -0700948 vcpu->arch.gprs[i] = regs->gpr[i];
David Daney8d17dd02013-05-23 09:49:08 -0700949 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
Sanjay Lal669e8462012-11-21 18:34:02 -0800950 vcpu->arch.hi = regs->hi;
951 vcpu->arch.lo = regs->lo;
952 vcpu->arch.pc = regs->pc;
953
David Daney4c73fb22013-05-23 09:49:09 -0700954 return 0;
Sanjay Lal669e8462012-11-21 18:34:02 -0800955}
956
957int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
958{
959 int i;
960
David Daney8d17dd02013-05-23 09:49:08 -0700961 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
David Daneybf32ebf2013-05-23 09:49:07 -0700962 regs->gpr[i] = vcpu->arch.gprs[i];
Sanjay Lal669e8462012-11-21 18:34:02 -0800963
964 regs->hi = vcpu->arch.hi;
965 regs->lo = vcpu->arch.lo;
966 regs->pc = vcpu->arch.pc;
967
David Daney4c73fb22013-05-23 09:49:09 -0700968 return 0;
Sanjay Lal669e8462012-11-21 18:34:02 -0800969}
970
971void kvm_mips_comparecount_func(unsigned long data)
972{
973 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
974
975 kvm_mips_callbacks->queue_timer_int(vcpu);
976
977 vcpu->arch.wait = 0;
978 if (waitqueue_active(&vcpu->wq)) {
979 wake_up_interruptible(&vcpu->wq);
980 }
981}
982
983/*
984 * low level hrtimer wake routine.
985 */
986enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
987{
988 struct kvm_vcpu *vcpu;
989
990 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
991 kvm_mips_comparecount_func((unsigned long) vcpu);
992 hrtimer_forward_now(&vcpu->arch.comparecount_timer,
993 ktime_set(0, MS_TO_NS(10)));
994 return HRTIMER_RESTART;
995}
996
997int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
998{
999 kvm_mips_callbacks->vcpu_init(vcpu);
1000 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
1001 HRTIMER_MODE_REL);
1002 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
1003 kvm_mips_init_shadow_tlb(vcpu);
1004 return 0;
1005}
1006
1007void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1008{
1009 return;
1010}
1011
1012int
1013kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1014{
1015 return 0;
1016}
1017
1018/* Initial guest state */
1019int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1020{
1021 return kvm_mips_callbacks->vcpu_setup(vcpu);
1022}
1023
1024static
1025void kvm_mips_set_c0_status(void)
1026{
1027 uint32_t status = read_c0_status();
1028
1029 if (cpu_has_fpu)
1030 status |= (ST0_CU1);
1031
1032 if (cpu_has_dsp)
1033 status |= (ST0_MX);
1034
1035 write_c0_status(status);
1036 ehb();
1037}
1038
1039/*
1040 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1041 */
1042int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1043{
1044 uint32_t cause = vcpu->arch.host_cp0_cause;
1045 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1046 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1047 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1048 enum emulation_result er = EMULATE_DONE;
1049 int ret = RESUME_GUEST;
1050
1051 /* Set a default exit reason */
1052 run->exit_reason = KVM_EXIT_UNKNOWN;
1053 run->ready_for_interrupt_injection = 1;
1054
1055 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1056 kvm_mips_set_c0_status();
1057
1058 local_irq_enable();
1059
1060 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1061 cause, opc, run, vcpu);
1062
1063 /* Do a privilege check, if in UM most of these exit conditions end up
1064 * causing an exception to be delivered to the Guest Kernel
1065 */
1066 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1067 if (er == EMULATE_PRIV_FAIL) {
1068 goto skip_emul;
1069 } else if (er == EMULATE_FAIL) {
1070 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1071 ret = RESUME_HOST;
1072 goto skip_emul;
1073 }
1074
1075 switch (exccode) {
1076 case T_INT:
1077 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1078
1079 ++vcpu->stat.int_exits;
1080 trace_kvm_exit(vcpu, INT_EXITS);
1081
1082 if (need_resched()) {
1083 cond_resched();
1084 }
1085
1086 ret = RESUME_GUEST;
1087 break;
1088
1089 case T_COP_UNUSABLE:
1090 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1091
1092 ++vcpu->stat.cop_unusable_exits;
1093 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1094 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1095 /* XXXKYMA: Might need to return to user space */
1096 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1097 ret = RESUME_HOST;
1098 }
1099 break;
1100
1101 case T_TLB_MOD:
1102 ++vcpu->stat.tlbmod_exits;
1103 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1104 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1105 break;
1106
1107 case T_TLB_ST_MISS:
1108 kvm_debug
1109 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1110 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1111 badvaddr);
1112
1113 ++vcpu->stat.tlbmiss_st_exits;
1114 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1115 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1116 break;
1117
1118 case T_TLB_LD_MISS:
1119 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1120 cause, opc, badvaddr);
1121
1122 ++vcpu->stat.tlbmiss_ld_exits;
1123 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1124 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1125 break;
1126
1127 case T_ADDR_ERR_ST:
1128 ++vcpu->stat.addrerr_st_exits;
1129 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1130 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1131 break;
1132
1133 case T_ADDR_ERR_LD:
1134 ++vcpu->stat.addrerr_ld_exits;
1135 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1136 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1137 break;
1138
1139 case T_SYSCALL:
1140 ++vcpu->stat.syscall_exits;
1141 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1142 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1143 break;
1144
1145 case T_RES_INST:
1146 ++vcpu->stat.resvd_inst_exits;
1147 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1148 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1149 break;
1150
1151 case T_BREAK:
1152 ++vcpu->stat.break_inst_exits;
1153 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1154 ret = kvm_mips_callbacks->handle_break(vcpu);
1155 break;
1156
1157 default:
1158 kvm_err
1159 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1160 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1161 kvm_read_c0_guest_status(vcpu->arch.cop0));
1162 kvm_arch_vcpu_dump_regs(vcpu);
1163 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1164 ret = RESUME_HOST;
1165 break;
1166
1167 }
1168
1169skip_emul:
1170 local_irq_disable();
1171
1172 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1173 kvm_mips_deliver_interrupts(vcpu, cause);
1174
1175 if (!(ret & RESUME_HOST)) {
1176 /* Only check for signals if not already exiting to userspace */
1177 if (signal_pending(current)) {
1178 run->exit_reason = KVM_EXIT_INTR;
1179 ret = (-EINTR << 2) | RESUME_HOST;
1180 ++vcpu->stat.signal_exits;
1181 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1182 }
1183 }
1184
1185 return ret;
1186}
1187
1188int __init kvm_mips_init(void)
1189{
1190 int ret;
1191
1192 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1193
1194 if (ret)
1195 return ret;
1196
1197 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1198 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1199 * to avoid the possibility of double faulting. The issue is that the TLB code
1200 * references routines that are part of the the KVM module,
1201 * which are only available once the module is loaded.
1202 */
1203 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1204 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1205 kvm_mips_is_error_pfn = is_error_pfn;
1206
1207 pr_info("KVM/MIPS Initialized\n");
1208 return 0;
1209}
1210
1211void __exit kvm_mips_exit(void)
1212{
1213 kvm_exit();
1214
1215 kvm_mips_gfn_to_pfn = NULL;
1216 kvm_mips_release_pfn_clean = NULL;
1217 kvm_mips_is_error_pfn = NULL;
1218
1219 pr_info("KVM/MIPS unloaded\n");
1220}
1221
1222module_init(kvm_mips_init);
1223module_exit(kvm_mips_exit);
1224
1225EXPORT_TRACEPOINT_SYMBOL(kvm_exit);