Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * DTC controller, taken from T128 driver by... |
| 3 | * Copyright 1993, Drew Eckhardt |
| 4 | * Visionary Computing |
| 5 | * (Unix and Linux consulting and custom programming) |
| 6 | * drew@colorado.edu |
| 7 | * +1 (303) 440-4894 |
| 8 | * |
| 9 | * DISTRIBUTION RELEASE 2. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #ifndef DTC3280_H |
| 13 | #define DTC3280_H |
| 14 | |
Olaf Hering | 44456d3 | 2005-07-27 11:45:17 -0700 | [diff] [blame] | 15 | #define DTCDEBUG 0 |
| 16 | #define DTCDEBUG_INIT 0x1 |
| 17 | #define DTCDEBUG_TRANSFER 0x2 |
| 18 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #ifndef CMD_PER_LUN |
| 20 | #define CMD_PER_LUN 2 |
| 21 | #endif |
| 22 | |
| 23 | #ifndef CAN_QUEUE |
| 24 | #define CAN_QUEUE 32 |
| 25 | #endif |
| 26 | |
| 27 | #define NCR5380_implementation_fields \ |
| 28 | void __iomem *base |
| 29 | |
| 30 | #define NCR5380_local_declare() \ |
| 31 | void __iomem *base |
| 32 | |
| 33 | #define NCR5380_setup(instance) \ |
| 34 | base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base |
| 35 | |
| 36 | #define DTC_address(reg) (base + DTC_5380_OFFSET + reg) |
| 37 | |
| 38 | #define dbNCR5380_read(reg) \ |
| 39 | (rval=readb(DTC_address(reg)), \ |
| 40 | (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\ |
| 41 | , (reg), DTC_address(reg), rval)), rval ) ) |
| 42 | |
| 43 | #define dbNCR5380_write(reg, value) do { \ |
| 44 | printk("DTC : write %02x to register %d at address %p\n", \ |
| 45 | (value), (reg), DTC_address(reg)); \ |
| 46 | writeb(value, DTC_address(reg));} while(0) |
| 47 | |
| 48 | |
| 49 | #if !(DTCDEBUG & DTCDEBUG_TRANSFER) |
| 50 | #define NCR5380_read(reg) (readb(DTC_address(reg))) |
| 51 | #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg))) |
| 52 | #else |
| 53 | #define NCR5380_read(reg) (readb(DTC_address(reg))) |
| 54 | #define xNCR5380_read(reg) \ |
| 55 | (((unsigned char) printk("DTC : read register %d at address %p\n"\ |
| 56 | , (reg), DTC_address(reg))), readb(DTC_address(reg))) |
| 57 | |
| 58 | #define NCR5380_write(reg, value) do { \ |
| 59 | printk("DTC : write %02x to register %d at address %p\n", \ |
| 60 | (value), (reg), DTC_address(reg)); \ |
| 61 | writeb(value, DTC_address(reg));} while(0) |
| 62 | #endif |
| 63 | |
| 64 | #define NCR5380_intr dtc_intr |
| 65 | #define NCR5380_queue_command dtc_queue_command |
| 66 | #define NCR5380_abort dtc_abort |
| 67 | #define NCR5380_bus_reset dtc_bus_reset |
Finn Thain | 8c32513 | 2014-11-12 16:11:58 +1100 | [diff] [blame^] | 68 | #define NCR5380_info dtc_info |
Al Viro | dd7ab71 | 2013-03-31 01:15:54 -0400 | [diff] [blame] | 69 | #define NCR5380_show_info dtc_show_info |
| 70 | #define NCR5380_write_info dtc_write_info |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | |
| 72 | /* 15 12 11 10 |
| 73 | 1001 1100 0000 0000 */ |
| 74 | |
| 75 | #define DTC_IRQS 0x9c00 |
| 76 | |
| 77 | |
| 78 | #endif /* DTC3280_H */ |