blob: e2838e90ddfca3f95bec328246929431275e706c [file] [log] [blame]
James Smartda0436e2009-05-22 14:51:39 -04001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
James Smartd4379ac2012-03-01 22:37:07 -05004 * Copyright (C) 2009-2012 Emulex. All rights reserved. *
James Smartda0436e2009-05-22 14:51:39 -04005 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21/* Macros to deal with bit fields. Each bit field must have 3 #defines
22 * associated with it (_SHIFT, _MASK, and _WORD).
23 * EG. For a bit field that is in the 7th bit of the "field4" field of a
24 * structure and is 2 bits in size the following #defines must exist:
25 * struct temp {
26 * uint32_t field1;
27 * uint32_t field2;
28 * uint32_t field3;
29 * uint32_t field4;
30 * #define example_bit_field_SHIFT 7
31 * #define example_bit_field_MASK 0x03
32 * #define example_bit_field_WORD field4
33 * uint32_t field5;
34 * };
35 * Then the macros below may be used to get or set the value of that field.
36 * EG. To get the value of the bit field from the above example:
37 * struct temp t1;
38 * value = bf_get(example_bit_field, &t1);
39 * And then to set that bit field:
40 * bf_set(example_bit_field, &t1, 2);
41 * Or clear that bit field:
42 * bf_set(example_bit_field, &t1, 0);
43 */
James Smart079b5c92011-08-21 21:48:49 -040044#define bf_get_be32(name, ptr) \
45 ((be32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
James Smartcb5172e2010-03-15 11:25:07 -040046#define bf_get_le32(name, ptr) \
47 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
James Smartda0436e2009-05-22 14:51:39 -040048#define bf_get(name, ptr) \
49 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
James Smartcb5172e2010-03-15 11:25:07 -040050#define bf_set_le32(name, ptr, value) \
51 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
52 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
53 ~(name##_MASK << name##_SHIFT)))))
James Smartda0436e2009-05-22 14:51:39 -040054#define bf_set(name, ptr, value) \
55 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
56 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
57
58struct dma_address {
59 uint32_t addr_lo;
60 uint32_t addr_hi;
61};
62
James Smart8fa38512009-07-19 10:01:03 -040063struct lpfc_sli_intf {
64 uint32_t word0;
James Smart28baac72010-02-12 14:42:03 -050065#define lpfc_sli_intf_valid_SHIFT 29
66#define lpfc_sli_intf_valid_MASK 0x00000007
67#define lpfc_sli_intf_valid_WORD word0
James Smart8fa38512009-07-19 10:01:03 -040068#define LPFC_SLI_INTF_VALID 6
James Smart085c6472010-11-20 23:11:37 -050069#define lpfc_sli_intf_sli_hint2_SHIFT 24
70#define lpfc_sli_intf_sli_hint2_MASK 0x0000001F
71#define lpfc_sli_intf_sli_hint2_WORD word0
72#define LPFC_SLI_INTF_SLI_HINT2_NONE 0
73#define lpfc_sli_intf_sli_hint1_SHIFT 16
74#define lpfc_sli_intf_sli_hint1_MASK 0x000000FF
75#define lpfc_sli_intf_sli_hint1_WORD word0
76#define LPFC_SLI_INTF_SLI_HINT1_NONE 0
77#define LPFC_SLI_INTF_SLI_HINT1_1 1
78#define LPFC_SLI_INTF_SLI_HINT1_2 2
79#define lpfc_sli_intf_if_type_SHIFT 12
80#define lpfc_sli_intf_if_type_MASK 0x0000000F
81#define lpfc_sli_intf_if_type_WORD word0
82#define LPFC_SLI_INTF_IF_TYPE_0 0
83#define LPFC_SLI_INTF_IF_TYPE_1 1
84#define LPFC_SLI_INTF_IF_TYPE_2 2
James Smart28baac72010-02-12 14:42:03 -050085#define lpfc_sli_intf_sli_family_SHIFT 8
James Smart085c6472010-11-20 23:11:37 -050086#define lpfc_sli_intf_sli_family_MASK 0x0000000F
James Smart28baac72010-02-12 14:42:03 -050087#define lpfc_sli_intf_sli_family_WORD word0
James Smart085c6472010-11-20 23:11:37 -050088#define LPFC_SLI_INTF_FAMILY_BE2 0x0
89#define LPFC_SLI_INTF_FAMILY_BE3 0x1
90#define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
91#define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
James Smart28baac72010-02-12 14:42:03 -050092#define lpfc_sli_intf_slirev_SHIFT 4
93#define lpfc_sli_intf_slirev_MASK 0x0000000F
94#define lpfc_sli_intf_slirev_WORD word0
95#define LPFC_SLI_INTF_REV_SLI3 3
96#define LPFC_SLI_INTF_REV_SLI4 4
James Smart085c6472010-11-20 23:11:37 -050097#define lpfc_sli_intf_func_type_SHIFT 0
98#define lpfc_sli_intf_func_type_MASK 0x00000001
99#define lpfc_sli_intf_func_type_WORD word0
100#define LPFC_SLI_INTF_IF_TYPE_PHYS 0
101#define LPFC_SLI_INTF_IF_TYPE_VIRT 1
James Smart8fa38512009-07-19 10:01:03 -0400102};
103
James Smartda0436e2009-05-22 14:51:39 -0400104#define LPFC_SLI4_MBX_EMBED true
105#define LPFC_SLI4_MBX_NEMBED false
106
107#define LPFC_SLI4_MB_WORD_COUNT 64
108#define LPFC_MAX_MQ_PAGE 8
109#define LPFC_MAX_WQ_PAGE 8
110#define LPFC_MAX_CQ_PAGE 4
111#define LPFC_MAX_EQ_PAGE 8
112
113#define LPFC_VIR_FUNC_MAX 32 /* Maximum number of virtual functions */
114#define LPFC_PCI_FUNC_MAX 5 /* Maximum number of PCI functions */
115#define LPFC_VFR_PAGE_SIZE 0x1000 /* 4KB BAR2 per-VF register page size */
116
117/* Define SLI4 Alignment requirements. */
118#define LPFC_ALIGN_16_BYTE 16
119#define LPFC_ALIGN_64_BYTE 64
120
121/* Define SLI4 specific definitions. */
122#define LPFC_MQ_CQE_BYTE_OFFSET 256
123#define LPFC_MBX_CMD_HDR_LENGTH 16
124#define LPFC_MBX_ERROR_RANGE 0x4000
125#define LPFC_BMBX_BIT1_ADDR_HI 0x2
126#define LPFC_BMBX_BIT1_ADDR_LO 0
127#define LPFC_RPI_HDR_COUNT 64
128#define LPFC_HDR_TEMPLATE_SIZE 4096
129#define LPFC_RPI_ALLOC_ERROR 0xFFFF
130#define LPFC_FCF_RECORD_WD_CNT 132
131#define LPFC_ENTIRE_FCF_DATABASE 0
132#define LPFC_DFLT_FCF_INDEX 0
133
134/* Virtual function numbers */
135#define LPFC_VF0 0
136#define LPFC_VF1 1
137#define LPFC_VF2 2
138#define LPFC_VF3 3
139#define LPFC_VF4 4
140#define LPFC_VF5 5
141#define LPFC_VF6 6
142#define LPFC_VF7 7
143#define LPFC_VF8 8
144#define LPFC_VF9 9
145#define LPFC_VF10 10
146#define LPFC_VF11 11
147#define LPFC_VF12 12
148#define LPFC_VF13 13
149#define LPFC_VF14 14
150#define LPFC_VF15 15
151#define LPFC_VF16 16
152#define LPFC_VF17 17
153#define LPFC_VF18 18
154#define LPFC_VF19 19
155#define LPFC_VF20 20
156#define LPFC_VF21 21
157#define LPFC_VF22 22
158#define LPFC_VF23 23
159#define LPFC_VF24 24
160#define LPFC_VF25 25
161#define LPFC_VF26 26
162#define LPFC_VF27 27
163#define LPFC_VF28 28
164#define LPFC_VF29 29
165#define LPFC_VF30 30
166#define LPFC_VF31 31
167
168/* PCI function numbers */
169#define LPFC_PCI_FUNC0 0
170#define LPFC_PCI_FUNC1 1
171#define LPFC_PCI_FUNC2 2
172#define LPFC_PCI_FUNC3 3
173#define LPFC_PCI_FUNC4 4
174
James Smart88a2cfb2011-07-22 18:36:33 -0400175/* SLI4 interface type-2 PDEV_CTL register */
James Smartc0c11512011-05-24 11:41:34 -0400176#define LPFC_CTL_PDEV_CTL_OFFSET 0x414
James Smartc0c11512011-05-24 11:41:34 -0400177#define LPFC_CTL_PDEV_CTL_DRST 0x00000001
178#define LPFC_CTL_PDEV_CTL_FRST 0x00000002
179#define LPFC_CTL_PDEV_CTL_DD 0x00000004
180#define LPFC_CTL_PDEV_CTL_LC 0x00000008
181#define LPFC_CTL_PDEV_CTL_FRL_ALL 0x00
182#define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE 0x10
183#define LPFC_CTL_PDEV_CTL_FRL_NIC 0x20
184
185#define LPFC_FW_DUMP_REQUEST (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)
186
James Smartda0436e2009-05-22 14:51:39 -0400187/* Active interrupt test count */
188#define LPFC_ACT_INTR_CNT 4
189
James Smart49aa1432012-08-03 12:36:42 -0400190/* Algrithmns for scheduling FCP commands to WQs */
191#define LPFC_FCP_SCHED_ROUND_ROBIN 0
192#define LPFC_FCP_SCHED_BY_CPU 1
193
James Smartda0436e2009-05-22 14:51:39 -0400194/* Delay Multiplier constant */
195#define LPFC_DMULT_CONST 651042
James Smartbf8dae82012-08-03 12:36:24 -0400196
197/* Configuration of Interrupts / sec for entire HBA port */
198#define LPFC_MIN_IMAX 5000
199#define LPFC_MAX_IMAX 5000000
200#define LPFC_DEF_IMAX 50000
James Smartda0436e2009-05-22 14:51:39 -0400201
James Smart28baac72010-02-12 14:42:03 -0500202/* PORT_CAPABILITIES constants. */
203#define LPFC_MAX_SUPPORTED_PAGES 8
204
James Smartda0436e2009-05-22 14:51:39 -0400205struct ulp_bde64 {
206 union ULP_BDE_TUS {
207 uint32_t w;
208 struct {
209#ifdef __BIG_ENDIAN_BITFIELD
210 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
211 VALUE !! */
212 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
213#else /* __LITTLE_ENDIAN_BITFIELD */
214 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
215 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
216 VALUE !! */
217#endif
218#define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */
219#define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */
220#define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */
221#define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */
222#define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */
223#define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */
224#define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */
225 } f;
226 } tus;
227 uint32_t addrLow;
228 uint32_t addrHigh;
229};
230
231struct lpfc_sli4_flags {
232 uint32_t word0;
James Smart6d368e52011-05-24 11:44:12 -0400233#define lpfc_idx_rsrc_rdy_SHIFT 0
234#define lpfc_idx_rsrc_rdy_MASK 0x00000001
235#define lpfc_idx_rsrc_rdy_WORD word0
236#define LPFC_IDX_RSRC_RDY 1
James Smart8a9d2e82012-05-09 21:16:12 -0400237#define lpfc_rpi_rsrc_rdy_SHIFT 1
James Smart6d368e52011-05-24 11:44:12 -0400238#define lpfc_rpi_rsrc_rdy_MASK 0x00000001
239#define lpfc_rpi_rsrc_rdy_WORD word0
240#define LPFC_RPI_RSRC_RDY 1
James Smart8a9d2e82012-05-09 21:16:12 -0400241#define lpfc_vpi_rsrc_rdy_SHIFT 2
James Smart6d368e52011-05-24 11:44:12 -0400242#define lpfc_vpi_rsrc_rdy_MASK 0x00000001
243#define lpfc_vpi_rsrc_rdy_WORD word0
244#define LPFC_VPI_RSRC_RDY 1
James Smart8a9d2e82012-05-09 21:16:12 -0400245#define lpfc_vfi_rsrc_rdy_SHIFT 3
James Smart6d368e52011-05-24 11:44:12 -0400246#define lpfc_vfi_rsrc_rdy_MASK 0x00000001
247#define lpfc_vfi_rsrc_rdy_WORD word0
248#define LPFC_VFI_RSRC_RDY 1
James Smartda0436e2009-05-22 14:51:39 -0400249};
250
James Smart546fc852011-03-11 16:06:29 -0500251struct sli4_bls_rsp {
James Smart5ffc2662009-11-18 15:39:44 -0500252 uint32_t word0_rsvd; /* Word0 must be reserved */
253 uint32_t word1;
254#define lpfc_abts_orig_SHIFT 0
255#define lpfc_abts_orig_MASK 0x00000001
256#define lpfc_abts_orig_WORD word1
257#define LPFC_ABTS_UNSOL_RSP 1
258#define LPFC_ABTS_UNSOL_INT 0
259 uint32_t word2;
260#define lpfc_abts_rxid_SHIFT 0
261#define lpfc_abts_rxid_MASK 0x0000FFFF
262#define lpfc_abts_rxid_WORD word2
263#define lpfc_abts_oxid_SHIFT 16
264#define lpfc_abts_oxid_MASK 0x0000FFFF
265#define lpfc_abts_oxid_WORD word2
266 uint32_t word3;
James Smart546fc852011-03-11 16:06:29 -0500267#define lpfc_vndr_code_SHIFT 0
268#define lpfc_vndr_code_MASK 0x000000FF
269#define lpfc_vndr_code_WORD word3
270#define lpfc_rsn_expln_SHIFT 8
271#define lpfc_rsn_expln_MASK 0x000000FF
272#define lpfc_rsn_expln_WORD word3
273#define lpfc_rsn_code_SHIFT 16
274#define lpfc_rsn_code_MASK 0x000000FF
275#define lpfc_rsn_code_WORD word3
276
James Smart5ffc2662009-11-18 15:39:44 -0500277 uint32_t word4;
278 uint32_t word5_rsvd; /* Word5 must be reserved */
279};
280
James Smartda0436e2009-05-22 14:51:39 -0400281/* event queue entry structure */
282struct lpfc_eqe {
283 uint32_t word0;
284#define lpfc_eqe_resource_id_SHIFT 16
285#define lpfc_eqe_resource_id_MASK 0x000000FF
286#define lpfc_eqe_resource_id_WORD word0
287#define lpfc_eqe_minor_code_SHIFT 4
288#define lpfc_eqe_minor_code_MASK 0x00000FFF
289#define lpfc_eqe_minor_code_WORD word0
290#define lpfc_eqe_major_code_SHIFT 1
291#define lpfc_eqe_major_code_MASK 0x00000007
292#define lpfc_eqe_major_code_WORD word0
293#define lpfc_eqe_valid_SHIFT 0
294#define lpfc_eqe_valid_MASK 0x00000001
295#define lpfc_eqe_valid_WORD word0
296};
297
298/* completion queue entry structure (common fields for all cqe types) */
299struct lpfc_cqe {
300 uint32_t reserved0;
301 uint32_t reserved1;
302 uint32_t reserved2;
303 uint32_t word3;
304#define lpfc_cqe_valid_SHIFT 31
305#define lpfc_cqe_valid_MASK 0x00000001
306#define lpfc_cqe_valid_WORD word3
307#define lpfc_cqe_code_SHIFT 16
308#define lpfc_cqe_code_MASK 0x000000FF
309#define lpfc_cqe_code_WORD word3
310};
311
312/* Completion Queue Entry Status Codes */
313#define CQE_STATUS_SUCCESS 0x0
314#define CQE_STATUS_FCP_RSP_FAILURE 0x1
315#define CQE_STATUS_REMOTE_STOP 0x2
316#define CQE_STATUS_LOCAL_REJECT 0x3
317#define CQE_STATUS_NPORT_RJT 0x4
318#define CQE_STATUS_FABRIC_RJT 0x5
319#define CQE_STATUS_NPORT_BSY 0x6
320#define CQE_STATUS_FABRIC_BSY 0x7
321#define CQE_STATUS_INTERMED_RSP 0x8
322#define CQE_STATUS_LS_RJT 0x9
323#define CQE_STATUS_CMD_REJECT 0xb
324#define CQE_STATUS_FCP_TGT_LENCHECK 0xc
325#define CQE_STATUS_NEED_BUFF_ENTRY 0xf
James Smartacd68592012-01-18 16:25:09 -0500326#define CQE_STATUS_DI_ERROR 0x16
327
328/* Used when mapping CQE status to IOCB */
329#define LPFC_IOCB_STATUS_MASK 0xf
James Smartda0436e2009-05-22 14:51:39 -0400330
331/* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */
332#define CQE_HW_STATUS_NO_ERR 0x0
333#define CQE_HW_STATUS_UNDERRUN 0x1
334#define CQE_HW_STATUS_OVERRUN 0x2
335
336/* Completion Queue Entry Codes */
337#define CQE_CODE_COMPL_WQE 0x1
338#define CQE_CODE_RELEASE_WQE 0x2
339#define CQE_CODE_RECEIVE 0x4
340#define CQE_CODE_XRI_ABORTED 0x5
James Smart7851fe22011-07-22 18:36:52 -0400341#define CQE_CODE_RECEIVE_V1 0x9
James Smartda0436e2009-05-22 14:51:39 -0400342
James Smart5c1db2a2012-03-01 22:34:36 -0500343/*
344 * Define mask value for xri_aborted and wcqe completed CQE extended status.
345 * Currently, extended status is limited to 9 bits (0x0 -> 0x103) .
346 */
James Smarte3d2b802012-08-14 14:25:43 -0400347#define WCQE_PARAM_MASK 0x1FF
James Smart5c1db2a2012-03-01 22:34:36 -0500348
James Smartda0436e2009-05-22 14:51:39 -0400349/* completion queue entry for wqe completions */
350struct lpfc_wcqe_complete {
351 uint32_t word0;
352#define lpfc_wcqe_c_request_tag_SHIFT 16
353#define lpfc_wcqe_c_request_tag_MASK 0x0000FFFF
354#define lpfc_wcqe_c_request_tag_WORD word0
355#define lpfc_wcqe_c_status_SHIFT 8
356#define lpfc_wcqe_c_status_MASK 0x000000FF
357#define lpfc_wcqe_c_status_WORD word0
358#define lpfc_wcqe_c_hw_status_SHIFT 0
359#define lpfc_wcqe_c_hw_status_MASK 0x000000FF
360#define lpfc_wcqe_c_hw_status_WORD word0
361 uint32_t total_data_placed;
362 uint32_t parameter;
James Smartacd68592012-01-18 16:25:09 -0500363#define lpfc_wcqe_c_bg_edir_SHIFT 5
364#define lpfc_wcqe_c_bg_edir_MASK 0x00000001
365#define lpfc_wcqe_c_bg_edir_WORD parameter
366#define lpfc_wcqe_c_bg_tdpv_SHIFT 3
367#define lpfc_wcqe_c_bg_tdpv_MASK 0x00000001
368#define lpfc_wcqe_c_bg_tdpv_WORD parameter
369#define lpfc_wcqe_c_bg_re_SHIFT 2
370#define lpfc_wcqe_c_bg_re_MASK 0x00000001
371#define lpfc_wcqe_c_bg_re_WORD parameter
372#define lpfc_wcqe_c_bg_ae_SHIFT 1
373#define lpfc_wcqe_c_bg_ae_MASK 0x00000001
374#define lpfc_wcqe_c_bg_ae_WORD parameter
375#define lpfc_wcqe_c_bg_ge_SHIFT 0
376#define lpfc_wcqe_c_bg_ge_MASK 0x00000001
377#define lpfc_wcqe_c_bg_ge_WORD parameter
James Smartda0436e2009-05-22 14:51:39 -0400378 uint32_t word3;
379#define lpfc_wcqe_c_valid_SHIFT lpfc_cqe_valid_SHIFT
380#define lpfc_wcqe_c_valid_MASK lpfc_cqe_valid_MASK
381#define lpfc_wcqe_c_valid_WORD lpfc_cqe_valid_WORD
382#define lpfc_wcqe_c_xb_SHIFT 28
383#define lpfc_wcqe_c_xb_MASK 0x00000001
384#define lpfc_wcqe_c_xb_WORD word3
385#define lpfc_wcqe_c_pv_SHIFT 27
386#define lpfc_wcqe_c_pv_MASK 0x00000001
387#define lpfc_wcqe_c_pv_WORD word3
388#define lpfc_wcqe_c_priority_SHIFT 24
James Smartacd68592012-01-18 16:25:09 -0500389#define lpfc_wcqe_c_priority_MASK 0x00000007
390#define lpfc_wcqe_c_priority_WORD word3
James Smartda0436e2009-05-22 14:51:39 -0400391#define lpfc_wcqe_c_code_SHIFT lpfc_cqe_code_SHIFT
392#define lpfc_wcqe_c_code_MASK lpfc_cqe_code_MASK
393#define lpfc_wcqe_c_code_WORD lpfc_cqe_code_WORD
394};
395
396/* completion queue entry for wqe release */
397struct lpfc_wcqe_release {
398 uint32_t reserved0;
399 uint32_t reserved1;
400 uint32_t word2;
401#define lpfc_wcqe_r_wq_id_SHIFT 16
402#define lpfc_wcqe_r_wq_id_MASK 0x0000FFFF
403#define lpfc_wcqe_r_wq_id_WORD word2
404#define lpfc_wcqe_r_wqe_index_SHIFT 0
405#define lpfc_wcqe_r_wqe_index_MASK 0x0000FFFF
406#define lpfc_wcqe_r_wqe_index_WORD word2
407 uint32_t word3;
408#define lpfc_wcqe_r_valid_SHIFT lpfc_cqe_valid_SHIFT
409#define lpfc_wcqe_r_valid_MASK lpfc_cqe_valid_MASK
410#define lpfc_wcqe_r_valid_WORD lpfc_cqe_valid_WORD
411#define lpfc_wcqe_r_code_SHIFT lpfc_cqe_code_SHIFT
412#define lpfc_wcqe_r_code_MASK lpfc_cqe_code_MASK
413#define lpfc_wcqe_r_code_WORD lpfc_cqe_code_WORD
414};
415
416struct sli4_wcqe_xri_aborted {
417 uint32_t word0;
418#define lpfc_wcqe_xa_status_SHIFT 8
419#define lpfc_wcqe_xa_status_MASK 0x000000FF
420#define lpfc_wcqe_xa_status_WORD word0
421 uint32_t parameter;
422 uint32_t word2;
423#define lpfc_wcqe_xa_remote_xid_SHIFT 16
424#define lpfc_wcqe_xa_remote_xid_MASK 0x0000FFFF
425#define lpfc_wcqe_xa_remote_xid_WORD word2
426#define lpfc_wcqe_xa_xri_SHIFT 0
427#define lpfc_wcqe_xa_xri_MASK 0x0000FFFF
428#define lpfc_wcqe_xa_xri_WORD word2
429 uint32_t word3;
430#define lpfc_wcqe_xa_valid_SHIFT lpfc_cqe_valid_SHIFT
431#define lpfc_wcqe_xa_valid_MASK lpfc_cqe_valid_MASK
432#define lpfc_wcqe_xa_valid_WORD lpfc_cqe_valid_WORD
433#define lpfc_wcqe_xa_ia_SHIFT 30
434#define lpfc_wcqe_xa_ia_MASK 0x00000001
435#define lpfc_wcqe_xa_ia_WORD word3
436#define CQE_XRI_ABORTED_IA_REMOTE 0
437#define CQE_XRI_ABORTED_IA_LOCAL 1
438#define lpfc_wcqe_xa_br_SHIFT 29
439#define lpfc_wcqe_xa_br_MASK 0x00000001
440#define lpfc_wcqe_xa_br_WORD word3
441#define CQE_XRI_ABORTED_BR_BA_ACC 0
442#define CQE_XRI_ABORTED_BR_BA_RJT 1
443#define lpfc_wcqe_xa_eo_SHIFT 28
444#define lpfc_wcqe_xa_eo_MASK 0x00000001
445#define lpfc_wcqe_xa_eo_WORD word3
446#define CQE_XRI_ABORTED_EO_REMOTE 0
447#define CQE_XRI_ABORTED_EO_LOCAL 1
448#define lpfc_wcqe_xa_code_SHIFT lpfc_cqe_code_SHIFT
449#define lpfc_wcqe_xa_code_MASK lpfc_cqe_code_MASK
450#define lpfc_wcqe_xa_code_WORD lpfc_cqe_code_WORD
451};
452
453/* completion queue entry structure for rqe completion */
454struct lpfc_rcqe {
455 uint32_t word0;
456#define lpfc_rcqe_bindex_SHIFT 16
457#define lpfc_rcqe_bindex_MASK 0x0000FFF
458#define lpfc_rcqe_bindex_WORD word0
459#define lpfc_rcqe_status_SHIFT 8
460#define lpfc_rcqe_status_MASK 0x000000FF
461#define lpfc_rcqe_status_WORD word0
462#define FC_STATUS_RQ_SUCCESS 0x10 /* Async receive successful */
463#define FC_STATUS_RQ_BUF_LEN_EXCEEDED 0x11 /* payload truncated */
464#define FC_STATUS_INSUFF_BUF_NEED_BUF 0x12 /* Insufficient buffers */
465#define FC_STATUS_INSUFF_BUF_FRM_DISC 0x13 /* Frame Discard */
James Smart7851fe22011-07-22 18:36:52 -0400466 uint32_t word1;
467#define lpfc_rcqe_fcf_id_v1_SHIFT 0
468#define lpfc_rcqe_fcf_id_v1_MASK 0x0000003F
469#define lpfc_rcqe_fcf_id_v1_WORD word1
James Smartda0436e2009-05-22 14:51:39 -0400470 uint32_t word2;
471#define lpfc_rcqe_length_SHIFT 16
472#define lpfc_rcqe_length_MASK 0x0000FFFF
473#define lpfc_rcqe_length_WORD word2
474#define lpfc_rcqe_rq_id_SHIFT 6
475#define lpfc_rcqe_rq_id_MASK 0x000003FF
476#define lpfc_rcqe_rq_id_WORD word2
477#define lpfc_rcqe_fcf_id_SHIFT 0
478#define lpfc_rcqe_fcf_id_MASK 0x0000003F
479#define lpfc_rcqe_fcf_id_WORD word2
James Smart7851fe22011-07-22 18:36:52 -0400480#define lpfc_rcqe_rq_id_v1_SHIFT 0
481#define lpfc_rcqe_rq_id_v1_MASK 0x0000FFFF
482#define lpfc_rcqe_rq_id_v1_WORD word2
James Smartda0436e2009-05-22 14:51:39 -0400483 uint32_t word3;
484#define lpfc_rcqe_valid_SHIFT lpfc_cqe_valid_SHIFT
485#define lpfc_rcqe_valid_MASK lpfc_cqe_valid_MASK
486#define lpfc_rcqe_valid_WORD lpfc_cqe_valid_WORD
487#define lpfc_rcqe_port_SHIFT 30
488#define lpfc_rcqe_port_MASK 0x00000001
489#define lpfc_rcqe_port_WORD word3
490#define lpfc_rcqe_hdr_length_SHIFT 24
491#define lpfc_rcqe_hdr_length_MASK 0x0000001F
492#define lpfc_rcqe_hdr_length_WORD word3
493#define lpfc_rcqe_code_SHIFT lpfc_cqe_code_SHIFT
494#define lpfc_rcqe_code_MASK lpfc_cqe_code_MASK
495#define lpfc_rcqe_code_WORD lpfc_cqe_code_WORD
496#define lpfc_rcqe_eof_SHIFT 8
497#define lpfc_rcqe_eof_MASK 0x000000FF
498#define lpfc_rcqe_eof_WORD word3
499#define FCOE_EOFn 0x41
500#define FCOE_EOFt 0x42
501#define FCOE_EOFni 0x49
502#define FCOE_EOFa 0x50
503#define lpfc_rcqe_sof_SHIFT 0
504#define lpfc_rcqe_sof_MASK 0x000000FF
505#define lpfc_rcqe_sof_WORD word3
506#define FCOE_SOFi2 0x2d
507#define FCOE_SOFi3 0x2e
508#define FCOE_SOFn2 0x35
509#define FCOE_SOFn3 0x36
510};
511
James Smartda0436e2009-05-22 14:51:39 -0400512struct lpfc_rqe {
513 uint32_t address_hi;
514 uint32_t address_lo;
515};
516
517/* buffer descriptors */
518struct lpfc_bde4 {
519 uint32_t addr_hi;
520 uint32_t addr_lo;
521 uint32_t word2;
522#define lpfc_bde4_last_SHIFT 31
523#define lpfc_bde4_last_MASK 0x00000001
524#define lpfc_bde4_last_WORD word2
525#define lpfc_bde4_sge_offset_SHIFT 0
526#define lpfc_bde4_sge_offset_MASK 0x000003FF
527#define lpfc_bde4_sge_offset_WORD word2
528 uint32_t word3;
529#define lpfc_bde4_length_SHIFT 0
530#define lpfc_bde4_length_MASK 0x000000FF
531#define lpfc_bde4_length_WORD word3
532};
533
534struct lpfc_register {
535 uint32_t word0;
536};
537
James Smart085c6472010-11-20 23:11:37 -0500538/* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
James Smartda0436e2009-05-22 14:51:39 -0400539#define LPFC_UERR_STATUS_HI 0x00A4
540#define LPFC_UERR_STATUS_LO 0x00A0
James Smarta747c9c2009-11-18 15:41:10 -0500541#define LPFC_UE_MASK_HI 0x00AC
542#define LPFC_UE_MASK_LO 0x00A8
James Smartda0436e2009-05-22 14:51:39 -0400543
James Smart2fcee4b2010-12-15 17:57:46 -0500544/* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */
545#define LPFC_SLI_INTF 0x0058
James Smartda0436e2009-05-22 14:51:39 -0400546
James Smart88a2cfb2011-07-22 18:36:33 -0400547#define LPFC_CTL_PORT_SEM_OFFSET 0x400
James Smart2fcee4b2010-12-15 17:57:46 -0500548#define lpfc_port_smphr_perr_SHIFT 31
549#define lpfc_port_smphr_perr_MASK 0x1
550#define lpfc_port_smphr_perr_WORD word0
551#define lpfc_port_smphr_sfi_SHIFT 30
552#define lpfc_port_smphr_sfi_MASK 0x1
553#define lpfc_port_smphr_sfi_WORD word0
554#define lpfc_port_smphr_nip_SHIFT 29
555#define lpfc_port_smphr_nip_MASK 0x1
556#define lpfc_port_smphr_nip_WORD word0
557#define lpfc_port_smphr_ipc_SHIFT 28
558#define lpfc_port_smphr_ipc_MASK 0x1
559#define lpfc_port_smphr_ipc_WORD word0
560#define lpfc_port_smphr_scr1_SHIFT 27
561#define lpfc_port_smphr_scr1_MASK 0x1
562#define lpfc_port_smphr_scr1_WORD word0
563#define lpfc_port_smphr_scr2_SHIFT 26
564#define lpfc_port_smphr_scr2_MASK 0x1
565#define lpfc_port_smphr_scr2_WORD word0
566#define lpfc_port_smphr_host_scratch_SHIFT 16
567#define lpfc_port_smphr_host_scratch_MASK 0xFF
568#define lpfc_port_smphr_host_scratch_WORD word0
569#define lpfc_port_smphr_port_status_SHIFT 0
570#define lpfc_port_smphr_port_status_MASK 0xFFFF
571#define lpfc_port_smphr_port_status_WORD word0
572
James Smartda0436e2009-05-22 14:51:39 -0400573#define LPFC_POST_STAGE_POWER_ON_RESET 0x0000
574#define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001
575#define LPFC_POST_STAGE_HOST_RDY 0x0002
576#define LPFC_POST_STAGE_BE_RESET 0x0003
577#define LPFC_POST_STAGE_SEEPROM_CS_START 0x0100
578#define LPFC_POST_STAGE_SEEPROM_CS_DONE 0x0101
579#define LPFC_POST_STAGE_DDR_CONFIG_START 0x0200
580#define LPFC_POST_STAGE_DDR_CONFIG_DONE 0x0201
581#define LPFC_POST_STAGE_DDR_CALIBRATE_START 0x0300
582#define LPFC_POST_STAGE_DDR_CALIBRATE_DONE 0x0301
583#define LPFC_POST_STAGE_DDR_TEST_START 0x0400
584#define LPFC_POST_STAGE_DDR_TEST_DONE 0x0401
585#define LPFC_POST_STAGE_REDBOOT_INIT_START 0x0600
586#define LPFC_POST_STAGE_REDBOOT_INIT_DONE 0x0601
587#define LPFC_POST_STAGE_FW_IMAGE_LOAD_START 0x0700
588#define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE 0x0701
589#define LPFC_POST_STAGE_ARMFW_START 0x0800
590#define LPFC_POST_STAGE_DHCP_QUERY_START 0x0900
591#define LPFC_POST_STAGE_DHCP_QUERY_DONE 0x0901
592#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START 0x0A00
593#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE 0x0A01
594#define LPFC_POST_STAGE_RC_OPTION_SET 0x0B00
595#define LPFC_POST_STAGE_SWITCH_LINK 0x0B01
596#define LPFC_POST_STAGE_SEND_ICDS_MESSAGE 0x0B02
597#define LPFC_POST_STAGE_PERFROM_TFTP 0x0B03
598#define LPFC_POST_STAGE_PARSE_XML 0x0B04
599#define LPFC_POST_STAGE_DOWNLOAD_IMAGE 0x0B05
600#define LPFC_POST_STAGE_FLASH_IMAGE 0x0B06
601#define LPFC_POST_STAGE_RC_DONE 0x0B07
602#define LPFC_POST_STAGE_REBOOT_SYSTEM 0x0B08
603#define LPFC_POST_STAGE_MAC_ADDRESS 0x0C00
James Smart2fcee4b2010-12-15 17:57:46 -0500604#define LPFC_POST_STAGE_PORT_READY 0xC000
605#define LPFC_POST_STAGE_PORT_UE 0xF000
James Smart085c6472010-11-20 23:11:37 -0500606
James Smart88a2cfb2011-07-22 18:36:33 -0400607#define LPFC_CTL_PORT_STA_OFFSET 0x404
James Smart085c6472010-11-20 23:11:37 -0500608#define lpfc_sliport_status_err_SHIFT 31
609#define lpfc_sliport_status_err_MASK 0x1
610#define lpfc_sliport_status_err_WORD word0
611#define lpfc_sliport_status_end_SHIFT 30
612#define lpfc_sliport_status_end_MASK 0x1
613#define lpfc_sliport_status_end_WORD word0
614#define lpfc_sliport_status_oti_SHIFT 29
615#define lpfc_sliport_status_oti_MASK 0x1
616#define lpfc_sliport_status_oti_WORD word0
617#define lpfc_sliport_status_rn_SHIFT 24
618#define lpfc_sliport_status_rn_MASK 0x1
619#define lpfc_sliport_status_rn_WORD word0
620#define lpfc_sliport_status_rdy_SHIFT 23
621#define lpfc_sliport_status_rdy_MASK 0x1
622#define lpfc_sliport_status_rdy_WORD word0
James Smart2fcee4b2010-12-15 17:57:46 -0500623#define MAX_IF_TYPE_2_RESETS 1000
James Smart085c6472010-11-20 23:11:37 -0500624
James Smart88a2cfb2011-07-22 18:36:33 -0400625#define LPFC_CTL_PORT_CTL_OFFSET 0x408
James Smart085c6472010-11-20 23:11:37 -0500626#define lpfc_sliport_ctrl_end_SHIFT 30
627#define lpfc_sliport_ctrl_end_MASK 0x1
628#define lpfc_sliport_ctrl_end_WORD word0
629#define LPFC_SLIPORT_LITTLE_ENDIAN 0
630#define LPFC_SLIPORT_BIG_ENDIAN 1
631#define lpfc_sliport_ctrl_ip_SHIFT 27
632#define lpfc_sliport_ctrl_ip_MASK 0x1
633#define lpfc_sliport_ctrl_ip_WORD word0
James Smart2fcee4b2010-12-15 17:57:46 -0500634#define LPFC_SLIPORT_INIT_PORT 1
James Smart085c6472010-11-20 23:11:37 -0500635
James Smart88a2cfb2011-07-22 18:36:33 -0400636#define LPFC_CTL_PORT_ER1_OFFSET 0x40C
637#define LPFC_CTL_PORT_ER2_OFFSET 0x410
James Smart085c6472010-11-20 23:11:37 -0500638
James Smart2fcee4b2010-12-15 17:57:46 -0500639/* The following Registers apply to SLI4 if_type 0 UCNAs. They typically
640 * reside in BAR 2.
641 */
642#define LPFC_SLIPORT_IF0_SMPHR 0x00AC
643
James Smartda0436e2009-05-22 14:51:39 -0400644#define LPFC_IMR_MASK_ALL 0xFFFFFFFF
645#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
646
647#define LPFC_HST_ISR0 0x0C18
648#define LPFC_HST_ISR1 0x0C1C
649#define LPFC_HST_ISR2 0x0C20
650#define LPFC_HST_ISR3 0x0C24
651#define LPFC_HST_ISR4 0x0C28
652
653#define LPFC_HST_IMR0 0x0C48
654#define LPFC_HST_IMR1 0x0C4C
655#define LPFC_HST_IMR2 0x0C50
656#define LPFC_HST_IMR3 0x0C54
657#define LPFC_HST_IMR4 0x0C58
658
659#define LPFC_HST_ISCR0 0x0C78
660#define LPFC_HST_ISCR1 0x0C7C
661#define LPFC_HST_ISCR2 0x0C80
662#define LPFC_HST_ISCR3 0x0C84
663#define LPFC_HST_ISCR4 0x0C88
664
665#define LPFC_SLI4_INTR0 BIT0
666#define LPFC_SLI4_INTR1 BIT1
667#define LPFC_SLI4_INTR2 BIT2
668#define LPFC_SLI4_INTR3 BIT3
669#define LPFC_SLI4_INTR4 BIT4
670#define LPFC_SLI4_INTR5 BIT5
671#define LPFC_SLI4_INTR6 BIT6
672#define LPFC_SLI4_INTR7 BIT7
673#define LPFC_SLI4_INTR8 BIT8
674#define LPFC_SLI4_INTR9 BIT9
675#define LPFC_SLI4_INTR10 BIT10
676#define LPFC_SLI4_INTR11 BIT11
677#define LPFC_SLI4_INTR12 BIT12
678#define LPFC_SLI4_INTR13 BIT13
679#define LPFC_SLI4_INTR14 BIT14
680#define LPFC_SLI4_INTR15 BIT15
681#define LPFC_SLI4_INTR16 BIT16
682#define LPFC_SLI4_INTR17 BIT17
683#define LPFC_SLI4_INTR18 BIT18
684#define LPFC_SLI4_INTR19 BIT19
685#define LPFC_SLI4_INTR20 BIT20
686#define LPFC_SLI4_INTR21 BIT21
687#define LPFC_SLI4_INTR22 BIT22
688#define LPFC_SLI4_INTR23 BIT23
689#define LPFC_SLI4_INTR24 BIT24
690#define LPFC_SLI4_INTR25 BIT25
691#define LPFC_SLI4_INTR26 BIT26
692#define LPFC_SLI4_INTR27 BIT27
693#define LPFC_SLI4_INTR28 BIT28
694#define LPFC_SLI4_INTR29 BIT29
695#define LPFC_SLI4_INTR30 BIT30
696#define LPFC_SLI4_INTR31 BIT31
697
James Smart085c6472010-11-20 23:11:37 -0500698/*
699 * The Doorbell registers defined here exist in different BAR
700 * register sets depending on the UCNA Port's reported if_type
701 * value. For UCNA ports running SLI4 and if_type 0, they reside in
James Smart2fcee4b2010-12-15 17:57:46 -0500702 * BAR4. For UCNA ports running SLI4 and if_type 2, they reside in
James Smart085c6472010-11-20 23:11:37 -0500703 * BAR0. The offsets are the same so the driver must account for
704 * any base address difference.
705 */
James Smartda0436e2009-05-22 14:51:39 -0400706#define LPFC_RQ_DOORBELL 0x00A0
707#define lpfc_rq_doorbell_num_posted_SHIFT 16
708#define lpfc_rq_doorbell_num_posted_MASK 0x3FFF
709#define lpfc_rq_doorbell_num_posted_WORD word0
James Smartda0436e2009-05-22 14:51:39 -0400710#define lpfc_rq_doorbell_id_SHIFT 0
James Smart085c6472010-11-20 23:11:37 -0500711#define lpfc_rq_doorbell_id_MASK 0xFFFF
James Smartda0436e2009-05-22 14:51:39 -0400712#define lpfc_rq_doorbell_id_WORD word0
713
714#define LPFC_WQ_DOORBELL 0x0040
715#define lpfc_wq_doorbell_num_posted_SHIFT 24
716#define lpfc_wq_doorbell_num_posted_MASK 0x00FF
717#define lpfc_wq_doorbell_num_posted_WORD word0
718#define lpfc_wq_doorbell_index_SHIFT 16
719#define lpfc_wq_doorbell_index_MASK 0x00FF
720#define lpfc_wq_doorbell_index_WORD word0
721#define lpfc_wq_doorbell_id_SHIFT 0
722#define lpfc_wq_doorbell_id_MASK 0xFFFF
723#define lpfc_wq_doorbell_id_WORD word0
724
725#define LPFC_EQCQ_DOORBELL 0x0120
James Smart085c6472010-11-20 23:11:37 -0500726#define lpfc_eqcq_doorbell_se_SHIFT 31
727#define lpfc_eqcq_doorbell_se_MASK 0x0001
728#define lpfc_eqcq_doorbell_se_WORD word0
729#define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0
730#define LPFC_EQCQ_SOLICIT_ENABLE_ON 1
James Smartda0436e2009-05-22 14:51:39 -0400731#define lpfc_eqcq_doorbell_arm_SHIFT 29
732#define lpfc_eqcq_doorbell_arm_MASK 0x0001
733#define lpfc_eqcq_doorbell_arm_WORD word0
734#define lpfc_eqcq_doorbell_num_released_SHIFT 16
735#define lpfc_eqcq_doorbell_num_released_MASK 0x1FFF
736#define lpfc_eqcq_doorbell_num_released_WORD word0
737#define lpfc_eqcq_doorbell_qt_SHIFT 10
738#define lpfc_eqcq_doorbell_qt_MASK 0x0001
739#define lpfc_eqcq_doorbell_qt_WORD word0
740#define LPFC_QUEUE_TYPE_COMPLETION 0
741#define LPFC_QUEUE_TYPE_EVENT 1
742#define lpfc_eqcq_doorbell_eqci_SHIFT 9
743#define lpfc_eqcq_doorbell_eqci_MASK 0x0001
744#define lpfc_eqcq_doorbell_eqci_WORD word0
James Smart6b5151f2012-01-18 16:24:06 -0500745#define lpfc_eqcq_doorbell_cqid_lo_SHIFT 0
746#define lpfc_eqcq_doorbell_cqid_lo_MASK 0x03FF
747#define lpfc_eqcq_doorbell_cqid_lo_WORD word0
748#define lpfc_eqcq_doorbell_cqid_hi_SHIFT 11
749#define lpfc_eqcq_doorbell_cqid_hi_MASK 0x001F
750#define lpfc_eqcq_doorbell_cqid_hi_WORD word0
751#define lpfc_eqcq_doorbell_eqid_lo_SHIFT 0
752#define lpfc_eqcq_doorbell_eqid_lo_MASK 0x01FF
753#define lpfc_eqcq_doorbell_eqid_lo_WORD word0
754#define lpfc_eqcq_doorbell_eqid_hi_SHIFT 11
755#define lpfc_eqcq_doorbell_eqid_hi_MASK 0x001F
756#define lpfc_eqcq_doorbell_eqid_hi_WORD word0
757#define LPFC_CQID_HI_FIELD_SHIFT 10
758#define LPFC_EQID_HI_FIELD_SHIFT 9
James Smartda0436e2009-05-22 14:51:39 -0400759
760#define LPFC_BMBX 0x0160
761#define lpfc_bmbx_addr_SHIFT 2
762#define lpfc_bmbx_addr_MASK 0x3FFFFFFF
763#define lpfc_bmbx_addr_WORD word0
764#define lpfc_bmbx_hi_SHIFT 1
765#define lpfc_bmbx_hi_MASK 0x0001
766#define lpfc_bmbx_hi_WORD word0
767#define lpfc_bmbx_rdy_SHIFT 0
768#define lpfc_bmbx_rdy_MASK 0x0001
769#define lpfc_bmbx_rdy_WORD word0
770
771#define LPFC_MQ_DOORBELL 0x0140
772#define lpfc_mq_doorbell_num_posted_SHIFT 16
773#define lpfc_mq_doorbell_num_posted_MASK 0x3FFF
774#define lpfc_mq_doorbell_num_posted_WORD word0
775#define lpfc_mq_doorbell_id_SHIFT 0
James Smart085c6472010-11-20 23:11:37 -0500776#define lpfc_mq_doorbell_id_MASK 0xFFFF
James Smartda0436e2009-05-22 14:51:39 -0400777#define lpfc_mq_doorbell_id_WORD word0
778
779struct lpfc_sli4_cfg_mhdr {
780 uint32_t word1;
781#define lpfc_mbox_hdr_emb_SHIFT 0
782#define lpfc_mbox_hdr_emb_MASK 0x00000001
783#define lpfc_mbox_hdr_emb_WORD word1
784#define lpfc_mbox_hdr_sge_cnt_SHIFT 3
785#define lpfc_mbox_hdr_sge_cnt_MASK 0x0000001F
786#define lpfc_mbox_hdr_sge_cnt_WORD word1
787 uint32_t payload_length;
788 uint32_t tag_lo;
789 uint32_t tag_hi;
790 uint32_t reserved5;
791};
792
793union lpfc_sli4_cfg_shdr {
794 struct {
795 uint32_t word6;
James Smart5a6f1332011-03-11 16:05:35 -0500796#define lpfc_mbox_hdr_opcode_SHIFT 0
797#define lpfc_mbox_hdr_opcode_MASK 0x000000FF
798#define lpfc_mbox_hdr_opcode_WORD word6
799#define lpfc_mbox_hdr_subsystem_SHIFT 8
800#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
801#define lpfc_mbox_hdr_subsystem_WORD word6
802#define lpfc_mbox_hdr_port_number_SHIFT 16
803#define lpfc_mbox_hdr_port_number_MASK 0x000000FF
804#define lpfc_mbox_hdr_port_number_WORD word6
805#define lpfc_mbox_hdr_domain_SHIFT 24
806#define lpfc_mbox_hdr_domain_MASK 0x000000FF
807#define lpfc_mbox_hdr_domain_WORD word6
James Smartda0436e2009-05-22 14:51:39 -0400808 uint32_t timeout;
809 uint32_t request_length;
James Smart5a6f1332011-03-11 16:05:35 -0500810 uint32_t word9;
811#define lpfc_mbox_hdr_version_SHIFT 0
812#define lpfc_mbox_hdr_version_MASK 0x000000FF
813#define lpfc_mbox_hdr_version_WORD word9
James Smart912e3ac2011-05-24 11:42:11 -0400814#define lpfc_mbox_hdr_pf_num_SHIFT 16
815#define lpfc_mbox_hdr_pf_num_MASK 0x000000FF
816#define lpfc_mbox_hdr_pf_num_WORD word9
817#define lpfc_mbox_hdr_vh_num_SHIFT 24
818#define lpfc_mbox_hdr_vh_num_MASK 0x000000FF
819#define lpfc_mbox_hdr_vh_num_WORD word9
James Smart5a6f1332011-03-11 16:05:35 -0500820#define LPFC_Q_CREATE_VERSION_2 2
821#define LPFC_Q_CREATE_VERSION_1 1
822#define LPFC_Q_CREATE_VERSION_0 0
James Smartcd1c8302011-10-10 21:33:25 -0400823#define LPFC_OPCODE_VERSION_0 0
824#define LPFC_OPCODE_VERSION_1 1
James Smartda0436e2009-05-22 14:51:39 -0400825 } request;
826 struct {
827 uint32_t word6;
828#define lpfc_mbox_hdr_opcode_SHIFT 0
829#define lpfc_mbox_hdr_opcode_MASK 0x000000FF
830#define lpfc_mbox_hdr_opcode_WORD word6
831#define lpfc_mbox_hdr_subsystem_SHIFT 8
832#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
833#define lpfc_mbox_hdr_subsystem_WORD word6
834#define lpfc_mbox_hdr_domain_SHIFT 24
835#define lpfc_mbox_hdr_domain_MASK 0x000000FF
836#define lpfc_mbox_hdr_domain_WORD word6
837 uint32_t word7;
838#define lpfc_mbox_hdr_status_SHIFT 0
839#define lpfc_mbox_hdr_status_MASK 0x000000FF
840#define lpfc_mbox_hdr_status_WORD word7
841#define lpfc_mbox_hdr_add_status_SHIFT 8
842#define lpfc_mbox_hdr_add_status_MASK 0x000000FF
843#define lpfc_mbox_hdr_add_status_WORD word7
844 uint32_t response_length;
845 uint32_t actual_response_length;
846 } response;
847};
848
James Smart6d368e52011-05-24 11:44:12 -0400849/* Mailbox Header structures.
850 * struct mbox_header is defined for first generation SLI4_CFG mailbox
851 * calls deployed for BE-based ports.
852 *
853 * struct sli4_mbox_header is defined for second generation SLI4
854 * ports that don't deploy the SLI4_CFG mechanism.
855 */
James Smartda0436e2009-05-22 14:51:39 -0400856struct mbox_header {
857 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
858 union lpfc_sli4_cfg_shdr cfg_shdr;
859};
860
James Smart6d368e52011-05-24 11:44:12 -0400861#define LPFC_EXTENT_LOCAL 0
862#define LPFC_TIMEOUT_DEFAULT 0
863#define LPFC_EXTENT_VERSION_DEFAULT 0
864
James Smartda0436e2009-05-22 14:51:39 -0400865/* Subsystem Definitions */
James Smarta183a152011-10-10 21:32:43 -0400866#define LPFC_MBOX_SUBSYSTEM_NA 0x0
James Smartda0436e2009-05-22 14:51:39 -0400867#define LPFC_MBOX_SUBSYSTEM_COMMON 0x1
868#define LPFC_MBOX_SUBSYSTEM_FCOE 0xC
869
870/* Device Specific Definitions */
871
872/* The HOST ENDIAN defines are in Big Endian format. */
873#define HOST_ENDIAN_LOW_WORD0 0xFF3412FF
874#define HOST_ENDIAN_HIGH_WORD1 0xFF7856FF
875
876/* Common Opcodes */
James Smarta183a152011-10-10 21:32:43 -0400877#define LPFC_MBOX_OPCODE_NA 0x00
878#define LPFC_MBOX_OPCODE_CQ_CREATE 0x0C
879#define LPFC_MBOX_OPCODE_EQ_CREATE 0x0D
880#define LPFC_MBOX_OPCODE_MQ_CREATE 0x15
881#define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES 0x20
882#define LPFC_MBOX_OPCODE_NOP 0x21
James Smart173edbb2012-06-12 13:54:50 -0400883#define LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY 0x29
James Smarta183a152011-10-10 21:32:43 -0400884#define LPFC_MBOX_OPCODE_MQ_DESTROY 0x35
885#define LPFC_MBOX_OPCODE_CQ_DESTROY 0x36
886#define LPFC_MBOX_OPCODE_EQ_DESTROY 0x37
887#define LPFC_MBOX_OPCODE_QUERY_FW_CFG 0x3A
888#define LPFC_MBOX_OPCODE_FUNCTION_RESET 0x3D
James Smart940eb682012-08-03 12:37:08 -0400889#define LPFC_MBOX_OPCODE_SET_PHYSICAL_LINK_CONFIG 0x3E
890#define LPFC_MBOX_OPCODE_SET_BOOT_CONFIG 0x43
James Smartcd1c8302011-10-10 21:33:25 -0400891#define LPFC_MBOX_OPCODE_GET_PORT_NAME 0x4D
James Smarta183a152011-10-10 21:32:43 -0400892#define LPFC_MBOX_OPCODE_MQ_CREATE_EXT 0x5A
James Smart940eb682012-08-03 12:37:08 -0400893#define LPFC_MBOX_OPCODE_GET_VPD_DATA 0x5B
894#define LPFC_MBOX_OPCODE_SEND_ACTIVATION 0x73
895#define LPFC_MBOX_OPCODE_RESET_LICENSES 0x74
James Smarta183a152011-10-10 21:32:43 -0400896#define LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO 0x9A
897#define LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT 0x9B
898#define LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT 0x9C
899#define LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT 0x9D
900#define LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG 0xA0
James Smart940eb682012-08-03 12:37:08 -0400901#define LPFC_MBOX_OPCODE_GET_PROFILE_CAPACITIES 0xA1
James Smarta183a152011-10-10 21:32:43 -0400902#define LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG 0xA4
903#define LPFC_MBOX_OPCODE_SET_PROFILE_CONFIG 0xA5
904#define LPFC_MBOX_OPCODE_GET_PROFILE_LIST 0xA6
905#define LPFC_MBOX_OPCODE_SET_ACT_PROFILE 0xA8
906#define LPFC_MBOX_OPCODE_GET_FACTORY_PROFILE_CONFIG 0xA9
907#define LPFC_MBOX_OPCODE_READ_OBJECT 0xAB
908#define LPFC_MBOX_OPCODE_WRITE_OBJECT 0xAC
909#define LPFC_MBOX_OPCODE_READ_OBJECT_LIST 0xAD
910#define LPFC_MBOX_OPCODE_DELETE_OBJECT 0xAE
911#define LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS 0xB5
James Smartda0436e2009-05-22 14:51:39 -0400912
913/* FCoE Opcodes */
914#define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE 0x01
915#define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY 0x02
916#define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES 0x03
917#define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES 0x04
918#define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE 0x05
919#define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY 0x06
920#define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE 0x08
921#define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09
922#define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A
923#define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B
James Smartecfd03c2010-02-12 14:41:27 -0500924#define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10
James Smarta183a152011-10-10 21:32:43 -0400925#define LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS 0x21
James Smart7ad20aa2011-05-24 11:44:28 -0400926#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE 0x22
927#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK 0x23
James Smartda0436e2009-05-22 14:51:39 -0400928
929/* Mailbox command structures */
930struct eq_context {
931 uint32_t word0;
932#define lpfc_eq_context_size_SHIFT 31
933#define lpfc_eq_context_size_MASK 0x00000001
934#define lpfc_eq_context_size_WORD word0
935#define LPFC_EQE_SIZE_4 0x0
936#define LPFC_EQE_SIZE_16 0x1
937#define lpfc_eq_context_valid_SHIFT 29
938#define lpfc_eq_context_valid_MASK 0x00000001
939#define lpfc_eq_context_valid_WORD word0
940 uint32_t word1;
941#define lpfc_eq_context_count_SHIFT 26
942#define lpfc_eq_context_count_MASK 0x00000003
943#define lpfc_eq_context_count_WORD word1
944#define LPFC_EQ_CNT_256 0x0
945#define LPFC_EQ_CNT_512 0x1
946#define LPFC_EQ_CNT_1024 0x2
947#define LPFC_EQ_CNT_2048 0x3
948#define LPFC_EQ_CNT_4096 0x4
949 uint32_t word2;
950#define lpfc_eq_context_delay_multi_SHIFT 13
951#define lpfc_eq_context_delay_multi_MASK 0x000003FF
952#define lpfc_eq_context_delay_multi_WORD word2
953 uint32_t reserved3;
954};
955
James Smart173edbb2012-06-12 13:54:50 -0400956struct eq_delay_info {
957 uint32_t eq_id;
958 uint32_t phase;
959 uint32_t delay_multi;
960};
961#define LPFC_MAX_EQ_DELAY 8
962
James Smartda0436e2009-05-22 14:51:39 -0400963struct sgl_page_pairs {
964 uint32_t sgl_pg0_addr_lo;
965 uint32_t sgl_pg0_addr_hi;
966 uint32_t sgl_pg1_addr_lo;
967 uint32_t sgl_pg1_addr_hi;
968};
969
970struct lpfc_mbx_post_sgl_pages {
971 struct mbox_header header;
972 uint32_t word0;
973#define lpfc_post_sgl_pages_xri_SHIFT 0
974#define lpfc_post_sgl_pages_xri_MASK 0x0000FFFF
975#define lpfc_post_sgl_pages_xri_WORD word0
976#define lpfc_post_sgl_pages_xricnt_SHIFT 16
977#define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF
978#define lpfc_post_sgl_pages_xricnt_WORD word0
979 struct sgl_page_pairs sgl_pg_pairs[1];
980};
981
982/* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */
983struct lpfc_mbx_post_uembed_sgl_page1 {
984 union lpfc_sli4_cfg_shdr cfg_shdr;
985 uint32_t word0;
986 struct sgl_page_pairs sgl_pg_pairs;
987};
988
989struct lpfc_mbx_sge {
990 uint32_t pa_lo;
991 uint32_t pa_hi;
992 uint32_t length;
993};
994
995struct lpfc_mbx_nembed_cmd {
996 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
997#define LPFC_SLI4_MBX_SGE_MAX_PAGES 19
998 struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];
999};
1000
1001struct lpfc_mbx_nembed_sge_virt {
1002 void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];
1003};
1004
1005struct lpfc_mbx_eq_create {
1006 struct mbox_header header;
1007 union {
1008 struct {
1009 uint32_t word0;
1010#define lpfc_mbx_eq_create_num_pages_SHIFT 0
1011#define lpfc_mbx_eq_create_num_pages_MASK 0x0000FFFF
1012#define lpfc_mbx_eq_create_num_pages_WORD word0
1013 struct eq_context context;
1014 struct dma_address page[LPFC_MAX_EQ_PAGE];
1015 } request;
1016 struct {
1017 uint32_t word0;
1018#define lpfc_mbx_eq_create_q_id_SHIFT 0
1019#define lpfc_mbx_eq_create_q_id_MASK 0x0000FFFF
1020#define lpfc_mbx_eq_create_q_id_WORD word0
1021 } response;
1022 } u;
1023};
1024
James Smart173edbb2012-06-12 13:54:50 -04001025struct lpfc_mbx_modify_eq_delay {
1026 struct mbox_header header;
1027 union {
1028 struct {
1029 uint32_t num_eq;
1030 struct eq_delay_info eq[LPFC_MAX_EQ_DELAY];
1031 } request;
1032 struct {
1033 uint32_t word0;
1034 } response;
1035 } u;
1036};
1037
James Smartda0436e2009-05-22 14:51:39 -04001038struct lpfc_mbx_eq_destroy {
1039 struct mbox_header header;
1040 union {
1041 struct {
1042 uint32_t word0;
1043#define lpfc_mbx_eq_destroy_q_id_SHIFT 0
1044#define lpfc_mbx_eq_destroy_q_id_MASK 0x0000FFFF
1045#define lpfc_mbx_eq_destroy_q_id_WORD word0
1046 } request;
1047 struct {
1048 uint32_t word0;
1049 } response;
1050 } u;
1051};
1052
1053struct lpfc_mbx_nop {
1054 struct mbox_header header;
1055 uint32_t context[2];
1056};
1057
1058struct cq_context {
1059 uint32_t word0;
1060#define lpfc_cq_context_event_SHIFT 31
1061#define lpfc_cq_context_event_MASK 0x00000001
1062#define lpfc_cq_context_event_WORD word0
1063#define lpfc_cq_context_valid_SHIFT 29
1064#define lpfc_cq_context_valid_MASK 0x00000001
1065#define lpfc_cq_context_valid_WORD word0
1066#define lpfc_cq_context_count_SHIFT 27
1067#define lpfc_cq_context_count_MASK 0x00000003
1068#define lpfc_cq_context_count_WORD word0
1069#define LPFC_CQ_CNT_256 0x0
1070#define LPFC_CQ_CNT_512 0x1
1071#define LPFC_CQ_CNT_1024 0x2
1072 uint32_t word1;
James Smart5a6f1332011-03-11 16:05:35 -05001073#define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */
James Smartda0436e2009-05-22 14:51:39 -04001074#define lpfc_cq_eq_id_MASK 0x000000FF
1075#define lpfc_cq_eq_id_WORD word1
James Smart5a6f1332011-03-11 16:05:35 -05001076#define lpfc_cq_eq_id_2_SHIFT 0 /* Version 2 Only */
1077#define lpfc_cq_eq_id_2_MASK 0x0000FFFF
1078#define lpfc_cq_eq_id_2_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04001079 uint32_t reserved0;
1080 uint32_t reserved1;
1081};
1082
1083struct lpfc_mbx_cq_create {
1084 struct mbox_header header;
1085 union {
1086 struct {
1087 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001088#define lpfc_mbx_cq_create_page_size_SHIFT 16 /* Version 2 Only */
1089#define lpfc_mbx_cq_create_page_size_MASK 0x000000FF
1090#define lpfc_mbx_cq_create_page_size_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001091#define lpfc_mbx_cq_create_num_pages_SHIFT 0
1092#define lpfc_mbx_cq_create_num_pages_MASK 0x0000FFFF
1093#define lpfc_mbx_cq_create_num_pages_WORD word0
1094 struct cq_context context;
1095 struct dma_address page[LPFC_MAX_CQ_PAGE];
1096 } request;
1097 struct {
1098 uint32_t word0;
1099#define lpfc_mbx_cq_create_q_id_SHIFT 0
1100#define lpfc_mbx_cq_create_q_id_MASK 0x0000FFFF
1101#define lpfc_mbx_cq_create_q_id_WORD word0
1102 } response;
1103 } u;
1104};
1105
1106struct lpfc_mbx_cq_destroy {
1107 struct mbox_header header;
1108 union {
1109 struct {
1110 uint32_t word0;
1111#define lpfc_mbx_cq_destroy_q_id_SHIFT 0
1112#define lpfc_mbx_cq_destroy_q_id_MASK 0x0000FFFF
1113#define lpfc_mbx_cq_destroy_q_id_WORD word0
1114 } request;
1115 struct {
1116 uint32_t word0;
1117 } response;
1118 } u;
1119};
1120
1121struct wq_context {
1122 uint32_t reserved0;
1123 uint32_t reserved1;
1124 uint32_t reserved2;
1125 uint32_t reserved3;
1126};
1127
1128struct lpfc_mbx_wq_create {
1129 struct mbox_header header;
1130 union {
James Smart5a6f1332011-03-11 16:05:35 -05001131 struct { /* Version 0 Request */
James Smartda0436e2009-05-22 14:51:39 -04001132 uint32_t word0;
1133#define lpfc_mbx_wq_create_num_pages_SHIFT 0
1134#define lpfc_mbx_wq_create_num_pages_MASK 0x0000FFFF
1135#define lpfc_mbx_wq_create_num_pages_WORD word0
1136#define lpfc_mbx_wq_create_cq_id_SHIFT 16
1137#define lpfc_mbx_wq_create_cq_id_MASK 0x0000FFFF
1138#define lpfc_mbx_wq_create_cq_id_WORD word0
1139 struct dma_address page[LPFC_MAX_WQ_PAGE];
1140 } request;
James Smart5a6f1332011-03-11 16:05:35 -05001141 struct { /* Version 1 Request */
1142 uint32_t word0; /* Word 0 is the same as in v0 */
1143 uint32_t word1;
1144#define lpfc_mbx_wq_create_page_size_SHIFT 0
1145#define lpfc_mbx_wq_create_page_size_MASK 0x000000FF
1146#define lpfc_mbx_wq_create_page_size_WORD word1
1147#define lpfc_mbx_wq_create_wqe_size_SHIFT 8
1148#define lpfc_mbx_wq_create_wqe_size_MASK 0x0000000F
1149#define lpfc_mbx_wq_create_wqe_size_WORD word1
1150#define LPFC_WQ_WQE_SIZE_64 0x5
1151#define LPFC_WQ_WQE_SIZE_128 0x6
1152#define lpfc_mbx_wq_create_wqe_count_SHIFT 16
1153#define lpfc_mbx_wq_create_wqe_count_MASK 0x0000FFFF
1154#define lpfc_mbx_wq_create_wqe_count_WORD word1
1155 uint32_t word2;
1156 struct dma_address page[LPFC_MAX_WQ_PAGE-1];
1157 } request_1;
James Smartda0436e2009-05-22 14:51:39 -04001158 struct {
1159 uint32_t word0;
1160#define lpfc_mbx_wq_create_q_id_SHIFT 0
1161#define lpfc_mbx_wq_create_q_id_MASK 0x0000FFFF
1162#define lpfc_mbx_wq_create_q_id_WORD word0
1163 } response;
1164 } u;
1165};
1166
1167struct lpfc_mbx_wq_destroy {
1168 struct mbox_header header;
1169 union {
1170 struct {
1171 uint32_t word0;
1172#define lpfc_mbx_wq_destroy_q_id_SHIFT 0
1173#define lpfc_mbx_wq_destroy_q_id_MASK 0x0000FFFF
1174#define lpfc_mbx_wq_destroy_q_id_WORD word0
1175 } request;
1176 struct {
1177 uint32_t word0;
1178 } response;
1179 } u;
1180};
1181
1182#define LPFC_HDR_BUF_SIZE 128
James Smarteeead812009-12-21 17:01:23 -05001183#define LPFC_DATA_BUF_SIZE 2048
James Smartda0436e2009-05-22 14:51:39 -04001184struct rq_context {
1185 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001186#define lpfc_rq_context_rqe_count_SHIFT 16 /* Version 0 Only */
1187#define lpfc_rq_context_rqe_count_MASK 0x0000000F
1188#define lpfc_rq_context_rqe_count_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001189#define LPFC_RQ_RING_SIZE_512 9 /* 512 entries */
1190#define LPFC_RQ_RING_SIZE_1024 10 /* 1024 entries */
1191#define LPFC_RQ_RING_SIZE_2048 11 /* 2048 entries */
1192#define LPFC_RQ_RING_SIZE_4096 12 /* 4096 entries */
James Smart5a6f1332011-03-11 16:05:35 -05001193#define lpfc_rq_context_rqe_count_1_SHIFT 16 /* Version 1 Only */
1194#define lpfc_rq_context_rqe_count_1_MASK 0x0000FFFF
1195#define lpfc_rq_context_rqe_count_1_WORD word0
1196#define lpfc_rq_context_rqe_size_SHIFT 8 /* Version 1 Only */
1197#define lpfc_rq_context_rqe_size_MASK 0x0000000F
1198#define lpfc_rq_context_rqe_size_WORD word0
James Smartc31098c2011-04-16 11:03:33 -04001199#define LPFC_RQE_SIZE_8 2
1200#define LPFC_RQE_SIZE_16 3
1201#define LPFC_RQE_SIZE_32 4
1202#define LPFC_RQE_SIZE_64 5
1203#define LPFC_RQE_SIZE_128 6
James Smart5a6f1332011-03-11 16:05:35 -05001204#define lpfc_rq_context_page_size_SHIFT 0 /* Version 1 Only */
1205#define lpfc_rq_context_page_size_MASK 0x000000FF
1206#define lpfc_rq_context_page_size_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001207 uint32_t reserved1;
1208 uint32_t word2;
1209#define lpfc_rq_context_cq_id_SHIFT 16
1210#define lpfc_rq_context_cq_id_MASK 0x000003FF
1211#define lpfc_rq_context_cq_id_WORD word2
1212#define lpfc_rq_context_buf_size_SHIFT 0
1213#define lpfc_rq_context_buf_size_MASK 0x0000FFFF
1214#define lpfc_rq_context_buf_size_WORD word2
James Smart5a6f1332011-03-11 16:05:35 -05001215 uint32_t buffer_size; /* Version 1 Only */
James Smartda0436e2009-05-22 14:51:39 -04001216};
1217
1218struct lpfc_mbx_rq_create {
1219 struct mbox_header header;
1220 union {
1221 struct {
1222 uint32_t word0;
1223#define lpfc_mbx_rq_create_num_pages_SHIFT 0
1224#define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF
1225#define lpfc_mbx_rq_create_num_pages_WORD word0
1226 struct rq_context context;
1227 struct dma_address page[LPFC_MAX_WQ_PAGE];
1228 } request;
1229 struct {
1230 uint32_t word0;
1231#define lpfc_mbx_rq_create_q_id_SHIFT 0
1232#define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF
1233#define lpfc_mbx_rq_create_q_id_WORD word0
1234 } response;
1235 } u;
1236};
1237
1238struct lpfc_mbx_rq_destroy {
1239 struct mbox_header header;
1240 union {
1241 struct {
1242 uint32_t word0;
1243#define lpfc_mbx_rq_destroy_q_id_SHIFT 0
1244#define lpfc_mbx_rq_destroy_q_id_MASK 0x0000FFFF
1245#define lpfc_mbx_rq_destroy_q_id_WORD word0
1246 } request;
1247 struct {
1248 uint32_t word0;
1249 } response;
1250 } u;
1251};
1252
1253struct mq_context {
1254 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001255#define lpfc_mq_context_cq_id_SHIFT 22 /* Version 0 Only */
James Smartda0436e2009-05-22 14:51:39 -04001256#define lpfc_mq_context_cq_id_MASK 0x000003FF
1257#define lpfc_mq_context_cq_id_WORD word0
James Smart5a6f1332011-03-11 16:05:35 -05001258#define lpfc_mq_context_ring_size_SHIFT 16
1259#define lpfc_mq_context_ring_size_MASK 0x0000000F
1260#define lpfc_mq_context_ring_size_WORD word0
1261#define LPFC_MQ_RING_SIZE_16 0x5
1262#define LPFC_MQ_RING_SIZE_32 0x6
1263#define LPFC_MQ_RING_SIZE_64 0x7
1264#define LPFC_MQ_RING_SIZE_128 0x8
James Smartda0436e2009-05-22 14:51:39 -04001265 uint32_t word1;
1266#define lpfc_mq_context_valid_SHIFT 31
1267#define lpfc_mq_context_valid_MASK 0x00000001
1268#define lpfc_mq_context_valid_WORD word1
1269 uint32_t reserved2;
1270 uint32_t reserved3;
1271};
1272
1273struct lpfc_mbx_mq_create {
1274 struct mbox_header header;
1275 union {
1276 struct {
1277 uint32_t word0;
1278#define lpfc_mbx_mq_create_num_pages_SHIFT 0
1279#define lpfc_mbx_mq_create_num_pages_MASK 0x0000FFFF
1280#define lpfc_mbx_mq_create_num_pages_WORD word0
1281 struct mq_context context;
1282 struct dma_address page[LPFC_MAX_MQ_PAGE];
1283 } request;
1284 struct {
1285 uint32_t word0;
1286#define lpfc_mbx_mq_create_q_id_SHIFT 0
1287#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1288#define lpfc_mbx_mq_create_q_id_WORD word0
1289 } response;
1290 } u;
1291};
1292
James Smartb19a0612010-04-06 14:48:51 -04001293struct lpfc_mbx_mq_create_ext {
1294 struct mbox_header header;
1295 union {
1296 struct {
1297 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001298#define lpfc_mbx_mq_create_ext_num_pages_SHIFT 0
1299#define lpfc_mbx_mq_create_ext_num_pages_MASK 0x0000FFFF
1300#define lpfc_mbx_mq_create_ext_num_pages_WORD word0
1301#define lpfc_mbx_mq_create_ext_cq_id_SHIFT 16 /* Version 1 Only */
1302#define lpfc_mbx_mq_create_ext_cq_id_MASK 0x0000FFFF
1303#define lpfc_mbx_mq_create_ext_cq_id_WORD word0
James Smartb19a0612010-04-06 14:48:51 -04001304 uint32_t async_evt_bmap;
1305#define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT LPFC_TRAILER_CODE_LINK
1306#define lpfc_mbx_mq_create_ext_async_evt_link_MASK 0x00000001
1307#define lpfc_mbx_mq_create_ext_async_evt_link_WORD async_evt_bmap
James Smart70f3c072010-12-15 17:57:33 -05001308#define lpfc_mbx_mq_create_ext_async_evt_fip_SHIFT LPFC_TRAILER_CODE_FCOE
1309#define lpfc_mbx_mq_create_ext_async_evt_fip_MASK 0x00000001
1310#define lpfc_mbx_mq_create_ext_async_evt_fip_WORD async_evt_bmap
James Smartb19a0612010-04-06 14:48:51 -04001311#define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT LPFC_TRAILER_CODE_GRP5
1312#define lpfc_mbx_mq_create_ext_async_evt_group5_MASK 0x00000001
1313#define lpfc_mbx_mq_create_ext_async_evt_group5_WORD async_evt_bmap
James Smart70f3c072010-12-15 17:57:33 -05001314#define lpfc_mbx_mq_create_ext_async_evt_fc_SHIFT LPFC_TRAILER_CODE_FC
1315#define lpfc_mbx_mq_create_ext_async_evt_fc_MASK 0x00000001
1316#define lpfc_mbx_mq_create_ext_async_evt_fc_WORD async_evt_bmap
1317#define lpfc_mbx_mq_create_ext_async_evt_sli_SHIFT LPFC_TRAILER_CODE_SLI
1318#define lpfc_mbx_mq_create_ext_async_evt_sli_MASK 0x00000001
1319#define lpfc_mbx_mq_create_ext_async_evt_sli_WORD async_evt_bmap
James Smartb19a0612010-04-06 14:48:51 -04001320 struct mq_context context;
1321 struct dma_address page[LPFC_MAX_MQ_PAGE];
1322 } request;
1323 struct {
1324 uint32_t word0;
1325#define lpfc_mbx_mq_create_q_id_SHIFT 0
1326#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1327#define lpfc_mbx_mq_create_q_id_WORD word0
1328 } response;
1329 } u;
1330#define LPFC_ASYNC_EVENT_LINK_STATE 0x2
1331#define LPFC_ASYNC_EVENT_FCF_STATE 0x4
1332#define LPFC_ASYNC_EVENT_GROUP5 0x20
1333};
1334
James Smartda0436e2009-05-22 14:51:39 -04001335struct lpfc_mbx_mq_destroy {
1336 struct mbox_header header;
1337 union {
1338 struct {
1339 uint32_t word0;
1340#define lpfc_mbx_mq_destroy_q_id_SHIFT 0
1341#define lpfc_mbx_mq_destroy_q_id_MASK 0x0000FFFF
1342#define lpfc_mbx_mq_destroy_q_id_WORD word0
1343 } request;
1344 struct {
1345 uint32_t word0;
1346 } response;
1347 } u;
1348};
1349
James Smart6d368e52011-05-24 11:44:12 -04001350/* Start Gen 2 SLI4 Mailbox definitions: */
1351
1352/* Define allocate-ready Gen 2 SLI4 FCoE Resource Extent Types. */
1353#define LPFC_RSC_TYPE_FCOE_VFI 0x20
1354#define LPFC_RSC_TYPE_FCOE_VPI 0x21
1355#define LPFC_RSC_TYPE_FCOE_RPI 0x22
1356#define LPFC_RSC_TYPE_FCOE_XRI 0x23
1357
1358struct lpfc_mbx_get_rsrc_extent_info {
1359 struct mbox_header header;
1360 union {
1361 struct {
1362 uint32_t word4;
1363#define lpfc_mbx_get_rsrc_extent_info_type_SHIFT 0
1364#define lpfc_mbx_get_rsrc_extent_info_type_MASK 0x0000FFFF
1365#define lpfc_mbx_get_rsrc_extent_info_type_WORD word4
1366 } req;
1367 struct {
1368 uint32_t word4;
1369#define lpfc_mbx_get_rsrc_extent_info_cnt_SHIFT 0
1370#define lpfc_mbx_get_rsrc_extent_info_cnt_MASK 0x0000FFFF
1371#define lpfc_mbx_get_rsrc_extent_info_cnt_WORD word4
1372#define lpfc_mbx_get_rsrc_extent_info_size_SHIFT 16
1373#define lpfc_mbx_get_rsrc_extent_info_size_MASK 0x0000FFFF
1374#define lpfc_mbx_get_rsrc_extent_info_size_WORD word4
1375 } rsp;
1376 } u;
1377};
1378
1379struct lpfc_id_range {
1380 uint32_t word5;
1381#define lpfc_mbx_rsrc_id_word4_0_SHIFT 0
1382#define lpfc_mbx_rsrc_id_word4_0_MASK 0x0000FFFF
1383#define lpfc_mbx_rsrc_id_word4_0_WORD word5
1384#define lpfc_mbx_rsrc_id_word4_1_SHIFT 16
1385#define lpfc_mbx_rsrc_id_word4_1_MASK 0x0000FFFF
1386#define lpfc_mbx_rsrc_id_word4_1_WORD word5
1387};
1388
James Smart7ad20aa2011-05-24 11:44:28 -04001389struct lpfc_mbx_set_link_diag_state {
1390 struct mbox_header header;
1391 union {
1392 struct {
1393 uint32_t word0;
1394#define lpfc_mbx_set_diag_state_diag_SHIFT 0
1395#define lpfc_mbx_set_diag_state_diag_MASK 0x00000001
1396#define lpfc_mbx_set_diag_state_diag_WORD word0
James Smart97315922012-08-03 12:32:52 -04001397#define lpfc_mbx_set_diag_state_diag_bit_valid_SHIFT 2
1398#define lpfc_mbx_set_diag_state_diag_bit_valid_MASK 0x00000001
1399#define lpfc_mbx_set_diag_state_diag_bit_valid_WORD word0
1400#define LPFC_DIAG_STATE_DIAG_BIT_VALID_NO_CHANGE 0
1401#define LPFC_DIAG_STATE_DIAG_BIT_VALID_CHANGE 1
James Smart7ad20aa2011-05-24 11:44:28 -04001402#define lpfc_mbx_set_diag_state_link_num_SHIFT 16
1403#define lpfc_mbx_set_diag_state_link_num_MASK 0x0000003F
1404#define lpfc_mbx_set_diag_state_link_num_WORD word0
1405#define lpfc_mbx_set_diag_state_link_type_SHIFT 22
1406#define lpfc_mbx_set_diag_state_link_type_MASK 0x00000003
1407#define lpfc_mbx_set_diag_state_link_type_WORD word0
1408 } req;
1409 struct {
1410 uint32_t word0;
1411 } rsp;
1412 } u;
1413};
1414
1415struct lpfc_mbx_set_link_diag_loopback {
1416 struct mbox_header header;
1417 union {
1418 struct {
1419 uint32_t word0;
1420#define lpfc_mbx_set_diag_lpbk_type_SHIFT 0
James Smart1b511972011-12-13 13:23:09 -05001421#define lpfc_mbx_set_diag_lpbk_type_MASK 0x00000003
James Smart7ad20aa2011-05-24 11:44:28 -04001422#define lpfc_mbx_set_diag_lpbk_type_WORD word0
1423#define LPFC_DIAG_LOOPBACK_TYPE_DISABLE 0x0
1424#define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL 0x1
James Smart1b511972011-12-13 13:23:09 -05001425#define LPFC_DIAG_LOOPBACK_TYPE_SERDES 0x2
James Smart7ad20aa2011-05-24 11:44:28 -04001426#define lpfc_mbx_set_diag_lpbk_link_num_SHIFT 16
1427#define lpfc_mbx_set_diag_lpbk_link_num_MASK 0x0000003F
1428#define lpfc_mbx_set_diag_lpbk_link_num_WORD word0
1429#define lpfc_mbx_set_diag_lpbk_link_type_SHIFT 22
1430#define lpfc_mbx_set_diag_lpbk_link_type_MASK 0x00000003
1431#define lpfc_mbx_set_diag_lpbk_link_type_WORD word0
1432 } req;
1433 struct {
1434 uint32_t word0;
1435 } rsp;
1436 } u;
1437};
1438
1439struct lpfc_mbx_run_link_diag_test {
1440 struct mbox_header header;
1441 union {
1442 struct {
1443 uint32_t word0;
1444#define lpfc_mbx_run_diag_test_link_num_SHIFT 16
1445#define lpfc_mbx_run_diag_test_link_num_MASK 0x0000003F
1446#define lpfc_mbx_run_diag_test_link_num_WORD word0
1447#define lpfc_mbx_run_diag_test_link_type_SHIFT 22
1448#define lpfc_mbx_run_diag_test_link_type_MASK 0x00000003
1449#define lpfc_mbx_run_diag_test_link_type_WORD word0
1450 uint32_t word1;
1451#define lpfc_mbx_run_diag_test_test_id_SHIFT 0
1452#define lpfc_mbx_run_diag_test_test_id_MASK 0x0000FFFF
1453#define lpfc_mbx_run_diag_test_test_id_WORD word1
1454#define lpfc_mbx_run_diag_test_loops_SHIFT 16
1455#define lpfc_mbx_run_diag_test_loops_MASK 0x0000FFFF
1456#define lpfc_mbx_run_diag_test_loops_WORD word1
1457 uint32_t word2;
1458#define lpfc_mbx_run_diag_test_test_ver_SHIFT 0
1459#define lpfc_mbx_run_diag_test_test_ver_MASK 0x0000FFFF
1460#define lpfc_mbx_run_diag_test_test_ver_WORD word2
1461#define lpfc_mbx_run_diag_test_err_act_SHIFT 16
1462#define lpfc_mbx_run_diag_test_err_act_MASK 0x000000FF
1463#define lpfc_mbx_run_diag_test_err_act_WORD word2
1464 } req;
1465 struct {
1466 uint32_t word0;
1467 } rsp;
1468 } u;
1469};
1470
James Smart6d368e52011-05-24 11:44:12 -04001471/*
1472 * struct lpfc_mbx_alloc_rsrc_extents:
1473 * A mbox is generically 256 bytes long. An SLI4_CONFIG mailbox requires
1474 * 6 words of header + 4 words of shared subcommand header +
1475 * 1 words of Extent-Opcode-specific header = 11 words or 44 bytes total.
1476 *
1477 * An embedded version of SLI4_CONFIG therefore has 256 - 44 = 212 bytes
1478 * for extents payload.
1479 *
1480 * 212/2 (bytes per extent) = 106 extents.
1481 * 106/2 (extents per word) = 53 words.
1482 * lpfc_id_range id is statically size to 53.
1483 *
1484 * This mailbox definition is used for ALLOC or GET_ALLOCATED
1485 * extent ranges. For ALLOC, the type and cnt are required.
1486 * For GET_ALLOCATED, only the type is required.
1487 */
1488struct lpfc_mbx_alloc_rsrc_extents {
1489 struct mbox_header header;
1490 union {
1491 struct {
1492 uint32_t word4;
1493#define lpfc_mbx_alloc_rsrc_extents_type_SHIFT 0
1494#define lpfc_mbx_alloc_rsrc_extents_type_MASK 0x0000FFFF
1495#define lpfc_mbx_alloc_rsrc_extents_type_WORD word4
1496#define lpfc_mbx_alloc_rsrc_extents_cnt_SHIFT 16
1497#define lpfc_mbx_alloc_rsrc_extents_cnt_MASK 0x0000FFFF
1498#define lpfc_mbx_alloc_rsrc_extents_cnt_WORD word4
1499 } req;
1500 struct {
1501 uint32_t word4;
1502#define lpfc_mbx_rsrc_cnt_SHIFT 0
1503#define lpfc_mbx_rsrc_cnt_MASK 0x0000FFFF
1504#define lpfc_mbx_rsrc_cnt_WORD word4
1505 struct lpfc_id_range id[53];
1506 } rsp;
1507 } u;
1508};
1509
1510/*
1511 * This is the non-embedded version of ALLOC or GET RSRC_EXTENTS. Word4 in this
1512 * structure shares the same SHIFT/MASK/WORD defines provided in the
1513 * mbx_alloc_rsrc_extents and mbx_get_alloc_rsrc_extents, word4, provided in
1514 * the structures defined above. This non-embedded structure provides for the
1515 * maximum number of extents supported by the port.
1516 */
1517struct lpfc_mbx_nembed_rsrc_extent {
1518 union lpfc_sli4_cfg_shdr cfg_shdr;
1519 uint32_t word4;
1520 struct lpfc_id_range id;
1521};
1522
1523struct lpfc_mbx_dealloc_rsrc_extents {
1524 struct mbox_header header;
1525 struct {
1526 uint32_t word4;
1527#define lpfc_mbx_dealloc_rsrc_extents_type_SHIFT 0
1528#define lpfc_mbx_dealloc_rsrc_extents_type_MASK 0x0000FFFF
1529#define lpfc_mbx_dealloc_rsrc_extents_type_WORD word4
1530 } req;
1531
1532};
1533
1534/* Start SLI4 FCoE specific mbox structures. */
1535
James Smartda0436e2009-05-22 14:51:39 -04001536struct lpfc_mbx_post_hdr_tmpl {
1537 struct mbox_header header;
1538 uint32_t word10;
1539#define lpfc_mbx_post_hdr_tmpl_rpi_offset_SHIFT 0
1540#define lpfc_mbx_post_hdr_tmpl_rpi_offset_MASK 0x0000FFFF
1541#define lpfc_mbx_post_hdr_tmpl_rpi_offset_WORD word10
1542#define lpfc_mbx_post_hdr_tmpl_page_cnt_SHIFT 16
1543#define lpfc_mbx_post_hdr_tmpl_page_cnt_MASK 0x0000FFFF
1544#define lpfc_mbx_post_hdr_tmpl_page_cnt_WORD word10
1545 uint32_t rpi_paddr_lo;
1546 uint32_t rpi_paddr_hi;
1547};
1548
1549struct sli4_sge { /* SLI-4 */
1550 uint32_t addr_hi;
1551 uint32_t addr_lo;
1552
1553 uint32_t word2;
James Smartf9bb2da2011-10-10 21:34:11 -04001554#define lpfc_sli4_sge_offset_SHIFT 0
1555#define lpfc_sli4_sge_offset_MASK 0x07FFFFFF
James Smartda0436e2009-05-22 14:51:39 -04001556#define lpfc_sli4_sge_offset_WORD word2
James Smartf9bb2da2011-10-10 21:34:11 -04001557#define lpfc_sli4_sge_type_SHIFT 27
1558#define lpfc_sli4_sge_type_MASK 0x0000000F
1559#define lpfc_sli4_sge_type_WORD word2
1560#define LPFC_SGE_TYPE_DATA 0x0
1561#define LPFC_SGE_TYPE_DIF 0x4
1562#define LPFC_SGE_TYPE_LSP 0x5
1563#define LPFC_SGE_TYPE_PEDIF 0x6
1564#define LPFC_SGE_TYPE_PESEED 0x7
1565#define LPFC_SGE_TYPE_DISEED 0x8
1566#define LPFC_SGE_TYPE_ENC 0x9
1567#define LPFC_SGE_TYPE_ATM 0xA
1568#define LPFC_SGE_TYPE_SKIP 0xC
1569#define lpfc_sli4_sge_last_SHIFT 31 /* Last SEG in the SGL sets it */
James Smartda0436e2009-05-22 14:51:39 -04001570#define lpfc_sli4_sge_last_MASK 0x00000001
1571#define lpfc_sli4_sge_last_WORD word2
James Smart28baac72010-02-12 14:42:03 -05001572 uint32_t sge_len;
James Smartda0436e2009-05-22 14:51:39 -04001573};
1574
James Smartf9bb2da2011-10-10 21:34:11 -04001575struct sli4_sge_diseed { /* SLI-4 */
1576 uint32_t ref_tag;
1577 uint32_t ref_tag_tran;
1578
1579 uint32_t word2;
1580#define lpfc_sli4_sge_dif_apptran_SHIFT 0
1581#define lpfc_sli4_sge_dif_apptran_MASK 0x0000FFFF
1582#define lpfc_sli4_sge_dif_apptran_WORD word2
1583#define lpfc_sli4_sge_dif_af_SHIFT 24
1584#define lpfc_sli4_sge_dif_af_MASK 0x00000001
1585#define lpfc_sli4_sge_dif_af_WORD word2
1586#define lpfc_sli4_sge_dif_na_SHIFT 25
1587#define lpfc_sli4_sge_dif_na_MASK 0x00000001
1588#define lpfc_sli4_sge_dif_na_WORD word2
1589#define lpfc_sli4_sge_dif_hi_SHIFT 26
1590#define lpfc_sli4_sge_dif_hi_MASK 0x00000001
1591#define lpfc_sli4_sge_dif_hi_WORD word2
1592#define lpfc_sli4_sge_dif_type_SHIFT 27
1593#define lpfc_sli4_sge_dif_type_MASK 0x0000000F
1594#define lpfc_sli4_sge_dif_type_WORD word2
1595#define lpfc_sli4_sge_dif_last_SHIFT 31 /* Last SEG in the SGL sets it */
1596#define lpfc_sli4_sge_dif_last_MASK 0x00000001
1597#define lpfc_sli4_sge_dif_last_WORD word2
1598 uint32_t word3;
1599#define lpfc_sli4_sge_dif_apptag_SHIFT 0
1600#define lpfc_sli4_sge_dif_apptag_MASK 0x0000FFFF
1601#define lpfc_sli4_sge_dif_apptag_WORD word3
1602#define lpfc_sli4_sge_dif_bs_SHIFT 16
1603#define lpfc_sli4_sge_dif_bs_MASK 0x00000007
1604#define lpfc_sli4_sge_dif_bs_WORD word3
1605#define lpfc_sli4_sge_dif_ai_SHIFT 19
1606#define lpfc_sli4_sge_dif_ai_MASK 0x00000001
1607#define lpfc_sli4_sge_dif_ai_WORD word3
1608#define lpfc_sli4_sge_dif_me_SHIFT 20
1609#define lpfc_sli4_sge_dif_me_MASK 0x00000001
1610#define lpfc_sli4_sge_dif_me_WORD word3
1611#define lpfc_sli4_sge_dif_re_SHIFT 21
1612#define lpfc_sli4_sge_dif_re_MASK 0x00000001
1613#define lpfc_sli4_sge_dif_re_WORD word3
1614#define lpfc_sli4_sge_dif_ce_SHIFT 22
1615#define lpfc_sli4_sge_dif_ce_MASK 0x00000001
1616#define lpfc_sli4_sge_dif_ce_WORD word3
1617#define lpfc_sli4_sge_dif_nr_SHIFT 23
1618#define lpfc_sli4_sge_dif_nr_MASK 0x00000001
1619#define lpfc_sli4_sge_dif_nr_WORD word3
1620#define lpfc_sli4_sge_dif_oprx_SHIFT 24
1621#define lpfc_sli4_sge_dif_oprx_MASK 0x0000000F
1622#define lpfc_sli4_sge_dif_oprx_WORD word3
1623#define lpfc_sli4_sge_dif_optx_SHIFT 28
1624#define lpfc_sli4_sge_dif_optx_MASK 0x0000000F
1625#define lpfc_sli4_sge_dif_optx_WORD word3
1626/* optx and oprx use BG_OP_IN defines in lpfc_hw.h */
1627};
1628
James Smartda0436e2009-05-22 14:51:39 -04001629struct fcf_record {
1630 uint32_t max_rcv_size;
1631 uint32_t fka_adv_period;
1632 uint32_t fip_priority;
1633 uint32_t word3;
1634#define lpfc_fcf_record_mac_0_SHIFT 0
1635#define lpfc_fcf_record_mac_0_MASK 0x000000FF
1636#define lpfc_fcf_record_mac_0_WORD word3
1637#define lpfc_fcf_record_mac_1_SHIFT 8
1638#define lpfc_fcf_record_mac_1_MASK 0x000000FF
1639#define lpfc_fcf_record_mac_1_WORD word3
1640#define lpfc_fcf_record_mac_2_SHIFT 16
1641#define lpfc_fcf_record_mac_2_MASK 0x000000FF
1642#define lpfc_fcf_record_mac_2_WORD word3
1643#define lpfc_fcf_record_mac_3_SHIFT 24
1644#define lpfc_fcf_record_mac_3_MASK 0x000000FF
1645#define lpfc_fcf_record_mac_3_WORD word3
1646 uint32_t word4;
1647#define lpfc_fcf_record_mac_4_SHIFT 0
1648#define lpfc_fcf_record_mac_4_MASK 0x000000FF
1649#define lpfc_fcf_record_mac_4_WORD word4
1650#define lpfc_fcf_record_mac_5_SHIFT 8
1651#define lpfc_fcf_record_mac_5_MASK 0x000000FF
1652#define lpfc_fcf_record_mac_5_WORD word4
1653#define lpfc_fcf_record_fcf_avail_SHIFT 16
1654#define lpfc_fcf_record_fcf_avail_MASK 0x000000FF
James Smart0c287582009-06-10 17:22:56 -04001655#define lpfc_fcf_record_fcf_avail_WORD word4
James Smartda0436e2009-05-22 14:51:39 -04001656#define lpfc_fcf_record_mac_addr_prov_SHIFT 24
1657#define lpfc_fcf_record_mac_addr_prov_MASK 0x000000FF
1658#define lpfc_fcf_record_mac_addr_prov_WORD word4
1659#define LPFC_FCF_FPMA 1 /* Fabric Provided MAC Address */
1660#define LPFC_FCF_SPMA 2 /* Server Provided MAC Address */
1661 uint32_t word5;
1662#define lpfc_fcf_record_fab_name_0_SHIFT 0
1663#define lpfc_fcf_record_fab_name_0_MASK 0x000000FF
1664#define lpfc_fcf_record_fab_name_0_WORD word5
1665#define lpfc_fcf_record_fab_name_1_SHIFT 8
1666#define lpfc_fcf_record_fab_name_1_MASK 0x000000FF
1667#define lpfc_fcf_record_fab_name_1_WORD word5
1668#define lpfc_fcf_record_fab_name_2_SHIFT 16
1669#define lpfc_fcf_record_fab_name_2_MASK 0x000000FF
1670#define lpfc_fcf_record_fab_name_2_WORD word5
1671#define lpfc_fcf_record_fab_name_3_SHIFT 24
1672#define lpfc_fcf_record_fab_name_3_MASK 0x000000FF
1673#define lpfc_fcf_record_fab_name_3_WORD word5
1674 uint32_t word6;
1675#define lpfc_fcf_record_fab_name_4_SHIFT 0
1676#define lpfc_fcf_record_fab_name_4_MASK 0x000000FF
1677#define lpfc_fcf_record_fab_name_4_WORD word6
1678#define lpfc_fcf_record_fab_name_5_SHIFT 8
1679#define lpfc_fcf_record_fab_name_5_MASK 0x000000FF
1680#define lpfc_fcf_record_fab_name_5_WORD word6
1681#define lpfc_fcf_record_fab_name_6_SHIFT 16
1682#define lpfc_fcf_record_fab_name_6_MASK 0x000000FF
1683#define lpfc_fcf_record_fab_name_6_WORD word6
1684#define lpfc_fcf_record_fab_name_7_SHIFT 24
1685#define lpfc_fcf_record_fab_name_7_MASK 0x000000FF
1686#define lpfc_fcf_record_fab_name_7_WORD word6
1687 uint32_t word7;
1688#define lpfc_fcf_record_fc_map_0_SHIFT 0
1689#define lpfc_fcf_record_fc_map_0_MASK 0x000000FF
1690#define lpfc_fcf_record_fc_map_0_WORD word7
1691#define lpfc_fcf_record_fc_map_1_SHIFT 8
1692#define lpfc_fcf_record_fc_map_1_MASK 0x000000FF
1693#define lpfc_fcf_record_fc_map_1_WORD word7
1694#define lpfc_fcf_record_fc_map_2_SHIFT 16
1695#define lpfc_fcf_record_fc_map_2_MASK 0x000000FF
1696#define lpfc_fcf_record_fc_map_2_WORD word7
1697#define lpfc_fcf_record_fcf_valid_SHIFT 24
James Smart26979ce2012-09-29 11:31:55 -04001698#define lpfc_fcf_record_fcf_valid_MASK 0x00000001
James Smartda0436e2009-05-22 14:51:39 -04001699#define lpfc_fcf_record_fcf_valid_WORD word7
James Smart26979ce2012-09-29 11:31:55 -04001700#define lpfc_fcf_record_fcf_fc_SHIFT 25
1701#define lpfc_fcf_record_fcf_fc_MASK 0x00000001
1702#define lpfc_fcf_record_fcf_fc_WORD word7
1703#define lpfc_fcf_record_fcf_sol_SHIFT 31
1704#define lpfc_fcf_record_fcf_sol_MASK 0x00000001
1705#define lpfc_fcf_record_fcf_sol_WORD word7
James Smartda0436e2009-05-22 14:51:39 -04001706 uint32_t word8;
1707#define lpfc_fcf_record_fcf_index_SHIFT 0
1708#define lpfc_fcf_record_fcf_index_MASK 0x0000FFFF
1709#define lpfc_fcf_record_fcf_index_WORD word8
1710#define lpfc_fcf_record_fcf_state_SHIFT 16
1711#define lpfc_fcf_record_fcf_state_MASK 0x0000FFFF
1712#define lpfc_fcf_record_fcf_state_WORD word8
1713 uint8_t vlan_bitmap[512];
James Smart8fa38512009-07-19 10:01:03 -04001714 uint32_t word137;
1715#define lpfc_fcf_record_switch_name_0_SHIFT 0
1716#define lpfc_fcf_record_switch_name_0_MASK 0x000000FF
1717#define lpfc_fcf_record_switch_name_0_WORD word137
1718#define lpfc_fcf_record_switch_name_1_SHIFT 8
1719#define lpfc_fcf_record_switch_name_1_MASK 0x000000FF
1720#define lpfc_fcf_record_switch_name_1_WORD word137
1721#define lpfc_fcf_record_switch_name_2_SHIFT 16
1722#define lpfc_fcf_record_switch_name_2_MASK 0x000000FF
1723#define lpfc_fcf_record_switch_name_2_WORD word137
1724#define lpfc_fcf_record_switch_name_3_SHIFT 24
1725#define lpfc_fcf_record_switch_name_3_MASK 0x000000FF
1726#define lpfc_fcf_record_switch_name_3_WORD word137
1727 uint32_t word138;
1728#define lpfc_fcf_record_switch_name_4_SHIFT 0
1729#define lpfc_fcf_record_switch_name_4_MASK 0x000000FF
1730#define lpfc_fcf_record_switch_name_4_WORD word138
1731#define lpfc_fcf_record_switch_name_5_SHIFT 8
1732#define lpfc_fcf_record_switch_name_5_MASK 0x000000FF
1733#define lpfc_fcf_record_switch_name_5_WORD word138
1734#define lpfc_fcf_record_switch_name_6_SHIFT 16
1735#define lpfc_fcf_record_switch_name_6_MASK 0x000000FF
1736#define lpfc_fcf_record_switch_name_6_WORD word138
1737#define lpfc_fcf_record_switch_name_7_SHIFT 24
1738#define lpfc_fcf_record_switch_name_7_MASK 0x000000FF
1739#define lpfc_fcf_record_switch_name_7_WORD word138
James Smartda0436e2009-05-22 14:51:39 -04001740};
1741
1742struct lpfc_mbx_read_fcf_tbl {
1743 union lpfc_sli4_cfg_shdr cfg_shdr;
1744 union {
1745 struct {
1746 uint32_t word10;
1747#define lpfc_mbx_read_fcf_tbl_indx_SHIFT 0
1748#define lpfc_mbx_read_fcf_tbl_indx_MASK 0x0000FFFF
1749#define lpfc_mbx_read_fcf_tbl_indx_WORD word10
1750 } request;
1751 struct {
1752 uint32_t eventag;
1753 } response;
1754 } u;
1755 uint32_t word11;
1756#define lpfc_mbx_read_fcf_tbl_nxt_vindx_SHIFT 0
1757#define lpfc_mbx_read_fcf_tbl_nxt_vindx_MASK 0x0000FFFF
1758#define lpfc_mbx_read_fcf_tbl_nxt_vindx_WORD word11
1759};
1760
1761struct lpfc_mbx_add_fcf_tbl_entry {
1762 union lpfc_sli4_cfg_shdr cfg_shdr;
1763 uint32_t word10;
1764#define lpfc_mbx_add_fcf_tbl_fcfi_SHIFT 0
1765#define lpfc_mbx_add_fcf_tbl_fcfi_MASK 0x0000FFFF
1766#define lpfc_mbx_add_fcf_tbl_fcfi_WORD word10
1767 struct lpfc_mbx_sge fcf_sge;
1768};
1769
1770struct lpfc_mbx_del_fcf_tbl_entry {
1771 struct mbox_header header;
1772 uint32_t word10;
1773#define lpfc_mbx_del_fcf_tbl_count_SHIFT 0
1774#define lpfc_mbx_del_fcf_tbl_count_MASK 0x0000FFFF
1775#define lpfc_mbx_del_fcf_tbl_count_WORD word10
1776#define lpfc_mbx_del_fcf_tbl_index_SHIFT 16
1777#define lpfc_mbx_del_fcf_tbl_index_MASK 0x0000FFFF
1778#define lpfc_mbx_del_fcf_tbl_index_WORD word10
1779};
1780
James Smartecfd03c2010-02-12 14:41:27 -05001781struct lpfc_mbx_redisc_fcf_tbl {
1782 struct mbox_header header;
1783 uint32_t word10;
1784#define lpfc_mbx_redisc_fcf_count_SHIFT 0
1785#define lpfc_mbx_redisc_fcf_count_MASK 0x0000FFFF
1786#define lpfc_mbx_redisc_fcf_count_WORD word10
1787 uint32_t resvd;
1788 uint32_t word12;
1789#define lpfc_mbx_redisc_fcf_index_SHIFT 0
1790#define lpfc_mbx_redisc_fcf_index_MASK 0x0000FFFF
1791#define lpfc_mbx_redisc_fcf_index_WORD word12
1792};
1793
James Smart6669f9b2009-10-02 15:16:45 -04001794struct lpfc_mbx_query_fw_cfg {
1795 struct mbox_header header;
1796 uint32_t config_number;
1797 uint32_t asic_rev;
1798 uint32_t phys_port;
1799 uint32_t function_mode;
1800/* firmware Function Mode */
1801#define lpfc_function_mode_toe_SHIFT 0
1802#define lpfc_function_mode_toe_MASK 0x00000001
1803#define lpfc_function_mode_toe_WORD function_mode
1804#define lpfc_function_mode_nic_SHIFT 1
1805#define lpfc_function_mode_nic_MASK 0x00000001
1806#define lpfc_function_mode_nic_WORD function_mode
1807#define lpfc_function_mode_rdma_SHIFT 2
1808#define lpfc_function_mode_rdma_MASK 0x00000001
1809#define lpfc_function_mode_rdma_WORD function_mode
1810#define lpfc_function_mode_vm_SHIFT 3
1811#define lpfc_function_mode_vm_MASK 0x00000001
1812#define lpfc_function_mode_vm_WORD function_mode
1813#define lpfc_function_mode_iscsi_i_SHIFT 4
1814#define lpfc_function_mode_iscsi_i_MASK 0x00000001
1815#define lpfc_function_mode_iscsi_i_WORD function_mode
1816#define lpfc_function_mode_iscsi_t_SHIFT 5
1817#define lpfc_function_mode_iscsi_t_MASK 0x00000001
1818#define lpfc_function_mode_iscsi_t_WORD function_mode
1819#define lpfc_function_mode_fcoe_i_SHIFT 6
1820#define lpfc_function_mode_fcoe_i_MASK 0x00000001
1821#define lpfc_function_mode_fcoe_i_WORD function_mode
1822#define lpfc_function_mode_fcoe_t_SHIFT 7
1823#define lpfc_function_mode_fcoe_t_MASK 0x00000001
1824#define lpfc_function_mode_fcoe_t_WORD function_mode
1825#define lpfc_function_mode_dal_SHIFT 8
1826#define lpfc_function_mode_dal_MASK 0x00000001
1827#define lpfc_function_mode_dal_WORD function_mode
1828#define lpfc_function_mode_lro_SHIFT 9
1829#define lpfc_function_mode_lro_MASK 0x00000001
James Smart70f3c072010-12-15 17:57:33 -05001830#define lpfc_function_mode_lro_WORD function_mode
James Smart6669f9b2009-10-02 15:16:45 -04001831#define lpfc_function_mode_flex10_SHIFT 10
1832#define lpfc_function_mode_flex10_MASK 0x00000001
1833#define lpfc_function_mode_flex10_WORD function_mode
1834#define lpfc_function_mode_ncsi_SHIFT 11
1835#define lpfc_function_mode_ncsi_MASK 0x00000001
1836#define lpfc_function_mode_ncsi_WORD function_mode
1837};
1838
James Smartda0436e2009-05-22 14:51:39 -04001839/* Status field for embedded SLI_CONFIG mailbox command */
1840#define STATUS_SUCCESS 0x0
1841#define STATUS_FAILED 0x1
1842#define STATUS_ILLEGAL_REQUEST 0x2
1843#define STATUS_ILLEGAL_FIELD 0x3
1844#define STATUS_INSUFFICIENT_BUFFER 0x4
1845#define STATUS_UNAUTHORIZED_REQUEST 0x5
1846#define STATUS_FLASHROM_SAVE_FAILED 0x17
1847#define STATUS_FLASHROM_RESTORE_FAILED 0x18
1848#define STATUS_ICCBINDEX_ALLOC_FAILED 0x1a
1849#define STATUS_IOCTLHANDLE_ALLOC_FAILED 0x1b
1850#define STATUS_INVALID_PHY_ADDR_FROM_OSM 0x1c
1851#define STATUS_INVALID_PHY_ADDR_LEN_FROM_OSM 0x1d
1852#define STATUS_ASSERT_FAILED 0x1e
1853#define STATUS_INVALID_SESSION 0x1f
1854#define STATUS_INVALID_CONNECTION 0x20
1855#define STATUS_BTL_PATH_EXCEEDS_OSM_LIMIT 0x21
1856#define STATUS_BTL_NO_FREE_SLOT_PATH 0x24
1857#define STATUS_BTL_NO_FREE_SLOT_TGTID 0x25
1858#define STATUS_OSM_DEVSLOT_NOT_FOUND 0x26
1859#define STATUS_FLASHROM_READ_FAILED 0x27
1860#define STATUS_POLL_IOCTL_TIMEOUT 0x28
1861#define STATUS_ERROR_ACITMAIN 0x2a
1862#define STATUS_REBOOT_REQUIRED 0x2c
1863#define STATUS_FCF_IN_USE 0x3a
James Smartdef9c7a2009-12-21 17:02:28 -05001864#define STATUS_FCF_TABLE_EMPTY 0x43
James Smartda0436e2009-05-22 14:51:39 -04001865
1866struct lpfc_mbx_sli4_config {
1867 struct mbox_header header;
1868};
1869
1870struct lpfc_mbx_init_vfi {
1871 uint32_t word1;
1872#define lpfc_init_vfi_vr_SHIFT 31
1873#define lpfc_init_vfi_vr_MASK 0x00000001
1874#define lpfc_init_vfi_vr_WORD word1
1875#define lpfc_init_vfi_vt_SHIFT 30
1876#define lpfc_init_vfi_vt_MASK 0x00000001
1877#define lpfc_init_vfi_vt_WORD word1
1878#define lpfc_init_vfi_vf_SHIFT 29
1879#define lpfc_init_vfi_vf_MASK 0x00000001
1880#define lpfc_init_vfi_vf_WORD word1
James Smart76a95d72010-11-20 23:11:48 -05001881#define lpfc_init_vfi_vp_SHIFT 28
1882#define lpfc_init_vfi_vp_MASK 0x00000001
1883#define lpfc_init_vfi_vp_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04001884#define lpfc_init_vfi_vfi_SHIFT 0
1885#define lpfc_init_vfi_vfi_MASK 0x0000FFFF
1886#define lpfc_init_vfi_vfi_WORD word1
1887 uint32_t word2;
James Smart76a95d72010-11-20 23:11:48 -05001888#define lpfc_init_vfi_vpi_SHIFT 16
1889#define lpfc_init_vfi_vpi_MASK 0x0000FFFF
1890#define lpfc_init_vfi_vpi_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04001891#define lpfc_init_vfi_fcfi_SHIFT 0
1892#define lpfc_init_vfi_fcfi_MASK 0x0000FFFF
1893#define lpfc_init_vfi_fcfi_WORD word2
1894 uint32_t word3;
1895#define lpfc_init_vfi_pri_SHIFT 13
1896#define lpfc_init_vfi_pri_MASK 0x00000007
1897#define lpfc_init_vfi_pri_WORD word3
1898#define lpfc_init_vfi_vf_id_SHIFT 1
1899#define lpfc_init_vfi_vf_id_MASK 0x00000FFF
1900#define lpfc_init_vfi_vf_id_WORD word3
1901 uint32_t word4;
1902#define lpfc_init_vfi_hop_count_SHIFT 24
1903#define lpfc_init_vfi_hop_count_MASK 0x000000FF
1904#define lpfc_init_vfi_hop_count_WORD word4
1905};
James Smartdf9e1b52011-12-13 13:22:17 -05001906#define MBX_VFI_IN_USE 0x9F02
1907
James Smartda0436e2009-05-22 14:51:39 -04001908
1909struct lpfc_mbx_reg_vfi {
1910 uint32_t word1;
1911#define lpfc_reg_vfi_vp_SHIFT 28
1912#define lpfc_reg_vfi_vp_MASK 0x00000001
1913#define lpfc_reg_vfi_vp_WORD word1
1914#define lpfc_reg_vfi_vfi_SHIFT 0
1915#define lpfc_reg_vfi_vfi_MASK 0x0000FFFF
1916#define lpfc_reg_vfi_vfi_WORD word1
1917 uint32_t word2;
1918#define lpfc_reg_vfi_vpi_SHIFT 16
1919#define lpfc_reg_vfi_vpi_MASK 0x0000FFFF
1920#define lpfc_reg_vfi_vpi_WORD word2
1921#define lpfc_reg_vfi_fcfi_SHIFT 0
1922#define lpfc_reg_vfi_fcfi_MASK 0x0000FFFF
1923#define lpfc_reg_vfi_fcfi_WORD word2
James Smartc8685952009-11-18 15:39:16 -05001924 uint32_t wwn[2];
James Smartda0436e2009-05-22 14:51:39 -04001925 struct ulp_bde64 bde;
James Smartb19a0612010-04-06 14:48:51 -04001926 uint32_t e_d_tov;
1927 uint32_t r_a_tov;
James Smartda0436e2009-05-22 14:51:39 -04001928 uint32_t word10;
1929#define lpfc_reg_vfi_nport_id_SHIFT 0
1930#define lpfc_reg_vfi_nport_id_MASK 0x00FFFFFF
1931#define lpfc_reg_vfi_nport_id_WORD word10
1932};
1933
1934struct lpfc_mbx_init_vpi {
1935 uint32_t word1;
1936#define lpfc_init_vpi_vfi_SHIFT 16
1937#define lpfc_init_vpi_vfi_MASK 0x0000FFFF
1938#define lpfc_init_vpi_vfi_WORD word1
1939#define lpfc_init_vpi_vpi_SHIFT 0
1940#define lpfc_init_vpi_vpi_MASK 0x0000FFFF
1941#define lpfc_init_vpi_vpi_WORD word1
1942};
1943
1944struct lpfc_mbx_read_vpi {
1945 uint32_t word1_rsvd;
1946 uint32_t word2;
1947#define lpfc_mbx_read_vpi_vnportid_SHIFT 0
1948#define lpfc_mbx_read_vpi_vnportid_MASK 0x00FFFFFF
1949#define lpfc_mbx_read_vpi_vnportid_WORD word2
1950 uint32_t word3_rsvd;
1951 uint32_t word4;
1952#define lpfc_mbx_read_vpi_acq_alpa_SHIFT 0
1953#define lpfc_mbx_read_vpi_acq_alpa_MASK 0x000000FF
1954#define lpfc_mbx_read_vpi_acq_alpa_WORD word4
1955#define lpfc_mbx_read_vpi_pb_SHIFT 15
1956#define lpfc_mbx_read_vpi_pb_MASK 0x00000001
1957#define lpfc_mbx_read_vpi_pb_WORD word4
1958#define lpfc_mbx_read_vpi_spec_alpa_SHIFT 16
1959#define lpfc_mbx_read_vpi_spec_alpa_MASK 0x000000FF
1960#define lpfc_mbx_read_vpi_spec_alpa_WORD word4
1961#define lpfc_mbx_read_vpi_ns_SHIFT 30
1962#define lpfc_mbx_read_vpi_ns_MASK 0x00000001
1963#define lpfc_mbx_read_vpi_ns_WORD word4
1964#define lpfc_mbx_read_vpi_hl_SHIFT 31
1965#define lpfc_mbx_read_vpi_hl_MASK 0x00000001
1966#define lpfc_mbx_read_vpi_hl_WORD word4
1967 uint32_t word5_rsvd;
1968 uint32_t word6;
1969#define lpfc_mbx_read_vpi_vpi_SHIFT 0
1970#define lpfc_mbx_read_vpi_vpi_MASK 0x0000FFFF
1971#define lpfc_mbx_read_vpi_vpi_WORD word6
1972 uint32_t word7;
1973#define lpfc_mbx_read_vpi_mac_0_SHIFT 0
1974#define lpfc_mbx_read_vpi_mac_0_MASK 0x000000FF
1975#define lpfc_mbx_read_vpi_mac_0_WORD word7
1976#define lpfc_mbx_read_vpi_mac_1_SHIFT 8
1977#define lpfc_mbx_read_vpi_mac_1_MASK 0x000000FF
1978#define lpfc_mbx_read_vpi_mac_1_WORD word7
1979#define lpfc_mbx_read_vpi_mac_2_SHIFT 16
1980#define lpfc_mbx_read_vpi_mac_2_MASK 0x000000FF
1981#define lpfc_mbx_read_vpi_mac_2_WORD word7
1982#define lpfc_mbx_read_vpi_mac_3_SHIFT 24
1983#define lpfc_mbx_read_vpi_mac_3_MASK 0x000000FF
1984#define lpfc_mbx_read_vpi_mac_3_WORD word7
1985 uint32_t word8;
1986#define lpfc_mbx_read_vpi_mac_4_SHIFT 0
1987#define lpfc_mbx_read_vpi_mac_4_MASK 0x000000FF
1988#define lpfc_mbx_read_vpi_mac_4_WORD word8
1989#define lpfc_mbx_read_vpi_mac_5_SHIFT 8
1990#define lpfc_mbx_read_vpi_mac_5_MASK 0x000000FF
1991#define lpfc_mbx_read_vpi_mac_5_WORD word8
1992#define lpfc_mbx_read_vpi_vlan_tag_SHIFT 16
1993#define lpfc_mbx_read_vpi_vlan_tag_MASK 0x00000FFF
1994#define lpfc_mbx_read_vpi_vlan_tag_WORD word8
1995#define lpfc_mbx_read_vpi_vv_SHIFT 28
1996#define lpfc_mbx_read_vpi_vv_MASK 0x0000001
1997#define lpfc_mbx_read_vpi_vv_WORD word8
1998};
1999
2000struct lpfc_mbx_unreg_vfi {
2001 uint32_t word1_rsvd;
2002 uint32_t word2;
2003#define lpfc_unreg_vfi_vfi_SHIFT 0
2004#define lpfc_unreg_vfi_vfi_MASK 0x0000FFFF
2005#define lpfc_unreg_vfi_vfi_WORD word2
2006};
2007
2008struct lpfc_mbx_resume_rpi {
2009 uint32_t word1;
James Smart8fa38512009-07-19 10:01:03 -04002010#define lpfc_resume_rpi_index_SHIFT 0
2011#define lpfc_resume_rpi_index_MASK 0x0000FFFF
2012#define lpfc_resume_rpi_index_WORD word1
2013#define lpfc_resume_rpi_ii_SHIFT 30
2014#define lpfc_resume_rpi_ii_MASK 0x00000003
2015#define lpfc_resume_rpi_ii_WORD word1
2016#define RESUME_INDEX_RPI 0
2017#define RESUME_INDEX_VPI 1
2018#define RESUME_INDEX_VFI 2
2019#define RESUME_INDEX_FCFI 3
James Smartda0436e2009-05-22 14:51:39 -04002020 uint32_t event_tag;
James Smartda0436e2009-05-22 14:51:39 -04002021};
2022
2023#define REG_FCF_INVALID_QID 0xFFFF
2024struct lpfc_mbx_reg_fcfi {
2025 uint32_t word1;
2026#define lpfc_reg_fcfi_info_index_SHIFT 0
2027#define lpfc_reg_fcfi_info_index_MASK 0x0000FFFF
2028#define lpfc_reg_fcfi_info_index_WORD word1
2029#define lpfc_reg_fcfi_fcfi_SHIFT 16
2030#define lpfc_reg_fcfi_fcfi_MASK 0x0000FFFF
2031#define lpfc_reg_fcfi_fcfi_WORD word1
2032 uint32_t word2;
2033#define lpfc_reg_fcfi_rq_id1_SHIFT 0
2034#define lpfc_reg_fcfi_rq_id1_MASK 0x0000FFFF
2035#define lpfc_reg_fcfi_rq_id1_WORD word2
2036#define lpfc_reg_fcfi_rq_id0_SHIFT 16
2037#define lpfc_reg_fcfi_rq_id0_MASK 0x0000FFFF
2038#define lpfc_reg_fcfi_rq_id0_WORD word2
2039 uint32_t word3;
2040#define lpfc_reg_fcfi_rq_id3_SHIFT 0
2041#define lpfc_reg_fcfi_rq_id3_MASK 0x0000FFFF
2042#define lpfc_reg_fcfi_rq_id3_WORD word3
2043#define lpfc_reg_fcfi_rq_id2_SHIFT 16
2044#define lpfc_reg_fcfi_rq_id2_MASK 0x0000FFFF
2045#define lpfc_reg_fcfi_rq_id2_WORD word3
2046 uint32_t word4;
2047#define lpfc_reg_fcfi_type_match0_SHIFT 24
2048#define lpfc_reg_fcfi_type_match0_MASK 0x000000FF
2049#define lpfc_reg_fcfi_type_match0_WORD word4
2050#define lpfc_reg_fcfi_type_mask0_SHIFT 16
2051#define lpfc_reg_fcfi_type_mask0_MASK 0x000000FF
2052#define lpfc_reg_fcfi_type_mask0_WORD word4
2053#define lpfc_reg_fcfi_rctl_match0_SHIFT 8
2054#define lpfc_reg_fcfi_rctl_match0_MASK 0x000000FF
2055#define lpfc_reg_fcfi_rctl_match0_WORD word4
2056#define lpfc_reg_fcfi_rctl_mask0_SHIFT 0
2057#define lpfc_reg_fcfi_rctl_mask0_MASK 0x000000FF
2058#define lpfc_reg_fcfi_rctl_mask0_WORD word4
2059 uint32_t word5;
2060#define lpfc_reg_fcfi_type_match1_SHIFT 24
2061#define lpfc_reg_fcfi_type_match1_MASK 0x000000FF
2062#define lpfc_reg_fcfi_type_match1_WORD word5
2063#define lpfc_reg_fcfi_type_mask1_SHIFT 16
2064#define lpfc_reg_fcfi_type_mask1_MASK 0x000000FF
2065#define lpfc_reg_fcfi_type_mask1_WORD word5
2066#define lpfc_reg_fcfi_rctl_match1_SHIFT 8
2067#define lpfc_reg_fcfi_rctl_match1_MASK 0x000000FF
2068#define lpfc_reg_fcfi_rctl_match1_WORD word5
2069#define lpfc_reg_fcfi_rctl_mask1_SHIFT 0
2070#define lpfc_reg_fcfi_rctl_mask1_MASK 0x000000FF
2071#define lpfc_reg_fcfi_rctl_mask1_WORD word5
2072 uint32_t word6;
2073#define lpfc_reg_fcfi_type_match2_SHIFT 24
2074#define lpfc_reg_fcfi_type_match2_MASK 0x000000FF
2075#define lpfc_reg_fcfi_type_match2_WORD word6
2076#define lpfc_reg_fcfi_type_mask2_SHIFT 16
2077#define lpfc_reg_fcfi_type_mask2_MASK 0x000000FF
2078#define lpfc_reg_fcfi_type_mask2_WORD word6
2079#define lpfc_reg_fcfi_rctl_match2_SHIFT 8
2080#define lpfc_reg_fcfi_rctl_match2_MASK 0x000000FF
2081#define lpfc_reg_fcfi_rctl_match2_WORD word6
2082#define lpfc_reg_fcfi_rctl_mask2_SHIFT 0
2083#define lpfc_reg_fcfi_rctl_mask2_MASK 0x000000FF
2084#define lpfc_reg_fcfi_rctl_mask2_WORD word6
2085 uint32_t word7;
2086#define lpfc_reg_fcfi_type_match3_SHIFT 24
2087#define lpfc_reg_fcfi_type_match3_MASK 0x000000FF
2088#define lpfc_reg_fcfi_type_match3_WORD word7
2089#define lpfc_reg_fcfi_type_mask3_SHIFT 16
2090#define lpfc_reg_fcfi_type_mask3_MASK 0x000000FF
2091#define lpfc_reg_fcfi_type_mask3_WORD word7
2092#define lpfc_reg_fcfi_rctl_match3_SHIFT 8
2093#define lpfc_reg_fcfi_rctl_match3_MASK 0x000000FF
2094#define lpfc_reg_fcfi_rctl_match3_WORD word7
2095#define lpfc_reg_fcfi_rctl_mask3_SHIFT 0
2096#define lpfc_reg_fcfi_rctl_mask3_MASK 0x000000FF
2097#define lpfc_reg_fcfi_rctl_mask3_WORD word7
2098 uint32_t word8;
2099#define lpfc_reg_fcfi_mam_SHIFT 13
2100#define lpfc_reg_fcfi_mam_MASK 0x00000003
2101#define lpfc_reg_fcfi_mam_WORD word8
2102#define LPFC_MAM_BOTH 0 /* Both SPMA and FPMA */
2103#define LPFC_MAM_SPMA 1 /* Server Provided MAC Address */
2104#define LPFC_MAM_FPMA 2 /* Fabric Provided MAC Address */
2105#define lpfc_reg_fcfi_vv_SHIFT 12
2106#define lpfc_reg_fcfi_vv_MASK 0x00000001
2107#define lpfc_reg_fcfi_vv_WORD word8
2108#define lpfc_reg_fcfi_vlan_tag_SHIFT 0
2109#define lpfc_reg_fcfi_vlan_tag_MASK 0x00000FFF
2110#define lpfc_reg_fcfi_vlan_tag_WORD word8
2111};
2112
2113struct lpfc_mbx_unreg_fcfi {
2114 uint32_t word1_rsv;
2115 uint32_t word2;
2116#define lpfc_unreg_fcfi_SHIFT 0
2117#define lpfc_unreg_fcfi_MASK 0x0000FFFF
2118#define lpfc_unreg_fcfi_WORD word2
2119};
2120
2121struct lpfc_mbx_read_rev {
2122 uint32_t word1;
2123#define lpfc_mbx_rd_rev_sli_lvl_SHIFT 16
2124#define lpfc_mbx_rd_rev_sli_lvl_MASK 0x0000000F
2125#define lpfc_mbx_rd_rev_sli_lvl_WORD word1
2126#define lpfc_mbx_rd_rev_fcoe_SHIFT 20
2127#define lpfc_mbx_rd_rev_fcoe_MASK 0x00000001
2128#define lpfc_mbx_rd_rev_fcoe_WORD word1
James Smart45ed1192009-10-02 15:17:02 -04002129#define lpfc_mbx_rd_rev_cee_ver_SHIFT 21
2130#define lpfc_mbx_rd_rev_cee_ver_MASK 0x00000003
2131#define lpfc_mbx_rd_rev_cee_ver_WORD word1
2132#define LPFC_PREDCBX_CEE_MODE 0
2133#define LPFC_DCBX_CEE_MODE 1
James Smartda0436e2009-05-22 14:51:39 -04002134#define lpfc_mbx_rd_rev_vpd_SHIFT 29
2135#define lpfc_mbx_rd_rev_vpd_MASK 0x00000001
2136#define lpfc_mbx_rd_rev_vpd_WORD word1
2137 uint32_t first_hw_rev;
2138 uint32_t second_hw_rev;
2139 uint32_t word4_rsvd;
2140 uint32_t third_hw_rev;
2141 uint32_t word6;
2142#define lpfc_mbx_rd_rev_fcph_low_SHIFT 0
2143#define lpfc_mbx_rd_rev_fcph_low_MASK 0x000000FF
2144#define lpfc_mbx_rd_rev_fcph_low_WORD word6
2145#define lpfc_mbx_rd_rev_fcph_high_SHIFT 8
2146#define lpfc_mbx_rd_rev_fcph_high_MASK 0x000000FF
2147#define lpfc_mbx_rd_rev_fcph_high_WORD word6
2148#define lpfc_mbx_rd_rev_ftr_lvl_low_SHIFT 16
2149#define lpfc_mbx_rd_rev_ftr_lvl_low_MASK 0x000000FF
2150#define lpfc_mbx_rd_rev_ftr_lvl_low_WORD word6
2151#define lpfc_mbx_rd_rev_ftr_lvl_high_SHIFT 24
2152#define lpfc_mbx_rd_rev_ftr_lvl_high_MASK 0x000000FF
2153#define lpfc_mbx_rd_rev_ftr_lvl_high_WORD word6
2154 uint32_t word7_rsvd;
2155 uint32_t fw_id_rev;
2156 uint8_t fw_name[16];
2157 uint32_t ulp_fw_id_rev;
2158 uint8_t ulp_fw_name[16];
2159 uint32_t word18_47_rsvd[30];
2160 uint32_t word48;
2161#define lpfc_mbx_rd_rev_avail_len_SHIFT 0
2162#define lpfc_mbx_rd_rev_avail_len_MASK 0x00FFFFFF
2163#define lpfc_mbx_rd_rev_avail_len_WORD word48
2164 uint32_t vpd_paddr_low;
2165 uint32_t vpd_paddr_high;
2166 uint32_t avail_vpd_len;
2167 uint32_t rsvd_52_63[12];
2168};
2169
2170struct lpfc_mbx_read_config {
2171 uint32_t word1;
James Smart6d368e52011-05-24 11:44:12 -04002172#define lpfc_mbx_rd_conf_extnts_inuse_SHIFT 31
2173#define lpfc_mbx_rd_conf_extnts_inuse_MASK 0x00000001
2174#define lpfc_mbx_rd_conf_extnts_inuse_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04002175 uint32_t word2;
James Smartcd1c8302011-10-10 21:33:25 -04002176#define lpfc_mbx_rd_conf_lnk_numb_SHIFT 0
2177#define lpfc_mbx_rd_conf_lnk_numb_MASK 0x0000003F
2178#define lpfc_mbx_rd_conf_lnk_numb_WORD word2
2179#define lpfc_mbx_rd_conf_lnk_type_SHIFT 6
2180#define lpfc_mbx_rd_conf_lnk_type_MASK 0x00000003
2181#define lpfc_mbx_rd_conf_lnk_type_WORD word2
James Smart026abb82011-12-13 13:20:45 -05002182#define LPFC_LNK_TYPE_GE 0
2183#define LPFC_LNK_TYPE_FC 1
James Smartcd1c8302011-10-10 21:33:25 -04002184#define lpfc_mbx_rd_conf_lnk_ldv_SHIFT 8
2185#define lpfc_mbx_rd_conf_lnk_ldv_MASK 0x00000001
2186#define lpfc_mbx_rd_conf_lnk_ldv_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04002187#define lpfc_mbx_rd_conf_topology_SHIFT 24
2188#define lpfc_mbx_rd_conf_topology_MASK 0x000000FF
2189#define lpfc_mbx_rd_conf_topology_WORD word2
James Smart6d368e52011-05-24 11:44:12 -04002190 uint32_t rsvd_3;
James Smartda0436e2009-05-22 14:51:39 -04002191 uint32_t word4;
2192#define lpfc_mbx_rd_conf_e_d_tov_SHIFT 0
2193#define lpfc_mbx_rd_conf_e_d_tov_MASK 0x0000FFFF
2194#define lpfc_mbx_rd_conf_e_d_tov_WORD word4
James Smart6d368e52011-05-24 11:44:12 -04002195 uint32_t rsvd_5;
James Smartda0436e2009-05-22 14:51:39 -04002196 uint32_t word6;
2197#define lpfc_mbx_rd_conf_r_a_tov_SHIFT 0
2198#define lpfc_mbx_rd_conf_r_a_tov_MASK 0x0000FFFF
2199#define lpfc_mbx_rd_conf_r_a_tov_WORD word6
James Smart6d368e52011-05-24 11:44:12 -04002200 uint32_t rsvd_7;
2201 uint32_t rsvd_8;
James Smartda0436e2009-05-22 14:51:39 -04002202 uint32_t word9;
2203#define lpfc_mbx_rd_conf_lmt_SHIFT 0
2204#define lpfc_mbx_rd_conf_lmt_MASK 0x0000FFFF
2205#define lpfc_mbx_rd_conf_lmt_WORD word9
James Smart6d368e52011-05-24 11:44:12 -04002206 uint32_t rsvd_10;
2207 uint32_t rsvd_11;
James Smartda0436e2009-05-22 14:51:39 -04002208 uint32_t word12;
2209#define lpfc_mbx_rd_conf_xri_base_SHIFT 0
2210#define lpfc_mbx_rd_conf_xri_base_MASK 0x0000FFFF
2211#define lpfc_mbx_rd_conf_xri_base_WORD word12
2212#define lpfc_mbx_rd_conf_xri_count_SHIFT 16
2213#define lpfc_mbx_rd_conf_xri_count_MASK 0x0000FFFF
2214#define lpfc_mbx_rd_conf_xri_count_WORD word12
2215 uint32_t word13;
2216#define lpfc_mbx_rd_conf_rpi_base_SHIFT 0
2217#define lpfc_mbx_rd_conf_rpi_base_MASK 0x0000FFFF
2218#define lpfc_mbx_rd_conf_rpi_base_WORD word13
2219#define lpfc_mbx_rd_conf_rpi_count_SHIFT 16
2220#define lpfc_mbx_rd_conf_rpi_count_MASK 0x0000FFFF
2221#define lpfc_mbx_rd_conf_rpi_count_WORD word13
2222 uint32_t word14;
2223#define lpfc_mbx_rd_conf_vpi_base_SHIFT 0
2224#define lpfc_mbx_rd_conf_vpi_base_MASK 0x0000FFFF
2225#define lpfc_mbx_rd_conf_vpi_base_WORD word14
2226#define lpfc_mbx_rd_conf_vpi_count_SHIFT 16
2227#define lpfc_mbx_rd_conf_vpi_count_MASK 0x0000FFFF
2228#define lpfc_mbx_rd_conf_vpi_count_WORD word14
2229 uint32_t word15;
2230#define lpfc_mbx_rd_conf_vfi_base_SHIFT 0
2231#define lpfc_mbx_rd_conf_vfi_base_MASK 0x0000FFFF
2232#define lpfc_mbx_rd_conf_vfi_base_WORD word15
2233#define lpfc_mbx_rd_conf_vfi_count_SHIFT 16
2234#define lpfc_mbx_rd_conf_vfi_count_MASK 0x0000FFFF
2235#define lpfc_mbx_rd_conf_vfi_count_WORD word15
2236 uint32_t word16;
James Smartda0436e2009-05-22 14:51:39 -04002237#define lpfc_mbx_rd_conf_fcfi_count_SHIFT 16
2238#define lpfc_mbx_rd_conf_fcfi_count_MASK 0x0000FFFF
2239#define lpfc_mbx_rd_conf_fcfi_count_WORD word16
2240 uint32_t word17;
2241#define lpfc_mbx_rd_conf_rq_count_SHIFT 0
2242#define lpfc_mbx_rd_conf_rq_count_MASK 0x0000FFFF
2243#define lpfc_mbx_rd_conf_rq_count_WORD word17
2244#define lpfc_mbx_rd_conf_eq_count_SHIFT 16
2245#define lpfc_mbx_rd_conf_eq_count_MASK 0x0000FFFF
2246#define lpfc_mbx_rd_conf_eq_count_WORD word17
2247 uint32_t word18;
2248#define lpfc_mbx_rd_conf_wq_count_SHIFT 0
2249#define lpfc_mbx_rd_conf_wq_count_MASK 0x0000FFFF
2250#define lpfc_mbx_rd_conf_wq_count_WORD word18
2251#define lpfc_mbx_rd_conf_cq_count_SHIFT 16
2252#define lpfc_mbx_rd_conf_cq_count_MASK 0x0000FFFF
2253#define lpfc_mbx_rd_conf_cq_count_WORD word18
2254};
2255
2256struct lpfc_mbx_request_features {
2257 uint32_t word1;
2258#define lpfc_mbx_rq_ftr_qry_SHIFT 0
2259#define lpfc_mbx_rq_ftr_qry_MASK 0x00000001
2260#define lpfc_mbx_rq_ftr_qry_WORD word1
2261 uint32_t word2;
2262#define lpfc_mbx_rq_ftr_rq_iaab_SHIFT 0
2263#define lpfc_mbx_rq_ftr_rq_iaab_MASK 0x00000001
2264#define lpfc_mbx_rq_ftr_rq_iaab_WORD word2
2265#define lpfc_mbx_rq_ftr_rq_npiv_SHIFT 1
2266#define lpfc_mbx_rq_ftr_rq_npiv_MASK 0x00000001
2267#define lpfc_mbx_rq_ftr_rq_npiv_WORD word2
2268#define lpfc_mbx_rq_ftr_rq_dif_SHIFT 2
2269#define lpfc_mbx_rq_ftr_rq_dif_MASK 0x00000001
2270#define lpfc_mbx_rq_ftr_rq_dif_WORD word2
2271#define lpfc_mbx_rq_ftr_rq_vf_SHIFT 3
2272#define lpfc_mbx_rq_ftr_rq_vf_MASK 0x00000001
2273#define lpfc_mbx_rq_ftr_rq_vf_WORD word2
2274#define lpfc_mbx_rq_ftr_rq_fcpi_SHIFT 4
2275#define lpfc_mbx_rq_ftr_rq_fcpi_MASK 0x00000001
2276#define lpfc_mbx_rq_ftr_rq_fcpi_WORD word2
2277#define lpfc_mbx_rq_ftr_rq_fcpt_SHIFT 5
2278#define lpfc_mbx_rq_ftr_rq_fcpt_MASK 0x00000001
2279#define lpfc_mbx_rq_ftr_rq_fcpt_WORD word2
2280#define lpfc_mbx_rq_ftr_rq_fcpc_SHIFT 6
2281#define lpfc_mbx_rq_ftr_rq_fcpc_MASK 0x00000001
2282#define lpfc_mbx_rq_ftr_rq_fcpc_WORD word2
2283#define lpfc_mbx_rq_ftr_rq_ifip_SHIFT 7
2284#define lpfc_mbx_rq_ftr_rq_ifip_MASK 0x00000001
2285#define lpfc_mbx_rq_ftr_rq_ifip_WORD word2
James Smartfedd3b72011-02-16 12:39:24 -05002286#define lpfc_mbx_rq_ftr_rq_perfh_SHIFT 11
2287#define lpfc_mbx_rq_ftr_rq_perfh_MASK 0x00000001
2288#define lpfc_mbx_rq_ftr_rq_perfh_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04002289 uint32_t word3;
2290#define lpfc_mbx_rq_ftr_rsp_iaab_SHIFT 0
2291#define lpfc_mbx_rq_ftr_rsp_iaab_MASK 0x00000001
2292#define lpfc_mbx_rq_ftr_rsp_iaab_WORD word3
2293#define lpfc_mbx_rq_ftr_rsp_npiv_SHIFT 1
2294#define lpfc_mbx_rq_ftr_rsp_npiv_MASK 0x00000001
2295#define lpfc_mbx_rq_ftr_rsp_npiv_WORD word3
2296#define lpfc_mbx_rq_ftr_rsp_dif_SHIFT 2
2297#define lpfc_mbx_rq_ftr_rsp_dif_MASK 0x00000001
2298#define lpfc_mbx_rq_ftr_rsp_dif_WORD word3
2299#define lpfc_mbx_rq_ftr_rsp_vf_SHIFT 3
2300#define lpfc_mbx_rq_ftr_rsp_vf__MASK 0x00000001
2301#define lpfc_mbx_rq_ftr_rsp_vf_WORD word3
2302#define lpfc_mbx_rq_ftr_rsp_fcpi_SHIFT 4
2303#define lpfc_mbx_rq_ftr_rsp_fcpi_MASK 0x00000001
2304#define lpfc_mbx_rq_ftr_rsp_fcpi_WORD word3
2305#define lpfc_mbx_rq_ftr_rsp_fcpt_SHIFT 5
2306#define lpfc_mbx_rq_ftr_rsp_fcpt_MASK 0x00000001
2307#define lpfc_mbx_rq_ftr_rsp_fcpt_WORD word3
2308#define lpfc_mbx_rq_ftr_rsp_fcpc_SHIFT 6
2309#define lpfc_mbx_rq_ftr_rsp_fcpc_MASK 0x00000001
2310#define lpfc_mbx_rq_ftr_rsp_fcpc_WORD word3
2311#define lpfc_mbx_rq_ftr_rsp_ifip_SHIFT 7
2312#define lpfc_mbx_rq_ftr_rsp_ifip_MASK 0x00000001
2313#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
James Smartfedd3b72011-02-16 12:39:24 -05002314#define lpfc_mbx_rq_ftr_rsp_perfh_SHIFT 11
2315#define lpfc_mbx_rq_ftr_rsp_perfh_MASK 0x00000001
2316#define lpfc_mbx_rq_ftr_rsp_perfh_WORD word3
James Smartda0436e2009-05-22 14:51:39 -04002317};
2318
James Smart28baac72010-02-12 14:42:03 -05002319struct lpfc_mbx_supp_pages {
2320 uint32_t word1;
2321#define qs_SHIFT 0
2322#define qs_MASK 0x00000001
2323#define qs_WORD word1
2324#define wr_SHIFT 1
2325#define wr_MASK 0x00000001
2326#define wr_WORD word1
2327#define pf_SHIFT 8
2328#define pf_MASK 0x000000ff
2329#define pf_WORD word1
2330#define cpn_SHIFT 16
2331#define cpn_MASK 0x000000ff
2332#define cpn_WORD word1
2333 uint32_t word2;
2334#define list_offset_SHIFT 0
2335#define list_offset_MASK 0x000000ff
2336#define list_offset_WORD word2
2337#define next_offset_SHIFT 8
2338#define next_offset_MASK 0x000000ff
2339#define next_offset_WORD word2
2340#define elem_cnt_SHIFT 16
2341#define elem_cnt_MASK 0x000000ff
2342#define elem_cnt_WORD word2
2343 uint32_t word3;
2344#define pn_0_SHIFT 24
2345#define pn_0_MASK 0x000000ff
2346#define pn_0_WORD word3
2347#define pn_1_SHIFT 16
2348#define pn_1_MASK 0x000000ff
2349#define pn_1_WORD word3
2350#define pn_2_SHIFT 8
2351#define pn_2_MASK 0x000000ff
2352#define pn_2_WORD word3
2353#define pn_3_SHIFT 0
2354#define pn_3_MASK 0x000000ff
2355#define pn_3_WORD word3
2356 uint32_t word4;
2357#define pn_4_SHIFT 24
2358#define pn_4_MASK 0x000000ff
2359#define pn_4_WORD word4
2360#define pn_5_SHIFT 16
2361#define pn_5_MASK 0x000000ff
2362#define pn_5_WORD word4
2363#define pn_6_SHIFT 8
2364#define pn_6_MASK 0x000000ff
2365#define pn_6_WORD word4
2366#define pn_7_SHIFT 0
2367#define pn_7_MASK 0x000000ff
2368#define pn_7_WORD word4
2369 uint32_t rsvd[27];
2370#define LPFC_SUPP_PAGES 0
2371#define LPFC_BLOCK_GUARD_PROFILES 1
2372#define LPFC_SLI4_PARAMETERS 2
2373};
2374
James Smartfedd3b72011-02-16 12:39:24 -05002375struct lpfc_mbx_pc_sli4_params {
James Smart28baac72010-02-12 14:42:03 -05002376 uint32_t word1;
2377#define qs_SHIFT 0
2378#define qs_MASK 0x00000001
2379#define qs_WORD word1
2380#define wr_SHIFT 1
2381#define wr_MASK 0x00000001
2382#define wr_WORD word1
2383#define pf_SHIFT 8
2384#define pf_MASK 0x000000ff
2385#define pf_WORD word1
2386#define cpn_SHIFT 16
2387#define cpn_MASK 0x000000ff
2388#define cpn_WORD word1
2389 uint32_t word2;
2390#define if_type_SHIFT 0
2391#define if_type_MASK 0x00000007
2392#define if_type_WORD word2
2393#define sli_rev_SHIFT 4
2394#define sli_rev_MASK 0x0000000f
2395#define sli_rev_WORD word2
2396#define sli_family_SHIFT 8
2397#define sli_family_MASK 0x000000ff
2398#define sli_family_WORD word2
2399#define featurelevel_1_SHIFT 16
2400#define featurelevel_1_MASK 0x000000ff
2401#define featurelevel_1_WORD word2
2402#define featurelevel_2_SHIFT 24
2403#define featurelevel_2_MASK 0x0000001f
2404#define featurelevel_2_WORD word2
2405 uint32_t word3;
2406#define fcoe_SHIFT 0
2407#define fcoe_MASK 0x00000001
2408#define fcoe_WORD word3
2409#define fc_SHIFT 1
2410#define fc_MASK 0x00000001
2411#define fc_WORD word3
2412#define nic_SHIFT 2
2413#define nic_MASK 0x00000001
2414#define nic_WORD word3
2415#define iscsi_SHIFT 3
2416#define iscsi_MASK 0x00000001
2417#define iscsi_WORD word3
2418#define rdma_SHIFT 4
2419#define rdma_MASK 0x00000001
2420#define rdma_WORD word3
2421 uint32_t sge_supp_len;
James Smartcb5172e2010-03-15 11:25:07 -04002422#define SLI4_PAGE_SIZE 4096
James Smart28baac72010-02-12 14:42:03 -05002423 uint32_t word5;
2424#define if_page_sz_SHIFT 0
2425#define if_page_sz_MASK 0x0000ffff
2426#define if_page_sz_WORD word5
2427#define loopbk_scope_SHIFT 24
2428#define loopbk_scope_MASK 0x0000000f
2429#define loopbk_scope_WORD word5
2430#define rq_db_window_SHIFT 28
2431#define rq_db_window_MASK 0x0000000f
2432#define rq_db_window_WORD word5
2433 uint32_t word6;
2434#define eq_pages_SHIFT 0
2435#define eq_pages_MASK 0x0000000f
2436#define eq_pages_WORD word6
2437#define eqe_size_SHIFT 8
2438#define eqe_size_MASK 0x000000ff
2439#define eqe_size_WORD word6
2440 uint32_t word7;
2441#define cq_pages_SHIFT 0
2442#define cq_pages_MASK 0x0000000f
2443#define cq_pages_WORD word7
2444#define cqe_size_SHIFT 8
2445#define cqe_size_MASK 0x000000ff
2446#define cqe_size_WORD word7
2447 uint32_t word8;
2448#define mq_pages_SHIFT 0
2449#define mq_pages_MASK 0x0000000f
2450#define mq_pages_WORD word8
2451#define mqe_size_SHIFT 8
2452#define mqe_size_MASK 0x000000ff
2453#define mqe_size_WORD word8
2454#define mq_elem_cnt_SHIFT 16
2455#define mq_elem_cnt_MASK 0x000000ff
2456#define mq_elem_cnt_WORD word8
2457 uint32_t word9;
2458#define wq_pages_SHIFT 0
2459#define wq_pages_MASK 0x0000ffff
2460#define wq_pages_WORD word9
2461#define wqe_size_SHIFT 8
2462#define wqe_size_MASK 0x000000ff
2463#define wqe_size_WORD word9
2464 uint32_t word10;
2465#define rq_pages_SHIFT 0
2466#define rq_pages_MASK 0x0000ffff
2467#define rq_pages_WORD word10
2468#define rqe_size_SHIFT 8
2469#define rqe_size_MASK 0x000000ff
2470#define rqe_size_WORD word10
2471 uint32_t word11;
2472#define hdr_pages_SHIFT 0
2473#define hdr_pages_MASK 0x0000000f
2474#define hdr_pages_WORD word11
2475#define hdr_size_SHIFT 8
2476#define hdr_size_MASK 0x0000000f
2477#define hdr_size_WORD word11
2478#define hdr_pp_align_SHIFT 16
2479#define hdr_pp_align_MASK 0x0000ffff
2480#define hdr_pp_align_WORD word11
2481 uint32_t word12;
2482#define sgl_pages_SHIFT 0
2483#define sgl_pages_MASK 0x0000000f
2484#define sgl_pages_WORD word12
2485#define sgl_pp_align_SHIFT 16
2486#define sgl_pp_align_MASK 0x0000ffff
2487#define sgl_pp_align_WORD word12
2488 uint32_t rsvd_13_63[51];
2489};
James Smart9589b0622011-04-16 11:03:17 -04002490#define SLI4_PAGE_ALIGN(addr) (((addr)+((SLI4_PAGE_SIZE)-1)) \
2491 &(~((SLI4_PAGE_SIZE)-1)))
James Smart28baac72010-02-12 14:42:03 -05002492
James Smartfedd3b72011-02-16 12:39:24 -05002493struct lpfc_sli4_parameters {
2494 uint32_t word0;
2495#define cfg_prot_type_SHIFT 0
2496#define cfg_prot_type_MASK 0x000000FF
2497#define cfg_prot_type_WORD word0
2498 uint32_t word1;
2499#define cfg_ft_SHIFT 0
2500#define cfg_ft_MASK 0x00000001
2501#define cfg_ft_WORD word1
2502#define cfg_sli_rev_SHIFT 4
2503#define cfg_sli_rev_MASK 0x0000000f
2504#define cfg_sli_rev_WORD word1
2505#define cfg_sli_family_SHIFT 8
2506#define cfg_sli_family_MASK 0x0000000f
2507#define cfg_sli_family_WORD word1
2508#define cfg_if_type_SHIFT 12
2509#define cfg_if_type_MASK 0x0000000f
2510#define cfg_if_type_WORD word1
2511#define cfg_sli_hint_1_SHIFT 16
2512#define cfg_sli_hint_1_MASK 0x000000ff
2513#define cfg_sli_hint_1_WORD word1
2514#define cfg_sli_hint_2_SHIFT 24
2515#define cfg_sli_hint_2_MASK 0x0000001f
2516#define cfg_sli_hint_2_WORD word1
2517 uint32_t word2;
2518 uint32_t word3;
2519 uint32_t word4;
2520#define cfg_cqv_SHIFT 14
2521#define cfg_cqv_MASK 0x00000003
2522#define cfg_cqv_WORD word4
2523 uint32_t word5;
2524 uint32_t word6;
2525#define cfg_mqv_SHIFT 14
2526#define cfg_mqv_MASK 0x00000003
2527#define cfg_mqv_WORD word6
2528 uint32_t word7;
2529 uint32_t word8;
2530#define cfg_wqv_SHIFT 14
2531#define cfg_wqv_MASK 0x00000003
2532#define cfg_wqv_WORD word8
2533 uint32_t word9;
2534 uint32_t word10;
2535#define cfg_rqv_SHIFT 14
2536#define cfg_rqv_MASK 0x00000003
2537#define cfg_rqv_WORD word10
2538 uint32_t word11;
2539#define cfg_rq_db_window_SHIFT 28
2540#define cfg_rq_db_window_MASK 0x0000000f
2541#define cfg_rq_db_window_WORD word11
2542 uint32_t word12;
2543#define cfg_fcoe_SHIFT 0
2544#define cfg_fcoe_MASK 0x00000001
2545#define cfg_fcoe_WORD word12
James Smart6d368e52011-05-24 11:44:12 -04002546#define cfg_ext_SHIFT 1
2547#define cfg_ext_MASK 0x00000001
2548#define cfg_ext_WORD word12
2549#define cfg_hdrr_SHIFT 2
2550#define cfg_hdrr_MASK 0x00000001
2551#define cfg_hdrr_WORD word12
James Smartfedd3b72011-02-16 12:39:24 -05002552#define cfg_phwq_SHIFT 15
2553#define cfg_phwq_MASK 0x00000001
2554#define cfg_phwq_WORD word12
2555#define cfg_loopbk_scope_SHIFT 28
2556#define cfg_loopbk_scope_MASK 0x0000000f
2557#define cfg_loopbk_scope_WORD word12
2558 uint32_t sge_supp_len;
2559 uint32_t word14;
2560#define cfg_sgl_page_cnt_SHIFT 0
2561#define cfg_sgl_page_cnt_MASK 0x0000000f
2562#define cfg_sgl_page_cnt_WORD word14
2563#define cfg_sgl_page_size_SHIFT 8
2564#define cfg_sgl_page_size_MASK 0x000000ff
2565#define cfg_sgl_page_size_WORD word14
2566#define cfg_sgl_pp_align_SHIFT 16
2567#define cfg_sgl_pp_align_MASK 0x000000ff
2568#define cfg_sgl_pp_align_WORD word14
2569 uint32_t word15;
2570 uint32_t word16;
2571 uint32_t word17;
2572 uint32_t word18;
2573 uint32_t word19;
2574};
2575
2576struct lpfc_mbx_get_sli4_parameters {
2577 struct mbox_header header;
2578 struct lpfc_sli4_parameters sli4_parameters;
2579};
2580
James Smart912e3ac2011-05-24 11:42:11 -04002581struct lpfc_rscr_desc_generic {
James Smart8aa134a2012-08-14 14:25:29 -04002582#define LPFC_RSRC_DESC_WSIZE 22
James Smart912e3ac2011-05-24 11:42:11 -04002583 uint32_t desc[LPFC_RSRC_DESC_WSIZE];
2584};
2585
2586struct lpfc_rsrc_desc_pcie {
2587 uint32_t word0;
2588#define lpfc_rsrc_desc_pcie_type_SHIFT 0
2589#define lpfc_rsrc_desc_pcie_type_MASK 0x000000ff
2590#define lpfc_rsrc_desc_pcie_type_WORD word0
2591#define LPFC_RSRC_DESC_TYPE_PCIE 0x40
James Smart8aa134a2012-08-14 14:25:29 -04002592#define lpfc_rsrc_desc_pcie_length_SHIFT 8
2593#define lpfc_rsrc_desc_pcie_length_MASK 0x000000ff
2594#define lpfc_rsrc_desc_pcie_length_WORD word0
James Smart912e3ac2011-05-24 11:42:11 -04002595 uint32_t word1;
2596#define lpfc_rsrc_desc_pcie_pfnum_SHIFT 0
2597#define lpfc_rsrc_desc_pcie_pfnum_MASK 0x000000ff
2598#define lpfc_rsrc_desc_pcie_pfnum_WORD word1
2599 uint32_t reserved;
2600 uint32_t word3;
2601#define lpfc_rsrc_desc_pcie_sriov_sta_SHIFT 0
2602#define lpfc_rsrc_desc_pcie_sriov_sta_MASK 0x000000ff
2603#define lpfc_rsrc_desc_pcie_sriov_sta_WORD word3
2604#define lpfc_rsrc_desc_pcie_pf_sta_SHIFT 8
2605#define lpfc_rsrc_desc_pcie_pf_sta_MASK 0x000000ff
2606#define lpfc_rsrc_desc_pcie_pf_sta_WORD word3
2607#define lpfc_rsrc_desc_pcie_pf_type_SHIFT 16
2608#define lpfc_rsrc_desc_pcie_pf_type_MASK 0x000000ff
2609#define lpfc_rsrc_desc_pcie_pf_type_WORD word3
2610 uint32_t word4;
2611#define lpfc_rsrc_desc_pcie_nr_virtfn_SHIFT 0
2612#define lpfc_rsrc_desc_pcie_nr_virtfn_MASK 0x0000ffff
2613#define lpfc_rsrc_desc_pcie_nr_virtfn_WORD word4
2614};
2615
2616struct lpfc_rsrc_desc_fcfcoe {
2617 uint32_t word0;
2618#define lpfc_rsrc_desc_fcfcoe_type_SHIFT 0
2619#define lpfc_rsrc_desc_fcfcoe_type_MASK 0x000000ff
2620#define lpfc_rsrc_desc_fcfcoe_type_WORD word0
2621#define LPFC_RSRC_DESC_TYPE_FCFCOE 0x43
James Smart8aa134a2012-08-14 14:25:29 -04002622#define lpfc_rsrc_desc_fcfcoe_length_SHIFT 8
2623#define lpfc_rsrc_desc_fcfcoe_length_MASK 0x000000ff
2624#define lpfc_rsrc_desc_fcfcoe_length_WORD word0
2625#define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD 0
2626#define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH 72
2627#define LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH 88
James Smart912e3ac2011-05-24 11:42:11 -04002628 uint32_t word1;
2629#define lpfc_rsrc_desc_fcfcoe_vfnum_SHIFT 0
2630#define lpfc_rsrc_desc_fcfcoe_vfnum_MASK 0x000000ff
2631#define lpfc_rsrc_desc_fcfcoe_vfnum_WORD word1
2632#define lpfc_rsrc_desc_fcfcoe_pfnum_SHIFT 16
2633#define lpfc_rsrc_desc_fcfcoe_pfnum_MASK 0x000007ff
2634#define lpfc_rsrc_desc_fcfcoe_pfnum_WORD word1
2635 uint32_t word2;
2636#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_SHIFT 0
2637#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_MASK 0x0000ffff
2638#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_WORD word2
2639#define lpfc_rsrc_desc_fcfcoe_xri_cnt_SHIFT 16
2640#define lpfc_rsrc_desc_fcfcoe_xri_cnt_MASK 0x0000ffff
2641#define lpfc_rsrc_desc_fcfcoe_xri_cnt_WORD word2
2642 uint32_t word3;
2643#define lpfc_rsrc_desc_fcfcoe_wq_cnt_SHIFT 0
2644#define lpfc_rsrc_desc_fcfcoe_wq_cnt_MASK 0x0000ffff
2645#define lpfc_rsrc_desc_fcfcoe_wq_cnt_WORD word3
2646#define lpfc_rsrc_desc_fcfcoe_rq_cnt_SHIFT 16
2647#define lpfc_rsrc_desc_fcfcoe_rq_cnt_MASK 0x0000ffff
2648#define lpfc_rsrc_desc_fcfcoe_rq_cnt_WORD word3
2649 uint32_t word4;
2650#define lpfc_rsrc_desc_fcfcoe_cq_cnt_SHIFT 0
2651#define lpfc_rsrc_desc_fcfcoe_cq_cnt_MASK 0x0000ffff
2652#define lpfc_rsrc_desc_fcfcoe_cq_cnt_WORD word4
2653#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_SHIFT 16
2654#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_MASK 0x0000ffff
2655#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_WORD word4
2656 uint32_t word5;
2657#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_SHIFT 0
2658#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_MASK 0x0000ffff
2659#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_WORD word5
2660#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_SHIFT 16
2661#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_MASK 0x0000ffff
2662#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_WORD word5
2663 uint32_t word6;
2664 uint32_t word7;
2665 uint32_t word8;
2666 uint32_t word9;
2667 uint32_t word10;
2668 uint32_t word11;
2669 uint32_t word12;
2670 uint32_t word13;
2671#define lpfc_rsrc_desc_fcfcoe_lnk_nr_SHIFT 0
2672#define lpfc_rsrc_desc_fcfcoe_lnk_nr_MASK 0x0000003f
2673#define lpfc_rsrc_desc_fcfcoe_lnk_nr_WORD word13
2674#define lpfc_rsrc_desc_fcfcoe_lnk_tp_SHIFT 6
2675#define lpfc_rsrc_desc_fcfcoe_lnk_tp_MASK 0x00000003
2676#define lpfc_rsrc_desc_fcfcoe_lnk_tp_WORD word13
2677#define lpfc_rsrc_desc_fcfcoe_lmc_SHIFT 8
2678#define lpfc_rsrc_desc_fcfcoe_lmc_MASK 0x00000001
2679#define lpfc_rsrc_desc_fcfcoe_lmc_WORD word13
2680#define lpfc_rsrc_desc_fcfcoe_lld_SHIFT 9
2681#define lpfc_rsrc_desc_fcfcoe_lld_MASK 0x00000001
2682#define lpfc_rsrc_desc_fcfcoe_lld_WORD word13
2683#define lpfc_rsrc_desc_fcfcoe_eq_cnt_SHIFT 16
2684#define lpfc_rsrc_desc_fcfcoe_eq_cnt_MASK 0x0000ffff
2685#define lpfc_rsrc_desc_fcfcoe_eq_cnt_WORD word13
James Smart8aa134a2012-08-14 14:25:29 -04002686/* extended FC/FCoE Resource Descriptor when length = 88 bytes */
2687 uint32_t bw_min;
2688 uint32_t bw_max;
2689 uint32_t iops_min;
2690 uint32_t iops_max;
2691 uint32_t reserved[4];
James Smart912e3ac2011-05-24 11:42:11 -04002692};
2693
2694struct lpfc_func_cfg {
2695#define LPFC_RSRC_DESC_MAX_NUM 2
2696 uint32_t rsrc_desc_count;
2697 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2698};
2699
2700struct lpfc_mbx_get_func_cfg {
2701 struct mbox_header header;
2702#define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2703#define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2704#define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2705 struct lpfc_func_cfg func_cfg;
2706};
2707
2708struct lpfc_prof_cfg {
2709#define LPFC_RSRC_DESC_MAX_NUM 2
2710 uint32_t rsrc_desc_count;
2711 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2712};
2713
2714struct lpfc_mbx_get_prof_cfg {
2715 struct mbox_header header;
2716#define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2717#define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2718#define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2719 union {
2720 struct {
2721 uint32_t word10;
2722#define lpfc_mbx_get_prof_cfg_prof_id_SHIFT 0
2723#define lpfc_mbx_get_prof_cfg_prof_id_MASK 0x000000ff
2724#define lpfc_mbx_get_prof_cfg_prof_id_WORD word10
2725#define lpfc_mbx_get_prof_cfg_prof_tp_SHIFT 8
2726#define lpfc_mbx_get_prof_cfg_prof_tp_MASK 0x00000003
2727#define lpfc_mbx_get_prof_cfg_prof_tp_WORD word10
2728 } request;
2729 struct {
2730 struct lpfc_prof_cfg prof_cfg;
2731 } response;
2732 } u;
2733};
2734
James Smartcd1c8302011-10-10 21:33:25 -04002735struct lpfc_controller_attribute {
2736 uint32_t version_string[8];
2737 uint32_t manufacturer_name[8];
2738 uint32_t supported_modes;
2739 uint32_t word17;
2740#define lpfc_cntl_attr_eprom_ver_lo_SHIFT 0
2741#define lpfc_cntl_attr_eprom_ver_lo_MASK 0x000000ff
2742#define lpfc_cntl_attr_eprom_ver_lo_WORD word17
2743#define lpfc_cntl_attr_eprom_ver_hi_SHIFT 8
2744#define lpfc_cntl_attr_eprom_ver_hi_MASK 0x000000ff
2745#define lpfc_cntl_attr_eprom_ver_hi_WORD word17
2746 uint32_t mbx_da_struct_ver;
2747 uint32_t ep_fw_da_struct_ver;
2748 uint32_t ncsi_ver_str[3];
2749 uint32_t dflt_ext_timeout;
2750 uint32_t model_number[8];
2751 uint32_t description[16];
2752 uint32_t serial_number[8];
2753 uint32_t ip_ver_str[8];
2754 uint32_t fw_ver_str[8];
2755 uint32_t bios_ver_str[8];
2756 uint32_t redboot_ver_str[8];
2757 uint32_t driver_ver_str[8];
2758 uint32_t flash_fw_ver_str[8];
2759 uint32_t functionality;
2760 uint32_t word105;
2761#define lpfc_cntl_attr_max_cbd_len_SHIFT 0
2762#define lpfc_cntl_attr_max_cbd_len_MASK 0x0000ffff
2763#define lpfc_cntl_attr_max_cbd_len_WORD word105
2764#define lpfc_cntl_attr_asic_rev_SHIFT 16
2765#define lpfc_cntl_attr_asic_rev_MASK 0x000000ff
2766#define lpfc_cntl_attr_asic_rev_WORD word105
2767#define lpfc_cntl_attr_gen_guid0_SHIFT 24
2768#define lpfc_cntl_attr_gen_guid0_MASK 0x000000ff
2769#define lpfc_cntl_attr_gen_guid0_WORD word105
2770 uint32_t gen_guid1_12[3];
2771 uint32_t word109;
2772#define lpfc_cntl_attr_gen_guid13_14_SHIFT 0
2773#define lpfc_cntl_attr_gen_guid13_14_MASK 0x0000ffff
2774#define lpfc_cntl_attr_gen_guid13_14_WORD word109
2775#define lpfc_cntl_attr_gen_guid15_SHIFT 16
2776#define lpfc_cntl_attr_gen_guid15_MASK 0x000000ff
2777#define lpfc_cntl_attr_gen_guid15_WORD word109
2778#define lpfc_cntl_attr_hba_port_cnt_SHIFT 24
2779#define lpfc_cntl_attr_hba_port_cnt_MASK 0x000000ff
2780#define lpfc_cntl_attr_hba_port_cnt_WORD word109
2781 uint32_t word110;
2782#define lpfc_cntl_attr_dflt_lnk_tmo_SHIFT 0
2783#define lpfc_cntl_attr_dflt_lnk_tmo_MASK 0x0000ffff
2784#define lpfc_cntl_attr_dflt_lnk_tmo_WORD word110
2785#define lpfc_cntl_attr_multi_func_dev_SHIFT 24
2786#define lpfc_cntl_attr_multi_func_dev_MASK 0x000000ff
2787#define lpfc_cntl_attr_multi_func_dev_WORD word110
2788 uint32_t word111;
2789#define lpfc_cntl_attr_cache_valid_SHIFT 0
2790#define lpfc_cntl_attr_cache_valid_MASK 0x000000ff
2791#define lpfc_cntl_attr_cache_valid_WORD word111
2792#define lpfc_cntl_attr_hba_status_SHIFT 8
2793#define lpfc_cntl_attr_hba_status_MASK 0x000000ff
2794#define lpfc_cntl_attr_hba_status_WORD word111
2795#define lpfc_cntl_attr_max_domain_SHIFT 16
2796#define lpfc_cntl_attr_max_domain_MASK 0x000000ff
2797#define lpfc_cntl_attr_max_domain_WORD word111
2798#define lpfc_cntl_attr_lnk_numb_SHIFT 24
2799#define lpfc_cntl_attr_lnk_numb_MASK 0x0000003f
2800#define lpfc_cntl_attr_lnk_numb_WORD word111
2801#define lpfc_cntl_attr_lnk_type_SHIFT 30
2802#define lpfc_cntl_attr_lnk_type_MASK 0x00000003
2803#define lpfc_cntl_attr_lnk_type_WORD word111
2804 uint32_t fw_post_status;
2805 uint32_t hba_mtu[8];
2806 uint32_t word121;
2807 uint32_t reserved1[3];
2808 uint32_t word125;
2809#define lpfc_cntl_attr_pci_vendor_id_SHIFT 0
2810#define lpfc_cntl_attr_pci_vendor_id_MASK 0x0000ffff
2811#define lpfc_cntl_attr_pci_vendor_id_WORD word125
2812#define lpfc_cntl_attr_pci_device_id_SHIFT 16
2813#define lpfc_cntl_attr_pci_device_id_MASK 0x0000ffff
2814#define lpfc_cntl_attr_pci_device_id_WORD word125
2815 uint32_t word126;
2816#define lpfc_cntl_attr_pci_subvdr_id_SHIFT 0
2817#define lpfc_cntl_attr_pci_subvdr_id_MASK 0x0000ffff
2818#define lpfc_cntl_attr_pci_subvdr_id_WORD word126
2819#define lpfc_cntl_attr_pci_subsys_id_SHIFT 16
2820#define lpfc_cntl_attr_pci_subsys_id_MASK 0x0000ffff
2821#define lpfc_cntl_attr_pci_subsys_id_WORD word126
2822 uint32_t word127;
2823#define lpfc_cntl_attr_pci_bus_num_SHIFT 0
2824#define lpfc_cntl_attr_pci_bus_num_MASK 0x000000ff
2825#define lpfc_cntl_attr_pci_bus_num_WORD word127
2826#define lpfc_cntl_attr_pci_dev_num_SHIFT 8
2827#define lpfc_cntl_attr_pci_dev_num_MASK 0x000000ff
2828#define lpfc_cntl_attr_pci_dev_num_WORD word127
2829#define lpfc_cntl_attr_pci_fnc_num_SHIFT 16
2830#define lpfc_cntl_attr_pci_fnc_num_MASK 0x000000ff
2831#define lpfc_cntl_attr_pci_fnc_num_WORD word127
2832#define lpfc_cntl_attr_inf_type_SHIFT 24
2833#define lpfc_cntl_attr_inf_type_MASK 0x000000ff
2834#define lpfc_cntl_attr_inf_type_WORD word127
2835 uint32_t unique_id[2];
2836 uint32_t word130;
2837#define lpfc_cntl_attr_num_netfil_SHIFT 0
2838#define lpfc_cntl_attr_num_netfil_MASK 0x000000ff
2839#define lpfc_cntl_attr_num_netfil_WORD word130
2840 uint32_t reserved2[4];
2841};
2842
2843struct lpfc_mbx_get_cntl_attributes {
2844 union lpfc_sli4_cfg_shdr cfg_shdr;
2845 struct lpfc_controller_attribute cntl_attr;
2846};
2847
2848struct lpfc_mbx_get_port_name {
2849 struct mbox_header header;
2850 union {
2851 struct {
2852 uint32_t word4;
2853#define lpfc_mbx_get_port_name_lnk_type_SHIFT 0
2854#define lpfc_mbx_get_port_name_lnk_type_MASK 0x00000003
2855#define lpfc_mbx_get_port_name_lnk_type_WORD word4
2856 } request;
2857 struct {
2858 uint32_t word4;
2859#define lpfc_mbx_get_port_name_name0_SHIFT 0
2860#define lpfc_mbx_get_port_name_name0_MASK 0x000000FF
2861#define lpfc_mbx_get_port_name_name0_WORD word4
2862#define lpfc_mbx_get_port_name_name1_SHIFT 8
2863#define lpfc_mbx_get_port_name_name1_MASK 0x000000FF
2864#define lpfc_mbx_get_port_name_name1_WORD word4
2865#define lpfc_mbx_get_port_name_name2_SHIFT 16
2866#define lpfc_mbx_get_port_name_name2_MASK 0x000000FF
2867#define lpfc_mbx_get_port_name_name2_WORD word4
2868#define lpfc_mbx_get_port_name_name3_SHIFT 24
2869#define lpfc_mbx_get_port_name_name3_MASK 0x000000FF
2870#define lpfc_mbx_get_port_name_name3_WORD word4
2871#define LPFC_LINK_NUMBER_0 0
2872#define LPFC_LINK_NUMBER_1 1
2873#define LPFC_LINK_NUMBER_2 2
2874#define LPFC_LINK_NUMBER_3 3
2875 } response;
2876 } u;
2877};
2878
James Smartda0436e2009-05-22 14:51:39 -04002879/* Mailbox Completion Queue Error Messages */
James Smartcd1c8302011-10-10 21:33:25 -04002880#define MB_CQE_STATUS_SUCCESS 0x0
James Smartda0436e2009-05-22 14:51:39 -04002881#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
2882#define MB_CQE_STATUS_INVALID_PARAMETER 0x2
2883#define MB_CQE_STATUS_INSUFFICIENT_RESOURCES 0x3
2884#define MB_CEQ_STATUS_QUEUE_FLUSHING 0x4
2885#define MB_CQE_STATUS_DMA_FAILED 0x5
2886
James Smart52d52442011-05-24 11:42:45 -04002887#define LPFC_MBX_WR_CONFIG_MAX_BDE 8
2888struct lpfc_mbx_wr_object {
2889 struct mbox_header header;
2890 union {
2891 struct {
2892 uint32_t word4;
2893#define lpfc_wr_object_eof_SHIFT 31
2894#define lpfc_wr_object_eof_MASK 0x00000001
2895#define lpfc_wr_object_eof_WORD word4
2896#define lpfc_wr_object_write_length_SHIFT 0
2897#define lpfc_wr_object_write_length_MASK 0x00FFFFFF
2898#define lpfc_wr_object_write_length_WORD word4
2899 uint32_t write_offset;
2900 uint32_t object_name[26];
2901 uint32_t bde_count;
2902 struct ulp_bde64 bde[LPFC_MBX_WR_CONFIG_MAX_BDE];
2903 } request;
2904 struct {
2905 uint32_t actual_write_length;
2906 } response;
2907 } u;
2908};
2909
James Smartda0436e2009-05-22 14:51:39 -04002910/* mailbox queue entry structure */
2911struct lpfc_mqe {
2912 uint32_t word0;
2913#define lpfc_mqe_status_SHIFT 16
2914#define lpfc_mqe_status_MASK 0x0000FFFF
2915#define lpfc_mqe_status_WORD word0
2916#define lpfc_mqe_command_SHIFT 8
2917#define lpfc_mqe_command_MASK 0x000000FF
2918#define lpfc_mqe_command_WORD word0
2919 union {
2920 uint32_t mb_words[LPFC_SLI4_MB_WORD_COUNT - 1];
2921 /* sli4 mailbox commands */
2922 struct lpfc_mbx_sli4_config sli4_config;
2923 struct lpfc_mbx_init_vfi init_vfi;
2924 struct lpfc_mbx_reg_vfi reg_vfi;
2925 struct lpfc_mbx_reg_vfi unreg_vfi;
2926 struct lpfc_mbx_init_vpi init_vpi;
2927 struct lpfc_mbx_resume_rpi resume_rpi;
2928 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
2929 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
2930 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
James Smartecfd03c2010-02-12 14:41:27 -05002931 struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
James Smartda0436e2009-05-22 14:51:39 -04002932 struct lpfc_mbx_reg_fcfi reg_fcfi;
2933 struct lpfc_mbx_unreg_fcfi unreg_fcfi;
2934 struct lpfc_mbx_mq_create mq_create;
James Smartb19a0612010-04-06 14:48:51 -04002935 struct lpfc_mbx_mq_create_ext mq_create_ext;
James Smartda0436e2009-05-22 14:51:39 -04002936 struct lpfc_mbx_eq_create eq_create;
James Smart173edbb2012-06-12 13:54:50 -04002937 struct lpfc_mbx_modify_eq_delay eq_delay;
James Smartda0436e2009-05-22 14:51:39 -04002938 struct lpfc_mbx_cq_create cq_create;
2939 struct lpfc_mbx_wq_create wq_create;
2940 struct lpfc_mbx_rq_create rq_create;
2941 struct lpfc_mbx_mq_destroy mq_destroy;
2942 struct lpfc_mbx_eq_destroy eq_destroy;
2943 struct lpfc_mbx_cq_destroy cq_destroy;
2944 struct lpfc_mbx_wq_destroy wq_destroy;
2945 struct lpfc_mbx_rq_destroy rq_destroy;
James Smart6d368e52011-05-24 11:44:12 -04002946 struct lpfc_mbx_get_rsrc_extent_info rsrc_extent_info;
2947 struct lpfc_mbx_alloc_rsrc_extents alloc_rsrc_extents;
2948 struct lpfc_mbx_dealloc_rsrc_extents dealloc_rsrc_extents;
James Smartda0436e2009-05-22 14:51:39 -04002949 struct lpfc_mbx_post_sgl_pages post_sgl_pages;
2950 struct lpfc_mbx_nembed_cmd nembed_cmd;
2951 struct lpfc_mbx_read_rev read_rev;
2952 struct lpfc_mbx_read_vpi read_vpi;
2953 struct lpfc_mbx_read_config rd_config;
2954 struct lpfc_mbx_request_features req_ftrs;
2955 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
James Smart6669f9b2009-10-02 15:16:45 -04002956 struct lpfc_mbx_query_fw_cfg query_fw_cfg;
James Smart28baac72010-02-12 14:42:03 -05002957 struct lpfc_mbx_supp_pages supp_pages;
James Smartfedd3b72011-02-16 12:39:24 -05002958 struct lpfc_mbx_pc_sli4_params sli4_params;
2959 struct lpfc_mbx_get_sli4_parameters get_sli4_parameters;
James Smart7ad20aa2011-05-24 11:44:28 -04002960 struct lpfc_mbx_set_link_diag_state link_diag_state;
2961 struct lpfc_mbx_set_link_diag_loopback link_diag_loopback;
2962 struct lpfc_mbx_run_link_diag_test link_diag_test;
James Smart912e3ac2011-05-24 11:42:11 -04002963 struct lpfc_mbx_get_func_cfg get_func_cfg;
2964 struct lpfc_mbx_get_prof_cfg get_prof_cfg;
James Smart52d52442011-05-24 11:42:45 -04002965 struct lpfc_mbx_wr_object wr_object;
James Smartcd1c8302011-10-10 21:33:25 -04002966 struct lpfc_mbx_get_port_name get_port_name;
2967 struct lpfc_mbx_nop nop;
James Smartda0436e2009-05-22 14:51:39 -04002968 } un;
2969};
2970
2971struct lpfc_mcqe {
2972 uint32_t word0;
2973#define lpfc_mcqe_status_SHIFT 0
2974#define lpfc_mcqe_status_MASK 0x0000FFFF
2975#define lpfc_mcqe_status_WORD word0
2976#define lpfc_mcqe_ext_status_SHIFT 16
2977#define lpfc_mcqe_ext_status_MASK 0x0000FFFF
2978#define lpfc_mcqe_ext_status_WORD word0
2979 uint32_t mcqe_tag0;
2980 uint32_t mcqe_tag1;
2981 uint32_t trailer;
2982#define lpfc_trailer_valid_SHIFT 31
2983#define lpfc_trailer_valid_MASK 0x00000001
2984#define lpfc_trailer_valid_WORD trailer
2985#define lpfc_trailer_async_SHIFT 30
2986#define lpfc_trailer_async_MASK 0x00000001
2987#define lpfc_trailer_async_WORD trailer
2988#define lpfc_trailer_hpi_SHIFT 29
2989#define lpfc_trailer_hpi_MASK 0x00000001
2990#define lpfc_trailer_hpi_WORD trailer
2991#define lpfc_trailer_completed_SHIFT 28
2992#define lpfc_trailer_completed_MASK 0x00000001
2993#define lpfc_trailer_completed_WORD trailer
2994#define lpfc_trailer_consumed_SHIFT 27
2995#define lpfc_trailer_consumed_MASK 0x00000001
2996#define lpfc_trailer_consumed_WORD trailer
2997#define lpfc_trailer_type_SHIFT 16
2998#define lpfc_trailer_type_MASK 0x000000FF
2999#define lpfc_trailer_type_WORD trailer
3000#define lpfc_trailer_code_SHIFT 8
3001#define lpfc_trailer_code_MASK 0x000000FF
3002#define lpfc_trailer_code_WORD trailer
3003#define LPFC_TRAILER_CODE_LINK 0x1
3004#define LPFC_TRAILER_CODE_FCOE 0x2
3005#define LPFC_TRAILER_CODE_DCBX 0x3
James Smartb19a0612010-04-06 14:48:51 -04003006#define LPFC_TRAILER_CODE_GRP5 0x5
James Smart76a95d72010-11-20 23:11:48 -05003007#define LPFC_TRAILER_CODE_FC 0x10
James Smart70f3c072010-12-15 17:57:33 -05003008#define LPFC_TRAILER_CODE_SLI 0x11
James Smartda0436e2009-05-22 14:51:39 -04003009};
3010
3011struct lpfc_acqe_link {
3012 uint32_t word0;
3013#define lpfc_acqe_link_speed_SHIFT 24
3014#define lpfc_acqe_link_speed_MASK 0x000000FF
3015#define lpfc_acqe_link_speed_WORD word0
3016#define LPFC_ASYNC_LINK_SPEED_ZERO 0x0
3017#define LPFC_ASYNC_LINK_SPEED_10MBPS 0x1
3018#define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2
3019#define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3
3020#define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4
3021#define lpfc_acqe_link_duplex_SHIFT 16
3022#define lpfc_acqe_link_duplex_MASK 0x000000FF
3023#define lpfc_acqe_link_duplex_WORD word0
3024#define LPFC_ASYNC_LINK_DUPLEX_NONE 0x0
3025#define LPFC_ASYNC_LINK_DUPLEX_HALF 0x1
3026#define LPFC_ASYNC_LINK_DUPLEX_FULL 0x2
3027#define lpfc_acqe_link_status_SHIFT 8
3028#define lpfc_acqe_link_status_MASK 0x000000FF
3029#define lpfc_acqe_link_status_WORD word0
3030#define LPFC_ASYNC_LINK_STATUS_DOWN 0x0
3031#define LPFC_ASYNC_LINK_STATUS_UP 0x1
3032#define LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN 0x2
3033#define LPFC_ASYNC_LINK_STATUS_LOGICAL_UP 0x3
James Smart70f3c072010-12-15 17:57:33 -05003034#define lpfc_acqe_link_type_SHIFT 6
3035#define lpfc_acqe_link_type_MASK 0x00000003
3036#define lpfc_acqe_link_type_WORD word0
3037#define lpfc_acqe_link_number_SHIFT 0
3038#define lpfc_acqe_link_number_MASK 0x0000003F
3039#define lpfc_acqe_link_number_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04003040 uint32_t word1;
3041#define lpfc_acqe_link_fault_SHIFT 0
3042#define lpfc_acqe_link_fault_MASK 0x000000FF
3043#define lpfc_acqe_link_fault_WORD word1
3044#define LPFC_ASYNC_LINK_FAULT_NONE 0x0
3045#define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1
3046#define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2
James Smart70f3c072010-12-15 17:57:33 -05003047#define lpfc_acqe_logical_link_speed_SHIFT 16
3048#define lpfc_acqe_logical_link_speed_MASK 0x0000FFFF
3049#define lpfc_acqe_logical_link_speed_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04003050 uint32_t event_tag;
3051 uint32_t trailer;
James Smart70f3c072010-12-15 17:57:33 -05003052#define LPFC_LINK_EVENT_TYPE_PHYSICAL 0x0
3053#define LPFC_LINK_EVENT_TYPE_VIRTUAL 0x1
James Smartda0436e2009-05-22 14:51:39 -04003054};
3055
James Smart70f3c072010-12-15 17:57:33 -05003056struct lpfc_acqe_fip {
James Smart6669f9b2009-10-02 15:16:45 -04003057 uint32_t index;
James Smartda0436e2009-05-22 14:51:39 -04003058 uint32_t word1;
James Smart70f3c072010-12-15 17:57:33 -05003059#define lpfc_acqe_fip_fcf_count_SHIFT 0
3060#define lpfc_acqe_fip_fcf_count_MASK 0x0000FFFF
3061#define lpfc_acqe_fip_fcf_count_WORD word1
3062#define lpfc_acqe_fip_event_type_SHIFT 16
3063#define lpfc_acqe_fip_event_type_MASK 0x0000FFFF
3064#define lpfc_acqe_fip_event_type_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04003065 uint32_t event_tag;
3066 uint32_t trailer;
James Smart70f3c072010-12-15 17:57:33 -05003067#define LPFC_FIP_EVENT_TYPE_NEW_FCF 0x1
3068#define LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL 0x2
3069#define LPFC_FIP_EVENT_TYPE_FCF_DEAD 0x3
3070#define LPFC_FIP_EVENT_TYPE_CVL 0x4
3071#define LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD 0x5
James Smartda0436e2009-05-22 14:51:39 -04003072};
3073
3074struct lpfc_acqe_dcbx {
3075 uint32_t tlv_ttl;
3076 uint32_t reserved;
3077 uint32_t event_tag;
3078 uint32_t trailer;
3079};
3080
James Smartb19a0612010-04-06 14:48:51 -04003081struct lpfc_acqe_grp5 {
3082 uint32_t word0;
James Smart70f3c072010-12-15 17:57:33 -05003083#define lpfc_acqe_grp5_type_SHIFT 6
3084#define lpfc_acqe_grp5_type_MASK 0x00000003
3085#define lpfc_acqe_grp5_type_WORD word0
3086#define lpfc_acqe_grp5_number_SHIFT 0
3087#define lpfc_acqe_grp5_number_MASK 0x0000003F
3088#define lpfc_acqe_grp5_number_WORD word0
James Smartb19a0612010-04-06 14:48:51 -04003089 uint32_t word1;
3090#define lpfc_acqe_grp5_llink_spd_SHIFT 16
3091#define lpfc_acqe_grp5_llink_spd_MASK 0x0000FFFF
3092#define lpfc_acqe_grp5_llink_spd_WORD word1
3093 uint32_t event_tag;
3094 uint32_t trailer;
3095};
3096
James Smart70f3c072010-12-15 17:57:33 -05003097struct lpfc_acqe_fc_la {
3098 uint32_t word0;
3099#define lpfc_acqe_fc_la_speed_SHIFT 24
3100#define lpfc_acqe_fc_la_speed_MASK 0x000000FF
3101#define lpfc_acqe_fc_la_speed_WORD word0
3102#define LPFC_FC_LA_SPEED_UNKOWN 0x0
3103#define LPFC_FC_LA_SPEED_1G 0x1
3104#define LPFC_FC_LA_SPEED_2G 0x2
3105#define LPFC_FC_LA_SPEED_4G 0x4
3106#define LPFC_FC_LA_SPEED_8G 0x8
3107#define LPFC_FC_LA_SPEED_10G 0xA
3108#define LPFC_FC_LA_SPEED_16G 0x10
3109#define lpfc_acqe_fc_la_topology_SHIFT 16
3110#define lpfc_acqe_fc_la_topology_MASK 0x000000FF
3111#define lpfc_acqe_fc_la_topology_WORD word0
3112#define LPFC_FC_LA_TOP_UNKOWN 0x0
3113#define LPFC_FC_LA_TOP_P2P 0x1
3114#define LPFC_FC_LA_TOP_FCAL 0x2
3115#define LPFC_FC_LA_TOP_INTERNAL_LOOP 0x3
3116#define LPFC_FC_LA_TOP_SERDES_LOOP 0x4
3117#define lpfc_acqe_fc_la_att_type_SHIFT 8
3118#define lpfc_acqe_fc_la_att_type_MASK 0x000000FF
3119#define lpfc_acqe_fc_la_att_type_WORD word0
3120#define LPFC_FC_LA_TYPE_LINK_UP 0x1
3121#define LPFC_FC_LA_TYPE_LINK_DOWN 0x2
3122#define LPFC_FC_LA_TYPE_NO_HARD_ALPA 0x3
3123#define lpfc_acqe_fc_la_port_type_SHIFT 6
3124#define lpfc_acqe_fc_la_port_type_MASK 0x00000003
3125#define lpfc_acqe_fc_la_port_type_WORD word0
3126#define LPFC_LINK_TYPE_ETHERNET 0x0
3127#define LPFC_LINK_TYPE_FC 0x1
3128#define lpfc_acqe_fc_la_port_number_SHIFT 0
3129#define lpfc_acqe_fc_la_port_number_MASK 0x0000003F
3130#define lpfc_acqe_fc_la_port_number_WORD word0
3131 uint32_t word1;
3132#define lpfc_acqe_fc_la_llink_spd_SHIFT 16
3133#define lpfc_acqe_fc_la_llink_spd_MASK 0x0000FFFF
3134#define lpfc_acqe_fc_la_llink_spd_WORD word1
3135#define lpfc_acqe_fc_la_fault_SHIFT 0
3136#define lpfc_acqe_fc_la_fault_MASK 0x000000FF
3137#define lpfc_acqe_fc_la_fault_WORD word1
3138#define LPFC_FC_LA_FAULT_NONE 0x0
3139#define LPFC_FC_LA_FAULT_LOCAL 0x1
3140#define LPFC_FC_LA_FAULT_REMOTE 0x2
3141 uint32_t event_tag;
3142 uint32_t trailer;
3143#define LPFC_FC_LA_EVENT_TYPE_FC_LINK 0x1
3144#define LPFC_FC_LA_EVENT_TYPE_SHARED_LINK 0x2
3145};
3146
James Smart4b8bae02012-06-12 13:55:07 -04003147struct lpfc_acqe_misconfigured_event {
3148 struct {
3149 uint32_t word0;
3150#define lpfc_sli_misconfigured_port0_SHIFT 0
3151#define lpfc_sli_misconfigured_port0_MASK 0x000000FF
3152#define lpfc_sli_misconfigured_port0_WORD word0
3153#define lpfc_sli_misconfigured_port1_SHIFT 8
3154#define lpfc_sli_misconfigured_port1_MASK 0x000000FF
3155#define lpfc_sli_misconfigured_port1_WORD word0
3156#define lpfc_sli_misconfigured_port2_SHIFT 16
3157#define lpfc_sli_misconfigured_port2_MASK 0x000000FF
3158#define lpfc_sli_misconfigured_port2_WORD word0
3159#define lpfc_sli_misconfigured_port3_SHIFT 24
3160#define lpfc_sli_misconfigured_port3_MASK 0x000000FF
3161#define lpfc_sli_misconfigured_port3_WORD word0
3162 } theEvent;
3163#define LPFC_SLI_EVENT_STATUS_VALID 0x00
3164#define LPFC_SLI_EVENT_STATUS_NOT_PRESENT 0x01
3165#define LPFC_SLI_EVENT_STATUS_WRONG_TYPE 0x02
3166#define LPFC_SLI_EVENT_STATUS_UNSUPPORTED 0x03
3167};
3168
James Smart70f3c072010-12-15 17:57:33 -05003169struct lpfc_acqe_sli {
3170 uint32_t event_data1;
3171 uint32_t event_data2;
3172 uint32_t reserved;
3173 uint32_t trailer;
3174#define LPFC_SLI_EVENT_TYPE_PORT_ERROR 0x1
3175#define LPFC_SLI_EVENT_TYPE_OVER_TEMP 0x2
3176#define LPFC_SLI_EVENT_TYPE_NORM_TEMP 0x3
3177#define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4
3178#define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5
James Smart4b8bae02012-06-12 13:55:07 -04003179#define LPFC_SLI_EVENT_TYPE_MISCONFIGURED 0x9
James Smart70f3c072010-12-15 17:57:33 -05003180};
3181
James Smartda0436e2009-05-22 14:51:39 -04003182/*
3183 * Define the bootstrap mailbox (bmbx) region used to communicate
3184 * mailbox command between the host and port. The mailbox consists
3185 * of a payload area of 256 bytes and a completion queue of length
3186 * 16 bytes.
3187 */
3188struct lpfc_bmbx_create {
3189 struct lpfc_mqe mqe;
3190 struct lpfc_mcqe mcqe;
3191};
3192
3193#define SGL_ALIGN_SZ 64
3194#define SGL_PAGE_SIZE 4096
3195/* align SGL addr on a size boundary - adjust address up */
James Smart6d368e52011-05-24 11:44:12 -04003196#define NO_XRI 0xffff
James Smart5ffc2662009-11-18 15:39:44 -05003197
James Smartda0436e2009-05-22 14:51:39 -04003198struct wqe_common {
3199 uint32_t word6;
James Smart6669f9b2009-10-02 15:16:45 -04003200#define wqe_xri_tag_SHIFT 0
3201#define wqe_xri_tag_MASK 0x0000FFFF
3202#define wqe_xri_tag_WORD word6
James Smartda0436e2009-05-22 14:51:39 -04003203#define wqe_ctxt_tag_SHIFT 16
3204#define wqe_ctxt_tag_MASK 0x0000FFFF
3205#define wqe_ctxt_tag_WORD word6
3206 uint32_t word7;
James Smartf9bb2da2011-10-10 21:34:11 -04003207#define wqe_dif_SHIFT 0
3208#define wqe_dif_MASK 0x00000003
3209#define wqe_dif_WORD word7
James Smartda0436e2009-05-22 14:51:39 -04003210#define wqe_ct_SHIFT 2
3211#define wqe_ct_MASK 0x00000003
3212#define wqe_ct_WORD word7
3213#define wqe_status_SHIFT 4
3214#define wqe_status_MASK 0x0000000f
3215#define wqe_status_WORD word7
3216#define wqe_cmnd_SHIFT 8
3217#define wqe_cmnd_MASK 0x000000ff
3218#define wqe_cmnd_WORD word7
3219#define wqe_class_SHIFT 16
3220#define wqe_class_MASK 0x00000007
3221#define wqe_class_WORD word7
James Smartf9bb2da2011-10-10 21:34:11 -04003222#define wqe_ar_SHIFT 19
3223#define wqe_ar_MASK 0x00000001
3224#define wqe_ar_WORD word7
3225#define wqe_ag_SHIFT wqe_ar_SHIFT
3226#define wqe_ag_MASK wqe_ar_MASK
3227#define wqe_ag_WORD wqe_ar_WORD
James Smartda0436e2009-05-22 14:51:39 -04003228#define wqe_pu_SHIFT 20
3229#define wqe_pu_MASK 0x00000003
3230#define wqe_pu_WORD word7
3231#define wqe_erp_SHIFT 22
3232#define wqe_erp_MASK 0x00000001
3233#define wqe_erp_WORD word7
James Smartf9bb2da2011-10-10 21:34:11 -04003234#define wqe_conf_SHIFT wqe_erp_SHIFT
3235#define wqe_conf_MASK wqe_erp_MASK
3236#define wqe_conf_WORD wqe_erp_WORD
James Smartda0436e2009-05-22 14:51:39 -04003237#define wqe_lnk_SHIFT 23
3238#define wqe_lnk_MASK 0x00000001
3239#define wqe_lnk_WORD word7
3240#define wqe_tmo_SHIFT 24
3241#define wqe_tmo_MASK 0x000000ff
3242#define wqe_tmo_WORD word7
3243 uint32_t abort_tag; /* word 8 in WQE */
3244 uint32_t word9;
3245#define wqe_reqtag_SHIFT 0
3246#define wqe_reqtag_MASK 0x0000FFFF
3247#define wqe_reqtag_WORD word9
James Smartc31098c2011-04-16 11:03:33 -04003248#define wqe_temp_rpi_SHIFT 16
3249#define wqe_temp_rpi_MASK 0x0000FFFF
3250#define wqe_temp_rpi_WORD word9
James Smartda0436e2009-05-22 14:51:39 -04003251#define wqe_rcvoxid_SHIFT 16
James Smartf0d9bcc2010-10-22 11:07:09 -04003252#define wqe_rcvoxid_MASK 0x0000FFFF
3253#define wqe_rcvoxid_WORD word9
James Smartda0436e2009-05-22 14:51:39 -04003254 uint32_t word10;
James Smartf0d9bcc2010-10-22 11:07:09 -04003255#define wqe_ebde_cnt_SHIFT 0
James Smart2fcee4b2010-12-15 17:57:46 -05003256#define wqe_ebde_cnt_MASK 0x0000000f
James Smartf0d9bcc2010-10-22 11:07:09 -04003257#define wqe_ebde_cnt_WORD word10
3258#define wqe_lenloc_SHIFT 7
3259#define wqe_lenloc_MASK 0x00000003
3260#define wqe_lenloc_WORD word10
3261#define LPFC_WQE_LENLOC_NONE 0
3262#define LPFC_WQE_LENLOC_WORD3 1
3263#define LPFC_WQE_LENLOC_WORD12 2
3264#define LPFC_WQE_LENLOC_WORD4 3
3265#define wqe_qosd_SHIFT 9
3266#define wqe_qosd_MASK 0x00000001
3267#define wqe_qosd_WORD word10
3268#define wqe_xbl_SHIFT 11
3269#define wqe_xbl_MASK 0x00000001
3270#define wqe_xbl_WORD word10
3271#define wqe_iod_SHIFT 13
3272#define wqe_iod_MASK 0x00000001
3273#define wqe_iod_WORD word10
3274#define LPFC_WQE_IOD_WRITE 0
3275#define LPFC_WQE_IOD_READ 1
3276#define wqe_dbde_SHIFT 14
3277#define wqe_dbde_MASK 0x00000001
3278#define wqe_dbde_WORD word10
3279#define wqe_wqes_SHIFT 15
3280#define wqe_wqes_MASK 0x00000001
3281#define wqe_wqes_WORD word10
James Smartfedd3b72011-02-16 12:39:24 -05003282/* Note that this field overlaps above fields */
3283#define wqe_wqid_SHIFT 1
James Smart9589b0622011-04-16 11:03:17 -04003284#define wqe_wqid_MASK 0x00007fff
James Smartfedd3b72011-02-16 12:39:24 -05003285#define wqe_wqid_WORD word10
James Smartda0436e2009-05-22 14:51:39 -04003286#define wqe_pri_SHIFT 16
3287#define wqe_pri_MASK 0x00000007
3288#define wqe_pri_WORD word10
3289#define wqe_pv_SHIFT 19
3290#define wqe_pv_MASK 0x00000001
3291#define wqe_pv_WORD word10
3292#define wqe_xc_SHIFT 21
3293#define wqe_xc_MASK 0x00000001
3294#define wqe_xc_WORD word10
James Smartf9bb2da2011-10-10 21:34:11 -04003295#define wqe_sr_SHIFT 22
3296#define wqe_sr_MASK 0x00000001
3297#define wqe_sr_WORD word10
James Smartda0436e2009-05-22 14:51:39 -04003298#define wqe_ccpe_SHIFT 23
3299#define wqe_ccpe_MASK 0x00000001
3300#define wqe_ccpe_WORD word10
3301#define wqe_ccp_SHIFT 24
James Smartf0d9bcc2010-10-22 11:07:09 -04003302#define wqe_ccp_MASK 0x000000ff
3303#define wqe_ccp_WORD word10
James Smartda0436e2009-05-22 14:51:39 -04003304 uint32_t word11;
James Smartf0d9bcc2010-10-22 11:07:09 -04003305#define wqe_cmd_type_SHIFT 0
3306#define wqe_cmd_type_MASK 0x0000000f
3307#define wqe_cmd_type_WORD word11
3308#define wqe_els_id_SHIFT 4
3309#define wqe_els_id_MASK 0x00000003
3310#define wqe_els_id_WORD word11
3311#define LPFC_ELS_ID_FLOGI 3
3312#define LPFC_ELS_ID_FDISC 2
3313#define LPFC_ELS_ID_LOGO 1
3314#define LPFC_ELS_ID_DEFAULT 0
3315#define wqe_wqec_SHIFT 7
3316#define wqe_wqec_MASK 0x00000001
3317#define wqe_wqec_WORD word11
3318#define wqe_cqid_SHIFT 16
3319#define wqe_cqid_MASK 0x0000ffff
3320#define wqe_cqid_WORD word11
3321#define LPFC_WQE_CQ_ID_DEFAULT 0xffff
James Smartda0436e2009-05-22 14:51:39 -04003322};
3323
3324struct wqe_did {
3325 uint32_t word5;
3326#define wqe_els_did_SHIFT 0
3327#define wqe_els_did_MASK 0x00FFFFFF
3328#define wqe_els_did_WORD word5
James Smart6669f9b2009-10-02 15:16:45 -04003329#define wqe_xmit_bls_pt_SHIFT 28
3330#define wqe_xmit_bls_pt_MASK 0x00000003
3331#define wqe_xmit_bls_pt_WORD word5
James Smartda0436e2009-05-22 14:51:39 -04003332#define wqe_xmit_bls_ar_SHIFT 30
3333#define wqe_xmit_bls_ar_MASK 0x00000001
3334#define wqe_xmit_bls_ar_WORD word5
3335#define wqe_xmit_bls_xo_SHIFT 31
3336#define wqe_xmit_bls_xo_MASK 0x00000001
3337#define wqe_xmit_bls_xo_WORD word5
3338};
3339
James Smartf0d9bcc2010-10-22 11:07:09 -04003340struct lpfc_wqe_generic{
3341 struct ulp_bde64 bde;
3342 uint32_t word3;
3343 uint32_t word4;
3344 uint32_t word5;
3345 struct wqe_common wqe_com;
3346 uint32_t payload[4];
3347};
3348
James Smartda0436e2009-05-22 14:51:39 -04003349struct els_request64_wqe {
3350 struct ulp_bde64 bde;
3351 uint32_t payload_len;
3352 uint32_t word4;
3353#define els_req64_sid_SHIFT 0
3354#define els_req64_sid_MASK 0x00FFFFFF
3355#define els_req64_sid_WORD word4
3356#define els_req64_sp_SHIFT 24
3357#define els_req64_sp_MASK 0x00000001
3358#define els_req64_sp_WORD word4
3359#define els_req64_vf_SHIFT 25
3360#define els_req64_vf_MASK 0x00000001
3361#define els_req64_vf_WORD word4
3362 struct wqe_did wqe_dest;
3363 struct wqe_common wqe_com; /* words 6-11 */
3364 uint32_t word12;
3365#define els_req64_vfid_SHIFT 1
3366#define els_req64_vfid_MASK 0x00000FFF
3367#define els_req64_vfid_WORD word12
3368#define els_req64_pri_SHIFT 13
3369#define els_req64_pri_MASK 0x00000007
3370#define els_req64_pri_WORD word12
3371 uint32_t word13;
3372#define els_req64_hopcnt_SHIFT 24
3373#define els_req64_hopcnt_MASK 0x000000ff
3374#define els_req64_hopcnt_WORD word13
3375 uint32_t reserved[2];
3376};
3377
3378struct xmit_els_rsp64_wqe {
3379 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003380 uint32_t response_payload_len;
James Smart939723a2012-05-09 21:19:03 -04003381 uint32_t word4;
3382#define els_rsp64_sid_SHIFT 0
3383#define els_rsp64_sid_MASK 0x00FFFFFF
3384#define els_rsp64_sid_WORD word4
3385#define els_rsp64_sp_SHIFT 24
3386#define els_rsp64_sp_MASK 0x00000001
3387#define els_rsp64_sp_WORD word4
James Smartf0d9bcc2010-10-22 11:07:09 -04003388 struct wqe_did wqe_dest;
James Smartda0436e2009-05-22 14:51:39 -04003389 struct wqe_common wqe_com; /* words 6-11 */
James Smartc31098c2011-04-16 11:03:33 -04003390 uint32_t word12;
3391#define wqe_rsp_temp_rpi_SHIFT 0
3392#define wqe_rsp_temp_rpi_MASK 0x0000FFFF
3393#define wqe_rsp_temp_rpi_WORD word12
3394 uint32_t rsvd_13_15[3];
James Smartda0436e2009-05-22 14:51:39 -04003395};
3396
3397struct xmit_bls_rsp64_wqe {
3398 uint32_t payload0;
James Smart6669f9b2009-10-02 15:16:45 -04003399/* Payload0 for BA_ACC */
3400#define xmit_bls_rsp64_acc_seq_id_SHIFT 16
3401#define xmit_bls_rsp64_acc_seq_id_MASK 0x000000ff
3402#define xmit_bls_rsp64_acc_seq_id_WORD payload0
3403#define xmit_bls_rsp64_acc_seq_id_vald_SHIFT 24
3404#define xmit_bls_rsp64_acc_seq_id_vald_MASK 0x000000ff
3405#define xmit_bls_rsp64_acc_seq_id_vald_WORD payload0
3406/* Payload0 for BA_RJT */
3407#define xmit_bls_rsp64_rjt_vspec_SHIFT 0
3408#define xmit_bls_rsp64_rjt_vspec_MASK 0x000000ff
3409#define xmit_bls_rsp64_rjt_vspec_WORD payload0
3410#define xmit_bls_rsp64_rjt_expc_SHIFT 8
3411#define xmit_bls_rsp64_rjt_expc_MASK 0x000000ff
3412#define xmit_bls_rsp64_rjt_expc_WORD payload0
3413#define xmit_bls_rsp64_rjt_rsnc_SHIFT 16
3414#define xmit_bls_rsp64_rjt_rsnc_MASK 0x000000ff
3415#define xmit_bls_rsp64_rjt_rsnc_WORD payload0
James Smartda0436e2009-05-22 14:51:39 -04003416 uint32_t word1;
3417#define xmit_bls_rsp64_rxid_SHIFT 0
3418#define xmit_bls_rsp64_rxid_MASK 0x0000ffff
3419#define xmit_bls_rsp64_rxid_WORD word1
3420#define xmit_bls_rsp64_oxid_SHIFT 16
3421#define xmit_bls_rsp64_oxid_MASK 0x0000ffff
3422#define xmit_bls_rsp64_oxid_WORD word1
3423 uint32_t word2;
James Smart6669f9b2009-10-02 15:16:45 -04003424#define xmit_bls_rsp64_seqcnthi_SHIFT 0
James Smartda0436e2009-05-22 14:51:39 -04003425#define xmit_bls_rsp64_seqcnthi_MASK 0x0000ffff
3426#define xmit_bls_rsp64_seqcnthi_WORD word2
James Smart6669f9b2009-10-02 15:16:45 -04003427#define xmit_bls_rsp64_seqcntlo_SHIFT 16
3428#define xmit_bls_rsp64_seqcntlo_MASK 0x0000ffff
3429#define xmit_bls_rsp64_seqcntlo_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04003430 uint32_t rsrvd3;
3431 uint32_t rsrvd4;
3432 struct wqe_did wqe_dest;
3433 struct wqe_common wqe_com; /* words 6-11 */
James Smart6b5151f2012-01-18 16:24:06 -05003434 uint32_t word12;
3435#define xmit_bls_rsp64_temprpi_SHIFT 0
3436#define xmit_bls_rsp64_temprpi_MASK 0x0000ffff
3437#define xmit_bls_rsp64_temprpi_WORD word12
3438 uint32_t rsvd_13_15[3];
James Smartda0436e2009-05-22 14:51:39 -04003439};
James Smart6669f9b2009-10-02 15:16:45 -04003440
James Smartda0436e2009-05-22 14:51:39 -04003441struct wqe_rctl_dfctl {
3442 uint32_t word5;
3443#define wqe_si_SHIFT 2
3444#define wqe_si_MASK 0x000000001
3445#define wqe_si_WORD word5
3446#define wqe_la_SHIFT 3
3447#define wqe_la_MASK 0x000000001
3448#define wqe_la_WORD word5
James Smart1b511972011-12-13 13:23:09 -05003449#define wqe_xo_SHIFT 6
3450#define wqe_xo_MASK 0x000000001
3451#define wqe_xo_WORD word5
James Smartda0436e2009-05-22 14:51:39 -04003452#define wqe_ls_SHIFT 7
3453#define wqe_ls_MASK 0x000000001
3454#define wqe_ls_WORD word5
3455#define wqe_dfctl_SHIFT 8
3456#define wqe_dfctl_MASK 0x0000000ff
3457#define wqe_dfctl_WORD word5
3458#define wqe_type_SHIFT 16
3459#define wqe_type_MASK 0x0000000ff
3460#define wqe_type_WORD word5
3461#define wqe_rctl_SHIFT 24
3462#define wqe_rctl_MASK 0x0000000ff
3463#define wqe_rctl_WORD word5
3464};
3465
3466struct xmit_seq64_wqe {
3467 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003468 uint32_t rsvd3;
James Smartda0436e2009-05-22 14:51:39 -04003469 uint32_t relative_offset;
3470 struct wqe_rctl_dfctl wge_ctl;
3471 struct wqe_common wqe_com; /* words 6-11 */
James Smartda0436e2009-05-22 14:51:39 -04003472 uint32_t xmit_len;
3473 uint32_t rsvd_12_15[3];
3474};
3475struct xmit_bcast64_wqe {
3476 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003477 uint32_t seq_payload_len;
James Smartda0436e2009-05-22 14:51:39 -04003478 uint32_t rsvd4;
3479 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3480 struct wqe_common wqe_com; /* words 6-11 */
3481 uint32_t rsvd_12_15[4];
3482};
3483
3484struct gen_req64_wqe {
3485 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003486 uint32_t request_payload_len;
3487 uint32_t relative_offset;
James Smartda0436e2009-05-22 14:51:39 -04003488 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3489 struct wqe_common wqe_com; /* words 6-11 */
3490 uint32_t rsvd_12_15[4];
3491};
3492
3493struct create_xri_wqe {
3494 uint32_t rsrvd[5]; /* words 0-4 */
3495 struct wqe_did wqe_dest; /* word 5 */
3496 struct wqe_common wqe_com; /* words 6-11 */
3497 uint32_t rsvd_12_15[4]; /* word 12-15 */
3498};
3499
3500#define T_REQUEST_TAG 3
3501#define T_XRI_TAG 1
3502
3503struct abort_cmd_wqe {
3504 uint32_t rsrvd[3];
3505 uint32_t word3;
3506#define abort_cmd_ia_SHIFT 0
3507#define abort_cmd_ia_MASK 0x000000001
3508#define abort_cmd_ia_WORD word3
3509#define abort_cmd_criteria_SHIFT 8
3510#define abort_cmd_criteria_MASK 0x0000000ff
3511#define abort_cmd_criteria_WORD word3
3512 uint32_t rsrvd4;
3513 uint32_t rsrvd5;
3514 struct wqe_common wqe_com; /* words 6-11 */
3515 uint32_t rsvd_12_15[4]; /* word 12-15 */
3516};
3517
3518struct fcp_iwrite64_wqe {
3519 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003520 uint32_t payload_offset_len;
James Smartda0436e2009-05-22 14:51:39 -04003521 uint32_t total_xfer_len;
3522 uint32_t initial_xfer_len;
3523 struct wqe_common wqe_com; /* words 6-11 */
James Smartfedd3b72011-02-16 12:39:24 -05003524 uint32_t rsrvd12;
3525 struct ulp_bde64 ph_bde; /* words 13-15 */
James Smartda0436e2009-05-22 14:51:39 -04003526};
3527
3528struct fcp_iread64_wqe {
3529 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003530 uint32_t payload_offset_len; /* word 3 */
James Smartda0436e2009-05-22 14:51:39 -04003531 uint32_t total_xfer_len; /* word 4 */
3532 uint32_t rsrvd5; /* word 5 */
3533 struct wqe_common wqe_com; /* words 6-11 */
James Smartfedd3b72011-02-16 12:39:24 -05003534 uint32_t rsrvd12;
3535 struct ulp_bde64 ph_bde; /* words 13-15 */
James Smartda0436e2009-05-22 14:51:39 -04003536};
3537
3538struct fcp_icmnd64_wqe {
James Smartf0d9bcc2010-10-22 11:07:09 -04003539 struct ulp_bde64 bde; /* words 0-2 */
3540 uint32_t rsrvd3; /* word 3 */
3541 uint32_t rsrvd4; /* word 4 */
3542 uint32_t rsrvd5; /* word 5 */
James Smartda0436e2009-05-22 14:51:39 -04003543 struct wqe_common wqe_com; /* words 6-11 */
James Smartf0d9bcc2010-10-22 11:07:09 -04003544 uint32_t rsvd_12_15[4]; /* word 12-15 */
James Smartda0436e2009-05-22 14:51:39 -04003545};
3546
3547
3548union lpfc_wqe {
3549 uint32_t words[16];
3550 struct lpfc_wqe_generic generic;
3551 struct fcp_icmnd64_wqe fcp_icmd;
3552 struct fcp_iread64_wqe fcp_iread;
3553 struct fcp_iwrite64_wqe fcp_iwrite;
3554 struct abort_cmd_wqe abort_cmd;
3555 struct create_xri_wqe create_xri;
3556 struct xmit_bcast64_wqe xmit_bcast64;
3557 struct xmit_seq64_wqe xmit_sequence;
3558 struct xmit_bls_rsp64_wqe xmit_bls_rsp;
3559 struct xmit_els_rsp64_wqe xmit_els_rsp;
3560 struct els_request64_wqe els_req;
3561 struct gen_req64_wqe gen_req;
3562};
3563
James Smart52d52442011-05-24 11:42:45 -04003564#define LPFC_GROUP_OJECT_MAGIC_NUM 0xfeaa0001
3565#define LPFC_FILE_TYPE_GROUP 0xf7
3566#define LPFC_FILE_ID_GROUP 0xa2
3567struct lpfc_grp_hdr {
3568 uint32_t size;
3569 uint32_t magic_number;
3570 uint32_t word2;
3571#define lpfc_grp_hdr_file_type_SHIFT 24
3572#define lpfc_grp_hdr_file_type_MASK 0x000000FF
3573#define lpfc_grp_hdr_file_type_WORD word2
3574#define lpfc_grp_hdr_id_SHIFT 16
3575#define lpfc_grp_hdr_id_MASK 0x000000FF
3576#define lpfc_grp_hdr_id_WORD word2
3577 uint8_t rev_name[128];
James Smart88a2cfb2011-07-22 18:36:33 -04003578 uint8_t date[12];
3579 uint8_t revision[32];
James Smart52d52442011-05-24 11:42:45 -04003580};
3581
James Smartda0436e2009-05-22 14:51:39 -04003582#define FCP_COMMAND 0x0
3583#define FCP_COMMAND_DATA_OUT 0x1
3584#define ELS_COMMAND_NON_FIP 0xC
3585#define ELS_COMMAND_FIP 0xD
3586#define OTHER_COMMAND 0x8
3587
James Smart52d52442011-05-24 11:42:45 -04003588#define LPFC_FW_DUMP 1
3589#define LPFC_FW_RESET 2
3590#define LPFC_DV_RESET 3