Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1 | /* |
| 2 | * intel_idle.c - native hardware idle loop for modern Intel processors |
| 3 | * |
| 4 | * Copyright (c) 2010, Intel Corporation. |
| 5 | * Len Brown <len.brown@intel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms and conditions of the GNU General Public License, |
| 9 | * version 2, as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * intel_idle is a cpuidle driver that loads on specific Intel processors |
| 23 | * in lieu of the legacy ACPI processor_idle driver. The intent is to |
| 24 | * make Linux more efficient on these processors, as intel_idle knows |
| 25 | * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * Design Assumptions |
| 30 | * |
| 31 | * All CPUs have same idle states as boot CPU |
| 32 | * |
| 33 | * Chipset BM_STS (bus master status) bit is a NOP |
| 34 | * for preventing entry into deep C-stats |
| 35 | */ |
| 36 | |
| 37 | /* |
| 38 | * Known limitations |
| 39 | * |
| 40 | * The driver currently initializes for_each_online_cpu() upon modprobe. |
| 41 | * It it unaware of subsequent processors hot-added to the system. |
| 42 | * This means that if you boot with maxcpus=n and later online |
| 43 | * processors above n, those processors will use C1 only. |
| 44 | * |
| 45 | * ACPI has a .suspend hack to turn off deep c-statees during suspend |
| 46 | * to avoid complications with the lapic timer workaround. |
| 47 | * Have not seen issues with suspend, but may need same workaround here. |
| 48 | * |
| 49 | * There is currently no kernel-based automatic probing/loading mechanism |
| 50 | * if the driver is built as a module. |
| 51 | */ |
| 52 | |
| 53 | /* un-comment DEBUG to enable pr_debug() statements */ |
| 54 | #define DEBUG |
| 55 | |
| 56 | #include <linux/kernel.h> |
| 57 | #include <linux/cpuidle.h> |
| 58 | #include <linux/clockchips.h> |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 59 | #include <trace/events/power.h> |
| 60 | #include <linux/sched.h> |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 61 | #include <linux/notifier.h> |
| 62 | #include <linux/cpu.h> |
Paul Gortmaker | 7c52d55 | 2011-05-27 12:33:10 -0400 | [diff] [blame] | 63 | #include <linux/module.h> |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 64 | #include <asm/cpu_device_id.h> |
H. Peter Anvin | bc83ccc | 2010-09-17 15:36:40 -0700 | [diff] [blame] | 65 | #include <asm/mwait.h> |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 66 | #include <asm/msr.h> |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 67 | |
| 68 | #define INTEL_IDLE_VERSION "0.4" |
| 69 | #define PREFIX "intel_idle: " |
| 70 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 71 | static struct cpuidle_driver intel_idle_driver = { |
| 72 | .name = "intel_idle", |
| 73 | .owner = THIS_MODULE, |
Julius Werner | a474a51 | 2012-11-27 14:17:58 +0100 | [diff] [blame] | 74 | .en_core_tk_irqen = 1, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 75 | }; |
| 76 | /* intel_idle.max_cstate=0 disables driver */ |
| 77 | static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 78 | |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 79 | static unsigned int mwait_substates; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 80 | |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 81 | #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 82 | /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 83 | static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 84 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 85 | struct idle_cpu { |
| 86 | struct cpuidle_state *state_table; |
| 87 | |
| 88 | /* |
| 89 | * Hardware C-state auto-demotion may not always be optimal. |
| 90 | * Indicate which enable bits to clear here. |
| 91 | */ |
| 92 | unsigned long auto_demotion_disable_flags; |
| 93 | }; |
| 94 | |
| 95 | static const struct idle_cpu *icpu; |
Namhyung Kim | 3265eba | 2010-08-08 03:10:03 +0900 | [diff] [blame] | 96 | static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 97 | static int intel_idle(struct cpuidle_device *dev, |
| 98 | struct cpuidle_driver *drv, int index); |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 99 | static int intel_idle_cpu_init(int cpu); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 100 | |
| 101 | static struct cpuidle_state *cpuidle_state_table; |
| 102 | |
| 103 | /* |
Len Brown | 956d033 | 2011-01-12 02:51:20 -0500 | [diff] [blame] | 104 | * Set this flag for states where the HW flushes the TLB for us |
| 105 | * and so we don't need cross-calls to keep it consistent. |
| 106 | * If this flag is set, SW flushes the TLB, so even if the |
| 107 | * HW doesn't do the flushing, this flag is safe to use. |
| 108 | */ |
| 109 | #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000 |
| 110 | |
| 111 | /* |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 112 | * MWAIT takes an 8-bit "hint" in EAX "suggesting" |
| 113 | * the C-state (top nibble) and sub-state (bottom nibble) |
| 114 | * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc. |
| 115 | * |
| 116 | * We store the hint at the top of our "flags" for each state. |
| 117 | */ |
| 118 | #define flg2MWAIT(flags) (((flags) >> 24) & 0xFF) |
| 119 | #define MWAIT2flg(eax) ((eax & 0xFF) << 24) |
| 120 | |
| 121 | /* |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 122 | * States are indexed by the cstate number, |
| 123 | * which is also the index into the MWAIT hint array. |
| 124 | * Thus C0 is a dummy. |
| 125 | */ |
| 126 | static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { |
| 127 | { /* MWAIT C0 */ }, |
| 128 | { /* MWAIT C1 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 129 | .name = "C1-NHM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 130 | .desc = "MWAIT 0x00", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 131 | .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 132 | .exit_latency = 3, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 133 | .target_residency = 6, |
| 134 | .enter = &intel_idle }, |
| 135 | { /* MWAIT C2 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 136 | .name = "C3-NHM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 137 | .desc = "MWAIT 0x10", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 138 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 139 | .exit_latency = 20, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 140 | .target_residency = 80, |
| 141 | .enter = &intel_idle }, |
| 142 | { /* MWAIT C3 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 143 | .name = "C6-NHM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 144 | .desc = "MWAIT 0x20", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 145 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 146 | .exit_latency = 200, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 147 | .target_residency = 800, |
| 148 | .enter = &intel_idle }, |
| 149 | }; |
| 150 | |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 151 | static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { |
| 152 | { /* MWAIT C0 */ }, |
| 153 | { /* MWAIT C1 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 154 | .name = "C1-SNB", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 155 | .desc = "MWAIT 0x00", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 156 | .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 157 | .exit_latency = 1, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 158 | .target_residency = 1, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 159 | .enter = &intel_idle }, |
| 160 | { /* MWAIT C2 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 161 | .name = "C3-SNB", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 162 | .desc = "MWAIT 0x10", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 163 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 164 | .exit_latency = 80, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 165 | .target_residency = 211, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 166 | .enter = &intel_idle }, |
| 167 | { /* MWAIT C3 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 168 | .name = "C6-SNB", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 169 | .desc = "MWAIT 0x20", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 170 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 171 | .exit_latency = 104, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 172 | .target_residency = 345, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 173 | .enter = &intel_idle }, |
| 174 | { /* MWAIT C4 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 175 | .name = "C7-SNB", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 176 | .desc = "MWAIT 0x30", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 177 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 178 | .exit_latency = 109, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 179 | .target_residency = 345, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 180 | .enter = &intel_idle }, |
| 181 | }; |
| 182 | |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 183 | static struct cpuidle_state ivb_cstates[MWAIT_MAX_NUM_CSTATES] = { |
| 184 | { /* MWAIT C0 */ }, |
| 185 | { /* MWAIT C1 */ |
| 186 | .name = "C1-IVB", |
| 187 | .desc = "MWAIT 0x00", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 188 | .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 189 | .exit_latency = 1, |
| 190 | .target_residency = 1, |
| 191 | .enter = &intel_idle }, |
| 192 | { /* MWAIT C2 */ |
| 193 | .name = "C3-IVB", |
| 194 | .desc = "MWAIT 0x10", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 195 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 196 | .exit_latency = 59, |
| 197 | .target_residency = 156, |
| 198 | .enter = &intel_idle }, |
| 199 | { /* MWAIT C3 */ |
| 200 | .name = "C6-IVB", |
| 201 | .desc = "MWAIT 0x20", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 202 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 203 | .exit_latency = 80, |
| 204 | .target_residency = 300, |
| 205 | .enter = &intel_idle }, |
| 206 | { /* MWAIT C4 */ |
| 207 | .name = "C7-IVB", |
| 208 | .desc = "MWAIT 0x30", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 209 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 210 | .exit_latency = 87, |
| 211 | .target_residency = 300, |
| 212 | .enter = &intel_idle }, |
| 213 | }; |
| 214 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 215 | static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { |
| 216 | { /* MWAIT C0 */ }, |
| 217 | { /* MWAIT C1 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 218 | .name = "C1-ATM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 219 | .desc = "MWAIT 0x00", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 220 | .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 221 | .exit_latency = 1, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 222 | .target_residency = 4, |
| 223 | .enter = &intel_idle }, |
| 224 | { /* MWAIT C2 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 225 | .name = "C2-ATM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 226 | .desc = "MWAIT 0x10", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 227 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 228 | .exit_latency = 20, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 229 | .target_residency = 80, |
| 230 | .enter = &intel_idle }, |
| 231 | { /* MWAIT C3 */ }, |
| 232 | { /* MWAIT C4 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 233 | .name = "C4-ATM", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 234 | .desc = "MWAIT 0x30", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 235 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 236 | .exit_latency = 100, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 237 | .target_residency = 400, |
| 238 | .enter = &intel_idle }, |
| 239 | { /* MWAIT C5 */ }, |
| 240 | { /* MWAIT C6 */ |
Thomas Renninger | 15e123e | 2011-02-27 22:36:43 +0100 | [diff] [blame] | 241 | .name = "C6-ATM", |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 242 | .desc = "MWAIT 0x52", |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 243 | .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 244 | .exit_latency = 140, |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 245 | .target_residency = 560, |
| 246 | .enter = &intel_idle }, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 247 | }; |
| 248 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 249 | /** |
| 250 | * intel_idle |
| 251 | * @dev: cpuidle_device |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 252 | * @drv: cpuidle driver |
Deepthi Dharwar | e978aa7 | 2011-10-28 16:20:09 +0530 | [diff] [blame] | 253 | * @index: index of cpuidle state |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 254 | * |
Yanmin Zhang | 63ff07b | 2012-01-10 15:48:21 -0800 | [diff] [blame] | 255 | * Must be called under local_irq_disable(). |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 256 | */ |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 257 | static int intel_idle(struct cpuidle_device *dev, |
| 258 | struct cpuidle_driver *drv, int index) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 259 | { |
| 260 | unsigned long ecx = 1; /* break on interrupt flag */ |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 261 | struct cpuidle_state *state = &drv->states[index]; |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame^] | 262 | unsigned long eax = flg2MWAIT(state->flags); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 263 | unsigned int cstate; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 264 | int cpu = smp_processor_id(); |
| 265 | |
| 266 | cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; |
| 267 | |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 268 | /* |
Len Brown | c8381cc | 2010-10-15 20:43:06 -0400 | [diff] [blame] | 269 | * leave_mm() to avoid costly and often unnecessary wakeups |
| 270 | * for flushing the user TLB's associated with the active mm. |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 271 | */ |
Len Brown | c8381cc | 2010-10-15 20:43:06 -0400 | [diff] [blame] | 272 | if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 273 | leave_mm(cpu); |
| 274 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 275 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) |
| 276 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); |
| 277 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 278 | stop_critical_timings(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 279 | if (!need_resched()) { |
| 280 | |
| 281 | __monitor((void *)¤t_thread_info()->flags, 0, 0); |
| 282 | smp_mb(); |
| 283 | if (!need_resched()) |
| 284 | __mwait(eax, ecx); |
| 285 | } |
| 286 | |
| 287 | start_critical_timings(); |
| 288 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 289 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) |
| 290 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); |
| 291 | |
Deepthi Dharwar | e978aa7 | 2011-10-28 16:20:09 +0530 | [diff] [blame] | 292 | return index; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 293 | } |
| 294 | |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 295 | static void __setup_broadcast_timer(void *arg) |
| 296 | { |
| 297 | unsigned long reason = (unsigned long)arg; |
| 298 | int cpu = smp_processor_id(); |
| 299 | |
| 300 | reason = reason ? |
| 301 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; |
| 302 | |
| 303 | clockevents_notify(reason, &cpu); |
| 304 | } |
| 305 | |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 306 | static int cpu_hotplug_notify(struct notifier_block *n, |
| 307 | unsigned long action, void *hcpu) |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 308 | { |
| 309 | int hotcpu = (unsigned long)hcpu; |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 310 | struct cpuidle_device *dev; |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 311 | |
| 312 | switch (action & 0xf) { |
| 313 | case CPU_ONLINE: |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 314 | |
| 315 | if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) |
| 316 | smp_call_function_single(hotcpu, __setup_broadcast_timer, |
| 317 | (void *)true, 1); |
| 318 | |
| 319 | /* |
| 320 | * Some systems can hotplug a cpu at runtime after |
| 321 | * the kernel has booted, we have to initialize the |
| 322 | * driver in this case |
| 323 | */ |
| 324 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu); |
| 325 | if (!dev->registered) |
| 326 | intel_idle_cpu_init(hotcpu); |
| 327 | |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 328 | break; |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 329 | } |
| 330 | return NOTIFY_OK; |
| 331 | } |
| 332 | |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 333 | static struct notifier_block cpu_hotplug_notifier = { |
| 334 | .notifier_call = cpu_hotplug_notify, |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 335 | }; |
| 336 | |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 337 | static void auto_demotion_disable(void *dummy) |
| 338 | { |
| 339 | unsigned long long msr_bits; |
| 340 | |
| 341 | rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 342 | msr_bits &= ~(icpu->auto_demotion_disable_flags); |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 343 | wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); |
| 344 | } |
| 345 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 346 | static const struct idle_cpu idle_cpu_nehalem = { |
| 347 | .state_table = nehalem_cstates, |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 348 | .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE, |
| 349 | }; |
| 350 | |
| 351 | static const struct idle_cpu idle_cpu_atom = { |
| 352 | .state_table = atom_cstates, |
| 353 | }; |
| 354 | |
| 355 | static const struct idle_cpu idle_cpu_lincroft = { |
| 356 | .state_table = atom_cstates, |
| 357 | .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE, |
| 358 | }; |
| 359 | |
| 360 | static const struct idle_cpu idle_cpu_snb = { |
| 361 | .state_table = snb_cstates, |
| 362 | }; |
| 363 | |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 364 | static const struct idle_cpu idle_cpu_ivb = { |
| 365 | .state_table = ivb_cstates, |
| 366 | }; |
| 367 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 368 | #define ICPU(model, cpu) \ |
| 369 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } |
| 370 | |
| 371 | static const struct x86_cpu_id intel_idle_ids[] = { |
| 372 | ICPU(0x1a, idle_cpu_nehalem), |
| 373 | ICPU(0x1e, idle_cpu_nehalem), |
| 374 | ICPU(0x1f, idle_cpu_nehalem), |
Ben Hutchings | 8bf1193 | 2012-02-16 04:13:14 +0000 | [diff] [blame] | 375 | ICPU(0x25, idle_cpu_nehalem), |
| 376 | ICPU(0x2c, idle_cpu_nehalem), |
| 377 | ICPU(0x2e, idle_cpu_nehalem), |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 378 | ICPU(0x1c, idle_cpu_atom), |
| 379 | ICPU(0x26, idle_cpu_lincroft), |
Ben Hutchings | 8bf1193 | 2012-02-16 04:13:14 +0000 | [diff] [blame] | 380 | ICPU(0x2f, idle_cpu_nehalem), |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 381 | ICPU(0x2a, idle_cpu_snb), |
| 382 | ICPU(0x2d, idle_cpu_snb), |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 383 | ICPU(0x3a, idle_cpu_ivb), |
Len Brown | 23795e5 | 2012-09-26 22:28:21 -0400 | [diff] [blame] | 384 | ICPU(0x3e, idle_cpu_ivb), |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 385 | {} |
| 386 | }; |
| 387 | MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); |
| 388 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 389 | /* |
| 390 | * intel_idle_probe() |
| 391 | */ |
| 392 | static int intel_idle_probe(void) |
| 393 | { |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 394 | unsigned int eax, ebx, ecx; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 395 | const struct x86_cpu_id *id; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 396 | |
| 397 | if (max_cstate == 0) { |
| 398 | pr_debug(PREFIX "disabled\n"); |
| 399 | return -EPERM; |
| 400 | } |
| 401 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 402 | id = x86_match_cpu(intel_idle_ids); |
| 403 | if (!id) { |
| 404 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && |
| 405 | boot_cpu_data.x86 == 6) |
| 406 | pr_debug(PREFIX "does not run on family %d model %d\n", |
| 407 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 408 | return -ENODEV; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 409 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 410 | |
| 411 | if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) |
| 412 | return -ENODEV; |
| 413 | |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 414 | cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 415 | |
| 416 | if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) || |
Thomas Renninger | 5c2a9f0 | 2011-12-04 22:17:29 +0100 | [diff] [blame] | 417 | !(ecx & CPUID5_ECX_INTERRUPT_BREAK) || |
| 418 | !mwait_substates) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 419 | return -ENODEV; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 420 | |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 421 | pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 422 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 423 | icpu = (const struct idle_cpu *)id->driver_data; |
| 424 | cpuidle_state_table = icpu->state_table; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 425 | |
Len Brown | 56b9aea | 2010-12-02 01:19:32 -0500 | [diff] [blame] | 426 | if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 427 | lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 428 | else |
Shaohua Li | 39a74fd | 2012-01-10 15:48:19 -0800 | [diff] [blame] | 429 | on_each_cpu(__setup_broadcast_timer, (void *)true, 1); |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 430 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 431 | pr_debug(PREFIX "v" INTEL_IDLE_VERSION |
| 432 | " model 0x%X\n", boot_cpu_data.x86_model); |
| 433 | |
| 434 | pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n", |
| 435 | lapic_timer_reliable_states); |
| 436 | return 0; |
| 437 | } |
| 438 | |
| 439 | /* |
| 440 | * intel_idle_cpuidle_devices_uninit() |
| 441 | * unregister, free cpuidle_devices |
| 442 | */ |
| 443 | static void intel_idle_cpuidle_devices_uninit(void) |
| 444 | { |
| 445 | int i; |
| 446 | struct cpuidle_device *dev; |
| 447 | |
| 448 | for_each_online_cpu(i) { |
| 449 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); |
| 450 | cpuidle_unregister_device(dev); |
| 451 | } |
| 452 | |
| 453 | free_percpu(intel_idle_cpuidle_devices); |
| 454 | return; |
| 455 | } |
| 456 | /* |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 457 | * intel_idle_cpuidle_driver_init() |
| 458 | * allocate, initialize cpuidle_states |
| 459 | */ |
| 460 | static int intel_idle_cpuidle_driver_init(void) |
| 461 | { |
| 462 | int cstate; |
| 463 | struct cpuidle_driver *drv = &intel_idle_driver; |
| 464 | |
| 465 | drv->state_count = 1; |
| 466 | |
| 467 | for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { |
| 468 | int num_substates; |
| 469 | |
| 470 | if (cstate > max_cstate) { |
| 471 | printk(PREFIX "max_cstate %d reached\n", |
| 472 | max_cstate); |
| 473 | break; |
| 474 | } |
| 475 | |
| 476 | /* does the state exist in CPUID.MWAIT? */ |
| 477 | num_substates = (mwait_substates >> ((cstate) * 4)) |
| 478 | & MWAIT_SUBSTATE_MASK; |
| 479 | if (num_substates == 0) |
| 480 | continue; |
| 481 | /* is the state not enabled? */ |
| 482 | if (cpuidle_state_table[cstate].enter == NULL) { |
| 483 | /* does the driver not know about the state? */ |
| 484 | if (*cpuidle_state_table[cstate].name == '\0') |
| 485 | pr_debug(PREFIX "unaware of model 0x%x" |
| 486 | " MWAIT %d please" |
Youquan Song | 17915d5 | 2012-12-18 13:54:22 +0100 | [diff] [blame] | 487 | " contact lenb@kernel.org\n", |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 488 | boot_cpu_data.x86_model, cstate); |
| 489 | continue; |
| 490 | } |
| 491 | |
| 492 | if ((cstate > 2) && |
| 493 | !boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
| 494 | mark_tsc_unstable("TSC halts in idle" |
| 495 | " states deeper than C2"); |
| 496 | |
| 497 | drv->states[drv->state_count] = /* structure copy */ |
| 498 | cpuidle_state_table[cstate]; |
| 499 | |
| 500 | drv->state_count += 1; |
| 501 | } |
| 502 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 503 | if (icpu->auto_demotion_disable_flags) |
Shaohua Li | 39a74fd | 2012-01-10 15:48:19 -0800 | [diff] [blame] | 504 | on_each_cpu(auto_demotion_disable, NULL, 1); |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 505 | |
| 506 | return 0; |
| 507 | } |
| 508 | |
| 509 | |
| 510 | /* |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 511 | * intel_idle_cpu_init() |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 512 | * allocate, initialize, register cpuidle_devices |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 513 | * @cpu: cpu/core to initialize |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 514 | */ |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 515 | static int intel_idle_cpu_init(int cpu) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 516 | { |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 517 | int cstate; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 518 | struct cpuidle_device *dev; |
| 519 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 520 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 521 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 522 | dev->state_count = 1; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 523 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 524 | for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { |
| 525 | int num_substates; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 526 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 527 | if (cstate > max_cstate) { |
Marcos Paulo de Souza | dc716e9 | 2012-03-21 16:33:43 -0700 | [diff] [blame] | 528 | printk(PREFIX "max_cstate %d reached\n", max_cstate); |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 529 | break; |
| 530 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 531 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 532 | /* does the state exist in CPUID.MWAIT? */ |
| 533 | num_substates = (mwait_substates >> ((cstate) * 4)) |
| 534 | & MWAIT_SUBSTATE_MASK; |
| 535 | if (num_substates == 0) |
| 536 | continue; |
| 537 | /* is the state not enabled? */ |
| 538 | if (cpuidle_state_table[cstate].enter == NULL) |
| 539 | continue; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 540 | |
Marcos Paulo de Souza | dc716e9 | 2012-03-21 16:33:43 -0700 | [diff] [blame] | 541 | dev->state_count += 1; |
| 542 | } |
| 543 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 544 | dev->cpu = cpu; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 545 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 546 | if (cpuidle_register_device(dev)) { |
| 547 | pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu); |
| 548 | intel_idle_cpuidle_devices_uninit(); |
| 549 | return -EIO; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 550 | } |
| 551 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 552 | if (icpu->auto_demotion_disable_flags) |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 553 | smp_call_function_single(cpu, auto_demotion_disable, NULL, 1); |
| 554 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 555 | return 0; |
| 556 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 557 | |
| 558 | static int __init intel_idle_init(void) |
| 559 | { |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 560 | int retval, i; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 561 | |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 562 | /* Do not load intel_idle at all for now if idle= is passed */ |
| 563 | if (boot_option_idle_override != IDLE_NO_OVERRIDE) |
| 564 | return -ENODEV; |
| 565 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 566 | retval = intel_idle_probe(); |
| 567 | if (retval) |
| 568 | return retval; |
| 569 | |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 570 | intel_idle_cpuidle_driver_init(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 571 | retval = cpuidle_register_driver(&intel_idle_driver); |
| 572 | if (retval) { |
Konrad Rzeszutek Wilk | 3735d52 | 2012-08-16 22:06:55 +0200 | [diff] [blame] | 573 | struct cpuidle_driver *drv = cpuidle_get_driver(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 574 | printk(KERN_DEBUG PREFIX "intel_idle yielding to %s", |
Konrad Rzeszutek Wilk | 3735d52 | 2012-08-16 22:06:55 +0200 | [diff] [blame] | 575 | drv ? drv->name : "none"); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 576 | return retval; |
| 577 | } |
| 578 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 579 | intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device); |
| 580 | if (intel_idle_cpuidle_devices == NULL) |
| 581 | return -ENOMEM; |
| 582 | |
| 583 | for_each_online_cpu(i) { |
| 584 | retval = intel_idle_cpu_init(i); |
| 585 | if (retval) { |
| 586 | cpuidle_unregister_driver(&intel_idle_driver); |
| 587 | return retval; |
| 588 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 589 | } |
Konrad Rzeszutek Wilk | 6f8c2e7 | 2013-01-16 23:40:01 +0100 | [diff] [blame] | 590 | register_cpu_notifier(&cpu_hotplug_notifier); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 591 | |
| 592 | return 0; |
| 593 | } |
| 594 | |
| 595 | static void __exit intel_idle_exit(void) |
| 596 | { |
| 597 | intel_idle_cpuidle_devices_uninit(); |
| 598 | cpuidle_unregister_driver(&intel_idle_driver); |
| 599 | |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 600 | |
| 601 | if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) |
Shaohua Li | 39a74fd | 2012-01-10 15:48:19 -0800 | [diff] [blame] | 602 | on_each_cpu(__setup_broadcast_timer, (void *)false, 1); |
Daniel Lezcano | 25ac776 | 2012-07-05 15:23:25 +0200 | [diff] [blame] | 603 | unregister_cpu_notifier(&cpu_hotplug_notifier); |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 604 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 605 | return; |
| 606 | } |
| 607 | |
| 608 | module_init(intel_idle_init); |
| 609 | module_exit(intel_idle_exit); |
| 610 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 611 | module_param(max_cstate, int, 0444); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 612 | |
| 613 | MODULE_AUTHOR("Len Brown <len.brown@intel.com>"); |
| 614 | MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION); |
| 615 | MODULE_LICENSE("GPL"); |