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Avi Kivity6aa8b732006-12-10 02:21:36 -08001/******************************************************************************
Avi Kivity56e82312009-08-12 15:04:37 +03002 * emulate.c
Avi Kivity6aa8b732006-12-10 02:21:36 -08003 *
4 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
5 *
6 * Copyright (c) 2005 Keir Fraser
7 *
8 * Linux coding style, mod r/m decoder, segment base fixes, real-mode
Rusty Russelldcc07662007-07-17 23:16:56 +10009 * privileged instructions:
Avi Kivity6aa8b732006-12-10 02:21:36 -080010 *
11 * Copyright (C) 2006 Qumranet
12 *
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
20 */
21
22#ifndef __KERNEL__
23#include <stdio.h>
24#include <stdint.h>
25#include <public/xen.h>
Mike Dayd77c26f2007-10-08 09:02:08 -040026#define DPRINTF(_f, _a ...) printf(_f , ## _a)
Avi Kivity6aa8b732006-12-10 02:21:36 -080027#else
Avi Kivityedf88412007-12-16 11:02:48 +020028#include <linux/kvm_host.h>
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -030029#include "kvm_cache_regs.h"
Avi Kivity6aa8b732006-12-10 02:21:36 -080030#define DPRINTF(x...) do {} while (0)
31#endif
Avi Kivity6aa8b732006-12-10 02:21:36 -080032#include <linux/module.h>
Avi Kivity56e82312009-08-12 15:04:37 +030033#include <asm/kvm_emulate.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080034
Avi Kivity3eeb3282010-01-21 15:31:48 +020035#include "x86.h"
Gleb Natapov38ba30b2010-03-18 15:20:17 +020036#include "tss.h"
Andre Przywarae99f0502009-06-17 15:50:33 +020037
Avi Kivity6aa8b732006-12-10 02:21:36 -080038/*
39 * Opcode effective-address decode tables.
40 * Note that we only emulate instructions that have at least one memory
41 * operand (excluding implicit stack references). We assume that stack
42 * references and instruction fetches will never occur in special memory
43 * areas that require emulation. So, for example, 'mov <imm>,<reg>' need
44 * not be handled.
45 */
46
47/* Operand sizes: 8-bit operands or specified/overridden size. */
48#define ByteOp (1<<0) /* 8-bit operands. */
49/* Destination operand type. */
50#define ImplicitOps (1<<1) /* Implicit in opcode. No generic decode. */
51#define DstReg (2<<1) /* Register operand. */
52#define DstMem (3<<1) /* Memory operand. */
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +020053#define DstAcc (4<<1) /* Destination Accumulator */
Gleb Natapova682e352010-03-18 15:20:21 +020054#define DstDI (5<<1) /* Destination is in ES:(E)DI */
Gleb Natapov6550e1f2010-03-21 13:08:21 +020055#define DstMem64 (6<<1) /* 64bit memory operand */
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +020056#define DstMask (7<<1)
Avi Kivity6aa8b732006-12-10 02:21:36 -080057/* Source operand type. */
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +020058#define SrcNone (0<<4) /* No source operand. */
59#define SrcImplicit (0<<4) /* Source operand is implicit in the opcode. */
60#define SrcReg (1<<4) /* Register operand. */
61#define SrcMem (2<<4) /* Memory operand. */
62#define SrcMem16 (3<<4) /* Memory operand (16-bit). */
63#define SrcMem32 (4<<4) /* Memory operand (32-bit). */
64#define SrcImm (5<<4) /* Immediate operand. */
65#define SrcImmByte (6<<4) /* 8-bit sign-extended immediate operand. */
Guillaume Thouveninbfcadf82008-12-04 14:27:38 +010066#define SrcOne (7<<4) /* Implied '1' */
Gleb Natapov341de7e2009-04-12 13:36:41 +030067#define SrcImmUByte (8<<4) /* 8-bit unsigned immediate operand. */
Avi Kivityc9eaf20f2009-05-18 16:13:45 +030068#define SrcImmU (9<<4) /* Immediate operand, unsigned */
Gleb Natapova682e352010-03-18 15:20:21 +020069#define SrcSI (0xa<<4) /* Source is in the DS:RSI */
Gleb Natapov414e6272010-04-28 19:15:26 +030070#define SrcImmFAddr (0xb<<4) /* Source is immediate far address */
71#define SrcMemFAddr (0xc<<4) /* Source is far address in memory */
Gleb Natapov341de7e2009-04-12 13:36:41 +030072#define SrcMask (0xf<<4)
Avi Kivity6aa8b732006-12-10 02:21:36 -080073/* Generic ModRM decode. */
Gleb Natapov341de7e2009-04-12 13:36:41 +030074#define ModRM (1<<8)
Avi Kivity6aa8b732006-12-10 02:21:36 -080075/* Destination is only written; never read. */
Gleb Natapov341de7e2009-04-12 13:36:41 +030076#define Mov (1<<9)
77#define BitOp (1<<10)
78#define MemAbs (1<<11) /* Memory operand is absolute displacement */
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +020079#define String (1<<12) /* String instruction (rep capable) */
80#define Stack (1<<13) /* Stack instruction (push/pop) */
Avi Kivitye09d0822008-01-18 12:38:59 +020081#define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */
82#define GroupDual (1<<15) /* Alternate decoding of mod == 3 */
83#define GroupMask 0xff /* Group number stored in bits 0:7 */
Mohammed Gamald8769fe2009-08-23 14:24:25 +030084/* Misc flags */
Gleb Natapovd380a5e2010-02-10 14:21:36 +020085#define Lock (1<<26) /* lock prefix is allowed for the instruction */
Gleb Natapove92805a2010-02-10 14:21:35 +020086#define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */
Mohammed Gamald8769fe2009-08-23 14:24:25 +030087#define No64 (1<<28)
Guillaume Thouvenin0dc8d102008-12-04 14:26:42 +010088/* Source 2 operand type */
89#define Src2None (0<<29)
90#define Src2CL (1<<29)
91#define Src2ImmByte (2<<29)
92#define Src2One (3<<29)
93#define Src2Mask (7<<29)
Avi Kivity6aa8b732006-12-10 02:21:36 -080094
Avi Kivity43bb19c2008-01-18 12:46:50 +020095enum {
Avi Kivity1d6ad202008-01-23 22:26:09 +020096 Group1_80, Group1_81, Group1_82, Group1_83,
Avi Kivityd95058a2008-01-18 13:36:50 +020097 Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
Gleb Natapov60a29d42010-02-10 14:21:30 +020098 Group8, Group9,
Avi Kivity43bb19c2008-01-18 12:46:50 +020099};
100
Guillaume Thouvenin45ed60b2008-12-04 14:25:38 +0100101static u32 opcode_table[256] = {
Avi Kivity6aa8b732006-12-10 02:21:36 -0800102 /* 0x00 - 0x07 */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200103 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800104 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Mohammed Gamal0934ac92009-08-23 14:24:24 +0300105 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
Mohammed Gamald8769fe2009-08-23 14:24:25 +0300106 ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800107 /* 0x08 - 0x0F */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200108 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800109 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Mohammed Gamal94677e62009-08-28 16:41:44 +0200110 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
111 ImplicitOps | Stack | No64, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800112 /* 0x10 - 0x17 */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200113 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800114 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Mohammed Gamal0934ac92009-08-23 14:24:24 +0300115 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
Mohammed Gamald8769fe2009-08-23 14:24:25 +0300116 ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800117 /* 0x18 - 0x1F */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200118 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800119 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Mohammed Gamal0934ac92009-08-23 14:24:24 +0300120 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
Mohammed Gamald8769fe2009-08-23 14:24:25 +0300121 ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800122 /* 0x20 - 0x27 */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200123 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800124 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Guillaume Thouveninaa3a8162008-09-12 13:52:18 +0200125 DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800126 /* 0x28 - 0x2F */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200127 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800128 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
129 0, 0, 0, 0,
130 /* 0x30 - 0x37 */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200131 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800132 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
133 0, 0, 0, 0,
134 /* 0x38 - 0x3F */
135 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
136 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
Guillaume Thouvenin8a9fee62008-09-12 13:51:15 +0200137 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
138 0, 0,
Nitin A Kambled77a2502007-10-12 17:40:33 -0700139 /* 0x40 - 0x47 */
Avi Kivity33615aa2007-10-31 11:15:56 +0200140 DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
Nitin A Kambled77a2502007-10-12 17:40:33 -0700141 /* 0x48 - 0x4F */
Avi Kivity33615aa2007-10-31 11:15:56 +0200142 DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
Nitin A Kamble7f0aaee2007-06-19 11:16:04 +0300143 /* 0x50 - 0x57 */
Avi Kivity6e3d5df2007-12-06 18:14:14 +0200144 SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
145 SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
Nitin A Kamble7f0aaee2007-06-19 11:16:04 +0300146 /* 0x58 - 0x5F */
Avi Kivity6e3d5df2007-12-06 18:14:14 +0200147 DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
148 DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
Nitin A Kamble7d316912007-08-28 17:58:52 -0700149 /* 0x60 - 0x67 */
Mohammed Gamalabcf14b2009-09-01 15:28:11 +0200150 ImplicitOps | Stack | No64, ImplicitOps | Stack | No64,
151 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
Nitin A Kamble7d316912007-08-28 17:58:52 -0700152 0, 0, 0, 0,
153 /* 0x68 - 0x6F */
Avi Kivity91ed7a02008-05-29 14:38:38 +0300154 SrcImm | Mov | Stack, 0, SrcImmByte | Mov | Stack, 0,
Gleb Natapov79729952010-03-18 15:20:24 +0200155 DstDI | ByteOp | Mov | String, DstDI | Mov | String, /* insb, insw/insd */
156 SrcSI | ByteOp | ImplicitOps | String, SrcSI | ImplicitOps | String, /* outsb, outsw/outsd */
Nitin A Kamble55bebde2007-09-15 10:25:41 +0300157 /* 0x70 - 0x77 */
Gleb Natapovb2833e32009-04-12 13:36:30 +0300158 SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
159 SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
Nitin A Kamble55bebde2007-09-15 10:25:41 +0300160 /* 0x78 - 0x7F */
Gleb Natapovb2833e32009-04-12 13:36:30 +0300161 SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
162 SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800163 /* 0x80 - 0x87 */
Avi Kivity1d6ad202008-01-23 22:26:09 +0200164 Group | Group1_80, Group | Group1_81,
165 Group | Group1_82, Group | Group1_83,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800166 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200167 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800168 /* 0x88 - 0x8F */
169 ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
170 ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
Guillaume Thouvenin38d5bc62008-05-27 15:13:28 +0200171 DstMem | SrcReg | ModRM | Mov, ModRM | DstReg,
Gleb Natapov054fe9f2010-04-28 19:15:23 +0300172 ImplicitOps | SrcMem | ModRM, Group | Group1A,
Mohammed Gamalb13354f2008-06-15 19:37:38 +0300173 /* 0x90 - 0x97 */
174 DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
175 /* 0x98 - 0x9F */
Gleb Natapov414e6272010-04-28 19:15:26 +0300176 0, 0, SrcImmFAddr | No64, 0,
Gleb Natapov06541692009-04-12 13:36:20 +0300177 ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800178 /* 0xA0 - 0xA7 */
Avi Kivityc7e75a32007-10-28 16:34:25 +0200179 ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
180 ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
Gleb Natapova682e352010-03-18 15:20:21 +0200181 ByteOp | SrcSI | DstDI | Mov | String, SrcSI | DstDI | Mov | String,
182 ByteOp | SrcSI | DstDI | String, SrcSI | DstDI | String,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800183 /* 0xA8 - 0xAF */
Gleb Natapova682e352010-03-18 15:20:21 +0200184 0, 0, ByteOp | DstDI | Mov | String, DstDI | Mov | String,
185 ByteOp | SrcSI | DstAcc | Mov | String, SrcSI | DstAcc | Mov | String,
186 ByteOp | DstDI | String, DstDI | String,
Mohammed Gamala5e2e822008-08-27 05:02:56 +0300187 /* 0xB0 - 0xB7 */
188 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
189 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
190 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
191 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
192 /* 0xB8 - 0xBF */
193 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
194 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
195 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
196 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800197 /* 0xC0 - 0xC7 */
Nitin A Kambled9413cd2007-06-19 11:21:15 +0300198 ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
Avi Kivity6e3d5df2007-12-06 18:14:14 +0200199 0, ImplicitOps | Stack, 0, 0,
Nitin A Kambled9413cd2007-06-19 11:21:15 +0300200 ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800201 /* 0xC8 - 0xCF */
Gleb Natapove637b822009-04-12 13:36:52 +0300202 0, 0, 0, ImplicitOps | Stack,
Mohammed Gamald8769fe2009-08-23 14:24:25 +0300203 ImplicitOps, SrcImmByte, ImplicitOps | No64, ImplicitOps,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800204 /* 0xD0 - 0xD7 */
205 ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
206 ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
207 0, 0, 0, 0,
208 /* 0xD8 - 0xDF */
209 0, 0, 0, 0, 0, 0, 0, 0,
Nitin A Kamble098c9372007-08-19 11:00:36 +0300210 /* 0xE0 - 0xE7 */
Mohammed Gamala6a30342008-09-06 17:22:29 +0300211 0, 0, 0, 0,
Gleb Natapovcf8f70b2010-03-18 15:20:23 +0200212 ByteOp | SrcImmUByte | DstAcc, SrcImmUByte | DstAcc,
213 ByteOp | SrcImmUByte | DstAcc, SrcImmUByte | DstAcc,
Nitin A Kamble098c9372007-08-19 11:00:36 +0300214 /* 0xE8 - 0xEF */
Gleb Natapovd53c4772009-04-12 13:36:36 +0300215 SrcImm | Stack, SrcImm | ImplicitOps,
Gleb Natapov414e6272010-04-28 19:15:26 +0300216 SrcImmFAddr | No64, SrcImmByte | ImplicitOps,
Gleb Natapovcf8f70b2010-03-18 15:20:23 +0200217 SrcNone | ByteOp | DstAcc, SrcNone | DstAcc,
218 SrcNone | ByteOp | DstAcc, SrcNone | DstAcc,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800219 /* 0xF0 - 0xF7 */
220 0, 0, 0, 0,
Gleb Natapove92805a2010-02-10 14:21:35 +0200221 ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800222 /* 0xF8 - 0xFF */
Nitin A Kambleb284be52007-10-16 18:23:27 -0700223 ImplicitOps, 0, ImplicitOps, ImplicitOps,
Mohammed Gamalfb4616f2008-09-01 04:52:24 +0300224 ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800225};
226
Guillaume Thouvenin45ed60b2008-12-04 14:25:38 +0100227static u32 twobyte_table[256] = {
Avi Kivity6aa8b732006-12-10 02:21:36 -0800228 /* 0x00 - 0x0F */
Gleb Natapove92805a2010-02-10 14:21:35 +0200229 0, Group | GroupDual | Group7, 0, 0,
230 0, ImplicitOps, ImplicitOps | Priv, 0,
231 ImplicitOps | Priv, ImplicitOps | Priv, 0, 0,
232 0, ImplicitOps | ModRM, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800233 /* 0x10 - 0x1F */
234 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
235 /* 0x20 - 0x2F */
Gleb Natapove92805a2010-02-10 14:21:35 +0200236 ModRM | ImplicitOps | Priv, ModRM | Priv,
237 ModRM | ImplicitOps | Priv, ModRM | Priv,
238 0, 0, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800239 0, 0, 0, 0, 0, 0, 0, 0,
240 /* 0x30 - 0x3F */
Gleb Natapove92805a2010-02-10 14:21:35 +0200241 ImplicitOps | Priv, 0, ImplicitOps | Priv, 0,
242 ImplicitOps, ImplicitOps | Priv, 0, 0,
Andre Przywarae99f0502009-06-17 15:50:33 +0200243 0, 0, 0, 0, 0, 0, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800244 /* 0x40 - 0x47 */
245 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
246 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
247 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
248 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
249 /* 0x48 - 0x4F */
250 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
251 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
252 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
253 DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
254 /* 0x50 - 0x5F */
255 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
256 /* 0x60 - 0x6F */
257 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
258 /* 0x70 - 0x7F */
259 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
260 /* 0x80 - 0x8F */
Gleb Natapovb2833e32009-04-12 13:36:30 +0300261 SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
262 SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800263 /* 0x90 - 0x9F */
264 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
265 /* 0xA0 - 0xA7 */
Mohammed Gamal0934ac92009-08-23 14:24:24 +0300266 ImplicitOps | Stack, ImplicitOps | Stack,
267 0, DstMem | SrcReg | ModRM | BitOp,
Guillaume Thouvenin9bf8ea42008-12-04 14:30:13 +0100268 DstMem | SrcReg | Src2ImmByte | ModRM,
269 DstMem | SrcReg | Src2CL | ModRM, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800270 /* 0xA8 - 0xAF */
Mohammed Gamal0934ac92009-08-23 14:24:24 +0300271 ImplicitOps | Stack, ImplicitOps | Stack,
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200272 0, DstMem | SrcReg | ModRM | BitOp | Lock,
Guillaume Thouvenin9bf8ea42008-12-04 14:30:13 +0100273 DstMem | SrcReg | Src2ImmByte | ModRM,
274 DstMem | SrcReg | Src2CL | ModRM,
275 ModRM, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800276 /* 0xB0 - 0xB7 */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200277 ByteOp | DstMem | SrcReg | ModRM | Lock, DstMem | SrcReg | ModRM | Lock,
278 0, DstMem | SrcReg | ModRM | BitOp | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800279 0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
280 DstReg | SrcMem16 | ModRM | Mov,
281 /* 0xB8 - 0xBF */
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200282 0, 0,
283 Group | Group8, DstMem | SrcReg | ModRM | BitOp | Lock,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800284 0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
285 DstReg | SrcMem16 | ModRM | Mov,
286 /* 0xC0 - 0xCF */
Gleb Natapov60a29d42010-02-10 14:21:30 +0200287 0, 0, 0, DstMem | SrcReg | ModRM | Mov,
288 0, 0, 0, Group | GroupDual | Group9,
Sheng Yanga012e652007-10-15 14:24:20 +0800289 0, 0, 0, 0, 0, 0, 0, 0,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800290 /* 0xD0 - 0xDF */
291 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
292 /* 0xE0 - 0xEF */
293 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
294 /* 0xF0 - 0xFF */
295 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
296};
297
Guillaume Thouvenin45ed60b2008-12-04 14:25:38 +0100298static u32 group_table[] = {
Avi Kivity1d6ad202008-01-23 22:26:09 +0200299 [Group1_80*8] =
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200300 ByteOp | DstMem | SrcImm | ModRM | Lock,
301 ByteOp | DstMem | SrcImm | ModRM | Lock,
302 ByteOp | DstMem | SrcImm | ModRM | Lock,
303 ByteOp | DstMem | SrcImm | ModRM | Lock,
304 ByteOp | DstMem | SrcImm | ModRM | Lock,
305 ByteOp | DstMem | SrcImm | ModRM | Lock,
306 ByteOp | DstMem | SrcImm | ModRM | Lock,
307 ByteOp | DstMem | SrcImm | ModRM,
Avi Kivity1d6ad202008-01-23 22:26:09 +0200308 [Group1_81*8] =
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200309 DstMem | SrcImm | ModRM | Lock,
310 DstMem | SrcImm | ModRM | Lock,
311 DstMem | SrcImm | ModRM | Lock,
312 DstMem | SrcImm | ModRM | Lock,
313 DstMem | SrcImm | ModRM | Lock,
314 DstMem | SrcImm | ModRM | Lock,
315 DstMem | SrcImm | ModRM | Lock,
316 DstMem | SrcImm | ModRM,
Avi Kivity1d6ad202008-01-23 22:26:09 +0200317 [Group1_82*8] =
Gleb Natapove424e192010-02-11 12:41:10 +0200318 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
319 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
320 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
321 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
322 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
323 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
324 ByteOp | DstMem | SrcImm | ModRM | No64 | Lock,
325 ByteOp | DstMem | SrcImm | ModRM | No64,
Avi Kivity1d6ad202008-01-23 22:26:09 +0200326 [Group1_83*8] =
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200327 DstMem | SrcImmByte | ModRM | Lock,
328 DstMem | SrcImmByte | ModRM | Lock,
329 DstMem | SrcImmByte | ModRM | Lock,
330 DstMem | SrcImmByte | ModRM | Lock,
331 DstMem | SrcImmByte | ModRM | Lock,
332 DstMem | SrcImmByte | ModRM | Lock,
333 DstMem | SrcImmByte | ModRM | Lock,
334 DstMem | SrcImmByte | ModRM,
Avi Kivity43bb19c2008-01-18 12:46:50 +0200335 [Group1A*8] =
336 DstMem | SrcNone | ModRM | Mov | Stack, 0, 0, 0, 0, 0, 0, 0,
Avi Kivity7d858a12008-01-18 12:58:04 +0200337 [Group3_Byte*8] =
338 ByteOp | SrcImm | DstMem | ModRM, 0,
339 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
340 0, 0, 0, 0,
341 [Group3*8] =
roel kluin41afa022008-08-18 21:25:01 -0400342 DstMem | SrcImm | ModRM, 0,
Avi Kivity6eb06cb2008-08-21 17:41:39 +0300343 DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
Avi Kivity7d858a12008-01-18 12:58:04 +0200344 0, 0, 0, 0,
Avi Kivityfd607542008-01-18 13:12:26 +0200345 [Group4*8] =
346 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
347 0, 0, 0, 0, 0, 0,
348 [Group5*8] =
Mohammed Gamald19292e2008-09-08 21:47:19 +0300349 DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
350 SrcMem | ModRM | Stack, 0,
Gleb Natapov414e6272010-04-28 19:15:26 +0300351 SrcMem | ModRM | Stack, SrcMemFAddr | ModRM | ImplicitOps,
Gleb Natapovea79849d2010-02-25 16:36:43 +0200352 SrcMem | ModRM | Stack, 0,
Avi Kivityd95058a2008-01-18 13:36:50 +0200353 [Group7*8] =
Gleb Natapove92805a2010-02-10 14:21:35 +0200354 0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv,
Avi Kivity16286d02008-04-14 14:40:50 +0300355 SrcNone | ModRM | DstMem | Mov, 0,
Gleb Natapove92805a2010-02-10 14:21:35 +0200356 SrcMem16 | ModRM | Mov | Priv, SrcMem | ModRM | ByteOp | Priv,
Gleb Natapov2db2c2e2010-02-10 14:21:29 +0200357 [Group8*8] =
358 0, 0, 0, 0,
Gleb Natapovd380a5e2010-02-10 14:21:36 +0200359 DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM | Lock,
360 DstMem | SrcImmByte | ModRM | Lock, DstMem | SrcImmByte | ModRM | Lock,
Gleb Natapov60a29d42010-02-10 14:21:30 +0200361 [Group9*8] =
Gleb Natapov6550e1f2010-03-21 13:08:21 +0200362 0, DstMem64 | ModRM | Lock, 0, 0, 0, 0, 0, 0,
Avi Kivitye09d0822008-01-18 12:38:59 +0200363};
364
Guillaume Thouvenin45ed60b2008-12-04 14:25:38 +0100365static u32 group2_table[] = {
Avi Kivityd95058a2008-01-18 13:36:50 +0200366 [Group7*8] =
Gleb Natapov835e6b82010-03-03 17:53:05 +0200367 SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM | Priv,
Avi Kivity16286d02008-04-14 14:40:50 +0300368 SrcNone | ModRM | DstMem | Mov, 0,
Gleb Natapov835e6b82010-03-03 17:53:05 +0200369 SrcMem16 | ModRM | Mov | Priv, 0,
Gleb Natapov60a29d42010-02-10 14:21:30 +0200370 [Group9*8] =
371 0, 0, 0, 0, 0, 0, 0, 0,
Avi Kivitye09d0822008-01-18 12:38:59 +0200372};
373
Avi Kivity6aa8b732006-12-10 02:21:36 -0800374/* EFLAGS bit definitions. */
Gleb Natapovd4c6a152010-02-10 14:21:34 +0200375#define EFLG_ID (1<<21)
376#define EFLG_VIP (1<<20)
377#define EFLG_VIF (1<<19)
378#define EFLG_AC (1<<18)
Andre Przywarab1d86142009-06-17 15:50:32 +0200379#define EFLG_VM (1<<17)
380#define EFLG_RF (1<<16)
Gleb Natapovd4c6a152010-02-10 14:21:34 +0200381#define EFLG_IOPL (3<<12)
382#define EFLG_NT (1<<14)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800383#define EFLG_OF (1<<11)
384#define EFLG_DF (1<<10)
Andre Przywarab1d86142009-06-17 15:50:32 +0200385#define EFLG_IF (1<<9)
Gleb Natapovd4c6a152010-02-10 14:21:34 +0200386#define EFLG_TF (1<<8)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800387#define EFLG_SF (1<<7)
388#define EFLG_ZF (1<<6)
389#define EFLG_AF (1<<4)
390#define EFLG_PF (1<<2)
391#define EFLG_CF (1<<0)
392
393/*
394 * Instruction emulation:
395 * Most instructions are emulated directly via a fragment of inline assembly
396 * code. This allows us to save/restore EFLAGS and thus very easily pick up
397 * any modified flags.
398 */
399
Avi Kivity05b3e0c2006-12-13 00:33:45 -0800400#if defined(CONFIG_X86_64)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800401#define _LO32 "k" /* force 32-bit operand */
402#define _STK "%%rsp" /* stack pointer */
403#elif defined(__i386__)
404#define _LO32 "" /* force 32-bit operand */
405#define _STK "%%esp" /* stack pointer */
406#endif
407
408/*
409 * These EFLAGS bits are restored from saved value during emulation, and
410 * any changes are written back to the saved value after emulation.
411 */
412#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)
413
414/* Before executing instruction: restore necessary bits in EFLAGS. */
Avi Kivitye934c9c2007-12-06 16:15:02 +0200415#define _PRE_EFLAGS(_sav, _msk, _tmp) \
416 /* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \
417 "movl %"_sav",%"_LO32 _tmp"; " \
418 "push %"_tmp"; " \
419 "push %"_tmp"; " \
420 "movl %"_msk",%"_LO32 _tmp"; " \
421 "andl %"_LO32 _tmp",("_STK"); " \
422 "pushf; " \
423 "notl %"_LO32 _tmp"; " \
424 "andl %"_LO32 _tmp",("_STK"); " \
425 "andl %"_LO32 _tmp","__stringify(BITS_PER_LONG/4)"("_STK"); " \
426 "pop %"_tmp"; " \
427 "orl %"_LO32 _tmp",("_STK"); " \
428 "popf; " \
429 "pop %"_sav"; "
Avi Kivity6aa8b732006-12-10 02:21:36 -0800430
431/* After executing instruction: write-back necessary bits in EFLAGS. */
432#define _POST_EFLAGS(_sav, _msk, _tmp) \
433 /* _sav |= EFLAGS & _msk; */ \
434 "pushf; " \
435 "pop %"_tmp"; " \
436 "andl %"_msk",%"_LO32 _tmp"; " \
437 "orl %"_LO32 _tmp",%"_sav"; "
438
Avi Kivitydda96d82008-11-26 15:14:10 +0200439#ifdef CONFIG_X86_64
440#define ON64(x) x
441#else
442#define ON64(x)
443#endif
444
Avi Kivity6b7ad612008-11-26 15:30:45 +0200445#define ____emulate_2op(_op, _src, _dst, _eflags, _x, _y, _suffix) \
446 do { \
447 __asm__ __volatile__ ( \
448 _PRE_EFLAGS("0", "4", "2") \
449 _op _suffix " %"_x"3,%1; " \
450 _POST_EFLAGS("0", "4", "2") \
451 : "=m" (_eflags), "=m" ((_dst).val), \
452 "=&r" (_tmp) \
453 : _y ((_src).val), "i" (EFLAGS_MASK)); \
Avi Kivityf3fd92f2008-11-29 20:38:12 +0200454 } while (0)
Avi Kivity6b7ad612008-11-26 15:30:45 +0200455
456
Avi Kivity6aa8b732006-12-10 02:21:36 -0800457/* Raw emulation: instruction has two explicit operands. */
458#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
Avi Kivity6b7ad612008-11-26 15:30:45 +0200459 do { \
460 unsigned long _tmp; \
461 \
462 switch ((_dst).bytes) { \
463 case 2: \
464 ____emulate_2op(_op,_src,_dst,_eflags,_wx,_wy,"w"); \
465 break; \
466 case 4: \
467 ____emulate_2op(_op,_src,_dst,_eflags,_lx,_ly,"l"); \
468 break; \
469 case 8: \
470 ON64(____emulate_2op(_op,_src,_dst,_eflags,_qx,_qy,"q")); \
471 break; \
472 } \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800473 } while (0)
474
475#define __emulate_2op(_op,_src,_dst,_eflags,_bx,_by,_wx,_wy,_lx,_ly,_qx,_qy) \
476 do { \
Avi Kivity6b7ad612008-11-26 15:30:45 +0200477 unsigned long _tmp; \
Mike Dayd77c26f2007-10-08 09:02:08 -0400478 switch ((_dst).bytes) { \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800479 case 1: \
Avi Kivity6b7ad612008-11-26 15:30:45 +0200480 ____emulate_2op(_op,_src,_dst,_eflags,_bx,_by,"b"); \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800481 break; \
482 default: \
483 __emulate_2op_nobyte(_op, _src, _dst, _eflags, \
484 _wx, _wy, _lx, _ly, _qx, _qy); \
485 break; \
486 } \
487 } while (0)
488
489/* Source operand is byte-sized and may be restricted to just %cl. */
490#define emulate_2op_SrcB(_op, _src, _dst, _eflags) \
491 __emulate_2op(_op, _src, _dst, _eflags, \
492 "b", "c", "b", "c", "b", "c", "b", "c")
493
494/* Source operand is byte, word, long or quad sized. */
495#define emulate_2op_SrcV(_op, _src, _dst, _eflags) \
496 __emulate_2op(_op, _src, _dst, _eflags, \
497 "b", "q", "w", "r", _LO32, "r", "", "r")
498
499/* Source operand is word, long or quad sized. */
500#define emulate_2op_SrcV_nobyte(_op, _src, _dst, _eflags) \
501 __emulate_2op_nobyte(_op, _src, _dst, _eflags, \
502 "w", "r", _LO32, "r", "", "r")
503
Guillaume Thouvenind1752262008-12-04 14:29:00 +0100504/* Instruction has three operands and one operand is stored in ECX register */
505#define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) \
506 do { \
507 unsigned long _tmp; \
508 _type _clv = (_cl).val; \
509 _type _srcv = (_src).val; \
510 _type _dstv = (_dst).val; \
511 \
512 __asm__ __volatile__ ( \
513 _PRE_EFLAGS("0", "5", "2") \
514 _op _suffix " %4,%1 \n" \
515 _POST_EFLAGS("0", "5", "2") \
516 : "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp) \
517 : "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \
518 ); \
519 \
520 (_cl).val = (unsigned long) _clv; \
521 (_src).val = (unsigned long) _srcv; \
522 (_dst).val = (unsigned long) _dstv; \
523 } while (0)
524
525#define emulate_2op_cl(_op, _cl, _src, _dst, _eflags) \
526 do { \
527 switch ((_dst).bytes) { \
528 case 2: \
529 __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
530 "w", unsigned short); \
531 break; \
532 case 4: \
533 __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
534 "l", unsigned int); \
535 break; \
536 case 8: \
537 ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \
538 "q", unsigned long)); \
539 break; \
540 } \
541 } while (0)
542
Avi Kivitydda96d82008-11-26 15:14:10 +0200543#define __emulate_1op(_op, _dst, _eflags, _suffix) \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800544 do { \
545 unsigned long _tmp; \
546 \
Avi Kivitydda96d82008-11-26 15:14:10 +0200547 __asm__ __volatile__ ( \
548 _PRE_EFLAGS("0", "3", "2") \
549 _op _suffix " %1; " \
550 _POST_EFLAGS("0", "3", "2") \
551 : "=m" (_eflags), "+m" ((_dst).val), \
552 "=&r" (_tmp) \
553 : "i" (EFLAGS_MASK)); \
554 } while (0)
555
556/* Instruction has only one explicit operand (no source operand). */
557#define emulate_1op(_op, _dst, _eflags) \
558 do { \
Mike Dayd77c26f2007-10-08 09:02:08 -0400559 switch ((_dst).bytes) { \
Avi Kivitydda96d82008-11-26 15:14:10 +0200560 case 1: __emulate_1op(_op, _dst, _eflags, "b"); break; \
561 case 2: __emulate_1op(_op, _dst, _eflags, "w"); break; \
562 case 4: __emulate_1op(_op, _dst, _eflags, "l"); break; \
563 case 8: ON64(__emulate_1op(_op, _dst, _eflags, "q")); break; \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800564 } \
565 } while (0)
566
Avi Kivity6aa8b732006-12-10 02:21:36 -0800567/* Fetch next part of the instruction being emulated. */
568#define insn_fetch(_type, _size, _eip) \
569({ unsigned long _x; \
Avi Kivity62266862007-11-20 13:15:52 +0200570 rc = do_insn_fetch(ctxt, ops, (_eip), &_x, (_size)); \
Gleb Natapovaf5b4f72010-03-15 16:38:30 +0200571 if (rc != X86EMUL_CONTINUE) \
Avi Kivity6aa8b732006-12-10 02:21:36 -0800572 goto done; \
573 (_eip) += (_size); \
574 (_type)_x; \
575})
576
Gleb Natapov414e6272010-04-28 19:15:26 +0300577#define insn_fetch_arr(_arr, _size, _eip) \
578({ rc = do_insn_fetch(ctxt, ops, (_eip), _arr, (_size)); \
579 if (rc != X86EMUL_CONTINUE) \
580 goto done; \
581 (_eip) += (_size); \
582})
583
Harvey Harrisonddcb2882008-02-18 11:12:48 -0800584static inline unsigned long ad_mask(struct decode_cache *c)
585{
586 return (1UL << (c->ad_bytes << 3)) - 1;
587}
588
Avi Kivity6aa8b732006-12-10 02:21:36 -0800589/* Access/update address held in a register, based on addressing mode. */
Harvey Harrisone4706772008-02-19 07:40:38 -0800590static inline unsigned long
591address_mask(struct decode_cache *c, unsigned long reg)
592{
593 if (c->ad_bytes == sizeof(unsigned long))
594 return reg;
595 else
596 return reg & ad_mask(c);
597}
598
599static inline unsigned long
600register_address(struct decode_cache *c, unsigned long base, unsigned long reg)
601{
602 return base + address_mask(c, reg);
603}
604
Harvey Harrison7a9572752008-02-19 07:40:41 -0800605static inline void
606register_address_increment(struct decode_cache *c, unsigned long *reg, int inc)
607{
608 if (c->ad_bytes == sizeof(unsigned long))
609 *reg += inc;
610 else
611 *reg = (*reg & ~ad_mask(c)) | ((*reg + inc) & ad_mask(c));
612}
Avi Kivity6aa8b732006-12-10 02:21:36 -0800613
Harvey Harrison7a9572752008-02-19 07:40:41 -0800614static inline void jmp_rel(struct decode_cache *c, int rel)
615{
616 register_address_increment(c, &c->eip, rel);
617}
Nitin A Kamble098c9372007-08-19 11:00:36 +0300618
Avi Kivity7a5b56d2008-06-22 16:22:51 +0300619static void set_seg_override(struct decode_cache *c, int seg)
620{
621 c->has_seg_override = true;
622 c->seg_override = seg;
623}
624
625static unsigned long seg_base(struct x86_emulate_ctxt *ctxt, int seg)
626{
627 if (ctxt->mode == X86EMUL_MODE_PROT64 && seg < VCPU_SREG_FS)
628 return 0;
629
630 return kvm_x86_ops->get_segment_base(ctxt->vcpu, seg);
631}
632
633static unsigned long seg_override_base(struct x86_emulate_ctxt *ctxt,
634 struct decode_cache *c)
635{
636 if (!c->has_seg_override)
637 return 0;
638
639 return seg_base(ctxt, c->seg_override);
640}
641
642static unsigned long es_base(struct x86_emulate_ctxt *ctxt)
643{
644 return seg_base(ctxt, VCPU_SREG_ES);
645}
646
647static unsigned long ss_base(struct x86_emulate_ctxt *ctxt)
648{
649 return seg_base(ctxt, VCPU_SREG_SS);
650}
651
Avi Kivity62266862007-11-20 13:15:52 +0200652static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt,
653 struct x86_emulate_ops *ops,
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300654 unsigned long eip, u8 *dest)
Avi Kivity62266862007-11-20 13:15:52 +0200655{
656 struct fetch_cache *fc = &ctxt->decode.fetch;
657 int rc;
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300658 int size, cur_size;
Avi Kivity62266862007-11-20 13:15:52 +0200659
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300660 if (eip == fc->end) {
661 cur_size = fc->end - fc->start;
662 size = min(15UL - cur_size, PAGE_SIZE - offset_in_page(eip));
663 rc = ops->fetch(ctxt->cs_base + eip, fc->data + cur_size,
664 size, ctxt->vcpu, NULL);
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900665 if (rc != X86EMUL_CONTINUE)
Avi Kivity62266862007-11-20 13:15:52 +0200666 return rc;
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300667 fc->end += size;
Avi Kivity62266862007-11-20 13:15:52 +0200668 }
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300669 *dest = fc->data[eip - fc->start];
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900670 return X86EMUL_CONTINUE;
Avi Kivity62266862007-11-20 13:15:52 +0200671}
672
673static int do_insn_fetch(struct x86_emulate_ctxt *ctxt,
674 struct x86_emulate_ops *ops,
675 unsigned long eip, void *dest, unsigned size)
676{
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900677 int rc;
Avi Kivity62266862007-11-20 13:15:52 +0200678
Avi Kivityeb3c79e2009-11-24 15:20:15 +0200679 /* x86 instructions are limited to 15 bytes. */
Gleb Natapov063db062010-03-18 15:20:06 +0200680 if (eip + size - ctxt->eip > 15)
Avi Kivityeb3c79e2009-11-24 15:20:15 +0200681 return X86EMUL_UNHANDLEABLE;
Avi Kivity62266862007-11-20 13:15:52 +0200682 while (size--) {
683 rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++);
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900684 if (rc != X86EMUL_CONTINUE)
Avi Kivity62266862007-11-20 13:15:52 +0200685 return rc;
686 }
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900687 return X86EMUL_CONTINUE;
Avi Kivity62266862007-11-20 13:15:52 +0200688}
689
Rusty Russell1e3c5cb2007-07-17 23:16:11 +1000690/*
691 * Given the 'reg' portion of a ModRM byte, and a register block, return a
692 * pointer into the block that addresses the relevant register.
693 * @highbyte_regs specifies whether to decode AH,CH,DH,BH.
694 */
695static void *decode_register(u8 modrm_reg, unsigned long *regs,
696 int highbyte_regs)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800697{
698 void *p;
699
700 p = &regs[modrm_reg];
701 if (highbyte_regs && modrm_reg >= 4 && modrm_reg < 8)
702 p = (unsigned char *)&regs[modrm_reg & 3] + 1;
703 return p;
704}
705
706static int read_descriptor(struct x86_emulate_ctxt *ctxt,
707 struct x86_emulate_ops *ops,
708 void *ptr,
709 u16 *size, unsigned long *address, int op_bytes)
710{
711 int rc;
712
713 if (op_bytes == 2)
714 op_bytes = 3;
715 *address = 0;
Laurent Viviercebff022007-07-30 13:35:24 +0300716 rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2,
Gleb Natapov1871c602010-02-10 14:21:32 +0200717 ctxt->vcpu, NULL);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +0900718 if (rc != X86EMUL_CONTINUE)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800719 return rc;
Laurent Viviercebff022007-07-30 13:35:24 +0300720 rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes,
Gleb Natapov1871c602010-02-10 14:21:32 +0200721 ctxt->vcpu, NULL);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800722 return rc;
723}
724
Nitin A Kamblebbe9abb2007-09-15 10:23:07 +0300725static int test_cc(unsigned int condition, unsigned int flags)
726{
727 int rc = 0;
728
729 switch ((condition & 15) >> 1) {
730 case 0: /* o */
731 rc |= (flags & EFLG_OF);
732 break;
733 case 1: /* b/c/nae */
734 rc |= (flags & EFLG_CF);
735 break;
736 case 2: /* z/e */
737 rc |= (flags & EFLG_ZF);
738 break;
739 case 3: /* be/na */
740 rc |= (flags & (EFLG_CF|EFLG_ZF));
741 break;
742 case 4: /* s */
743 rc |= (flags & EFLG_SF);
744 break;
745 case 5: /* p/pe */
746 rc |= (flags & EFLG_PF);
747 break;
748 case 7: /* le/ng */
749 rc |= (flags & EFLG_ZF);
750 /* fall through */
751 case 6: /* l/nge */
752 rc |= (!(flags & EFLG_SF) != !(flags & EFLG_OF));
753 break;
754 }
755
756 /* Odd condition identifiers (lsb == 1) have inverted sense. */
757 return (!!rc ^ (condition & 1));
758}
759
Avi Kivity3c118e22007-10-31 10:27:04 +0200760static void decode_register_operand(struct operand *op,
761 struct decode_cache *c,
Avi Kivity3c118e22007-10-31 10:27:04 +0200762 int inhibit_bytereg)
763{
Avi Kivity33615aa2007-10-31 11:15:56 +0200764 unsigned reg = c->modrm_reg;
Avi Kivity9f1ef3f2007-10-31 11:21:06 +0200765 int highbyte_regs = c->rex_prefix == 0;
Avi Kivity33615aa2007-10-31 11:15:56 +0200766
767 if (!(c->d & ModRM))
768 reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
Avi Kivity3c118e22007-10-31 10:27:04 +0200769 op->type = OP_REG;
770 if ((c->d & ByteOp) && !inhibit_bytereg) {
Avi Kivity33615aa2007-10-31 11:15:56 +0200771 op->ptr = decode_register(reg, c->regs, highbyte_regs);
Avi Kivity3c118e22007-10-31 10:27:04 +0200772 op->val = *(u8 *)op->ptr;
773 op->bytes = 1;
774 } else {
Avi Kivity33615aa2007-10-31 11:15:56 +0200775 op->ptr = decode_register(reg, c->regs, 0);
Avi Kivity3c118e22007-10-31 10:27:04 +0200776 op->bytes = c->op_bytes;
777 switch (op->bytes) {
778 case 2:
779 op->val = *(u16 *)op->ptr;
780 break;
781 case 4:
782 op->val = *(u32 *)op->ptr;
783 break;
784 case 8:
785 op->val = *(u64 *) op->ptr;
786 break;
787 }
788 }
789 op->orig_val = op->val;
790}
791
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200792static int decode_modrm(struct x86_emulate_ctxt *ctxt,
793 struct x86_emulate_ops *ops)
794{
795 struct decode_cache *c = &ctxt->decode;
796 u8 sib;
Avi Kivityf5b4edc2008-06-15 22:09:11 -0700797 int index_reg = 0, base_reg = 0, scale;
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900798 int rc = X86EMUL_CONTINUE;
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200799
800 if (c->rex_prefix) {
801 c->modrm_reg = (c->rex_prefix & 4) << 1; /* REX.R */
802 index_reg = (c->rex_prefix & 2) << 2; /* REX.X */
803 c->modrm_rm = base_reg = (c->rex_prefix & 1) << 3; /* REG.B */
804 }
805
806 c->modrm = insn_fetch(u8, 1, c->eip);
807 c->modrm_mod |= (c->modrm & 0xc0) >> 6;
808 c->modrm_reg |= (c->modrm & 0x38) >> 3;
809 c->modrm_rm |= (c->modrm & 0x07);
810 c->modrm_ea = 0;
811 c->use_modrm_ea = 1;
812
813 if (c->modrm_mod == 3) {
Avi Kivity107d6d22008-05-05 14:58:26 +0300814 c->modrm_ptr = decode_register(c->modrm_rm,
815 c->regs, c->d & ByteOp);
816 c->modrm_val = *(unsigned long *)c->modrm_ptr;
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200817 return rc;
818 }
819
820 if (c->ad_bytes == 2) {
821 unsigned bx = c->regs[VCPU_REGS_RBX];
822 unsigned bp = c->regs[VCPU_REGS_RBP];
823 unsigned si = c->regs[VCPU_REGS_RSI];
824 unsigned di = c->regs[VCPU_REGS_RDI];
825
826 /* 16-bit ModR/M decode. */
827 switch (c->modrm_mod) {
828 case 0:
829 if (c->modrm_rm == 6)
830 c->modrm_ea += insn_fetch(u16, 2, c->eip);
831 break;
832 case 1:
833 c->modrm_ea += insn_fetch(s8, 1, c->eip);
834 break;
835 case 2:
836 c->modrm_ea += insn_fetch(u16, 2, c->eip);
837 break;
838 }
839 switch (c->modrm_rm) {
840 case 0:
841 c->modrm_ea += bx + si;
842 break;
843 case 1:
844 c->modrm_ea += bx + di;
845 break;
846 case 2:
847 c->modrm_ea += bp + si;
848 break;
849 case 3:
850 c->modrm_ea += bp + di;
851 break;
852 case 4:
853 c->modrm_ea += si;
854 break;
855 case 5:
856 c->modrm_ea += di;
857 break;
858 case 6:
859 if (c->modrm_mod != 0)
860 c->modrm_ea += bp;
861 break;
862 case 7:
863 c->modrm_ea += bx;
864 break;
865 }
866 if (c->modrm_rm == 2 || c->modrm_rm == 3 ||
867 (c->modrm_rm == 6 && c->modrm_mod != 0))
Avi Kivity7a5b56d2008-06-22 16:22:51 +0300868 if (!c->has_seg_override)
869 set_seg_override(c, VCPU_SREG_SS);
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200870 c->modrm_ea = (u16)c->modrm_ea;
871 } else {
872 /* 32/64-bit ModR/M decode. */
Avi Kivity84411d82008-06-15 21:53:26 -0700873 if ((c->modrm_rm & 7) == 4) {
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200874 sib = insn_fetch(u8, 1, c->eip);
875 index_reg |= (sib >> 3) & 7;
876 base_reg |= sib & 7;
877 scale = sib >> 6;
878
Avi Kivitydc71d0f2008-06-15 21:23:17 -0700879 if ((base_reg & 7) == 5 && c->modrm_mod == 0)
880 c->modrm_ea += insn_fetch(s32, 4, c->eip);
881 else
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200882 c->modrm_ea += c->regs[base_reg];
Avi Kivitydc71d0f2008-06-15 21:23:17 -0700883 if (index_reg != 4)
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200884 c->modrm_ea += c->regs[index_reg] << scale;
Avi Kivity84411d82008-06-15 21:53:26 -0700885 } else if ((c->modrm_rm & 7) == 5 && c->modrm_mod == 0) {
886 if (ctxt->mode == X86EMUL_MODE_PROT64)
Avi Kivityf5b4edc2008-06-15 22:09:11 -0700887 c->rip_relative = 1;
Avi Kivity84411d82008-06-15 21:53:26 -0700888 } else
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200889 c->modrm_ea += c->regs[c->modrm_rm];
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200890 switch (c->modrm_mod) {
891 case 0:
892 if (c->modrm_rm == 5)
893 c->modrm_ea += insn_fetch(s32, 4, c->eip);
894 break;
895 case 1:
896 c->modrm_ea += insn_fetch(s8, 1, c->eip);
897 break;
898 case 2:
899 c->modrm_ea += insn_fetch(s32, 4, c->eip);
900 break;
901 }
902 }
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200903done:
904 return rc;
905}
906
907static int decode_abs(struct x86_emulate_ctxt *ctxt,
908 struct x86_emulate_ops *ops)
909{
910 struct decode_cache *c = &ctxt->decode;
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900911 int rc = X86EMUL_CONTINUE;
Avi Kivity1c73ef6652007-11-01 06:31:28 +0200912
913 switch (c->ad_bytes) {
914 case 2:
915 c->modrm_ea = insn_fetch(u16, 2, c->eip);
916 break;
917 case 4:
918 c->modrm_ea = insn_fetch(u32, 4, c->eip);
919 break;
920 case 8:
921 c->modrm_ea = insn_fetch(u64, 8, c->eip);
922 break;
923 }
924done:
925 return rc;
926}
927
Avi Kivity6aa8b732006-12-10 02:21:36 -0800928int
Laurent Vivier8b4caf62007-09-18 11:27:19 +0200929x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800930{
Laurent Viviere4e03de2007-09-18 11:52:50 +0200931 struct decode_cache *c = &ctxt->decode;
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +0900932 int rc = X86EMUL_CONTINUE;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800933 int mode = ctxt->mode;
Avi Kivitye09d0822008-01-18 12:38:59 +0200934 int def_op_bytes, def_ad_bytes, group;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800935
Avi Kivity6aa8b732006-12-10 02:21:36 -0800936
Gleb Natapov5cd21912010-03-18 15:20:26 +0200937 /* we cannot decode insn before we complete previous rep insn */
938 WARN_ON(ctxt->restart);
939
940 /* Shadow copy of register state. Committed on successful emulation. */
Laurent Viviere4e03de2007-09-18 11:52:50 +0200941 memset(c, 0, sizeof(struct decode_cache));
Gleb Natapov063db062010-03-18 15:20:06 +0200942 c->eip = ctxt->eip;
Avi Kivity2fb53ad2010-04-11 13:05:15 +0300943 c->fetch.start = c->fetch.end = c->eip;
Avi Kivity7a5b56d2008-06-22 16:22:51 +0300944 ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS);
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800945 memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800946
947 switch (mode) {
948 case X86EMUL_MODE_REAL:
Gleb Natapova0044752010-02-10 14:21:31 +0200949 case X86EMUL_MODE_VM86:
Avi Kivity6aa8b732006-12-10 02:21:36 -0800950 case X86EMUL_MODE_PROT16:
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200951 def_op_bytes = def_ad_bytes = 2;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800952 break;
953 case X86EMUL_MODE_PROT32:
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200954 def_op_bytes = def_ad_bytes = 4;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800955 break;
Avi Kivity05b3e0c2006-12-13 00:33:45 -0800956#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -0800957 case X86EMUL_MODE_PROT64:
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200958 def_op_bytes = 4;
959 def_ad_bytes = 8;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800960 break;
961#endif
962 default:
963 return -1;
964 }
965
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200966 c->op_bytes = def_op_bytes;
967 c->ad_bytes = def_ad_bytes;
968
Avi Kivity6aa8b732006-12-10 02:21:36 -0800969 /* Legacy prefixes. */
Laurent Vivierb4c6abf2007-09-25 13:36:40 +0200970 for (;;) {
Laurent Viviere4e03de2007-09-18 11:52:50 +0200971 switch (c->b = insn_fetch(u8, 1, c->eip)) {
Avi Kivity6aa8b732006-12-10 02:21:36 -0800972 case 0x66: /* operand-size override */
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200973 /* switch between 2/4 bytes */
974 c->op_bytes = def_op_bytes ^ 6;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800975 break;
976 case 0x67: /* address-size override */
977 if (mode == X86EMUL_MODE_PROT64)
Laurent Viviere4e03de2007-09-18 11:52:50 +0200978 /* switch between 4/8 bytes */
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200979 c->ad_bytes = def_ad_bytes ^ 12;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800980 else
Laurent Viviere4e03de2007-09-18 11:52:50 +0200981 /* switch between 2/4 bytes */
Avi Kivityf21b8bf2007-11-22 14:16:12 +0200982 c->ad_bytes = def_ad_bytes ^ 6;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800983 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800984 case 0x26: /* ES override */
Avi Kivity7a5b56d2008-06-22 16:22:51 +0300985 case 0x2e: /* CS override */
986 case 0x36: /* SS override */
987 case 0x3e: /* DS override */
988 set_seg_override(c, (c->b >> 3) & 3);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800989 break;
990 case 0x64: /* FS override */
Avi Kivity6aa8b732006-12-10 02:21:36 -0800991 case 0x65: /* GS override */
Avi Kivity7a5b56d2008-06-22 16:22:51 +0300992 set_seg_override(c, c->b & 7);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800993 break;
Laurent Vivierb4c6abf2007-09-25 13:36:40 +0200994 case 0x40 ... 0x4f: /* REX */
995 if (mode != X86EMUL_MODE_PROT64)
996 goto done_prefixes;
Avi Kivity33615aa2007-10-31 11:15:56 +0200997 c->rex_prefix = c->b;
Laurent Vivierb4c6abf2007-09-25 13:36:40 +0200998 continue;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800999 case 0xf0: /* LOCK */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001000 c->lock_prefix = 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001001 break;
Laurent Vivierae6200b2007-09-20 11:17:24 +02001002 case 0xf2: /* REPNE/REPNZ */
Guillaume Thouvenin90e0a282007-11-22 11:32:09 +01001003 c->rep_prefix = REPNE_PREFIX;
1004 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001005 case 0xf3: /* REP/REPE/REPZ */
Guillaume Thouvenin90e0a282007-11-22 11:32:09 +01001006 c->rep_prefix = REPE_PREFIX;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001007 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001008 default:
1009 goto done_prefixes;
1010 }
Laurent Vivierb4c6abf2007-09-25 13:36:40 +02001011
1012 /* Any legacy prefix after a REX prefix nullifies its effect. */
1013
Avi Kivity33615aa2007-10-31 11:15:56 +02001014 c->rex_prefix = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001015 }
1016
1017done_prefixes:
1018
1019 /* REX prefix. */
Avi Kivity1c73ef6652007-11-01 06:31:28 +02001020 if (c->rex_prefix)
Avi Kivity33615aa2007-10-31 11:15:56 +02001021 if (c->rex_prefix & 8)
Laurent Viviere4e03de2007-09-18 11:52:50 +02001022 c->op_bytes = 8; /* REX.W */
Avi Kivity6aa8b732006-12-10 02:21:36 -08001023
1024 /* Opcode byte(s). */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001025 c->d = opcode_table[c->b];
1026 if (c->d == 0) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08001027 /* Two-byte opcode? */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001028 if (c->b == 0x0f) {
1029 c->twobyte = 1;
1030 c->b = insn_fetch(u8, 1, c->eip);
1031 c->d = twobyte_table[c->b];
Avi Kivity6aa8b732006-12-10 02:21:36 -08001032 }
Avi Kivitye09d0822008-01-18 12:38:59 +02001033 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001034
Avi Kivitye09d0822008-01-18 12:38:59 +02001035 if (c->d & Group) {
1036 group = c->d & GroupMask;
1037 c->modrm = insn_fetch(u8, 1, c->eip);
1038 --c->eip;
1039
1040 group = (group << 3) + ((c->modrm >> 3) & 7);
1041 if ((c->d & GroupDual) && (c->modrm >> 6) == 3)
1042 c->d = group2_table[group];
1043 else
1044 c->d = group_table[group];
1045 }
1046
1047 /* Unrecognised? */
1048 if (c->d == 0) {
1049 DPRINTF("Cannot emulate %02x\n", c->b);
1050 return -1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001051 }
1052
Avi Kivity6e3d5df2007-12-06 18:14:14 +02001053 if (mode == X86EMUL_MODE_PROT64 && (c->d & Stack))
1054 c->op_bytes = 8;
1055
Avi Kivity6aa8b732006-12-10 02:21:36 -08001056 /* ModRM and SIB bytes. */
Avi Kivity1c73ef6652007-11-01 06:31:28 +02001057 if (c->d & ModRM)
1058 rc = decode_modrm(ctxt, ops);
1059 else if (c->d & MemAbs)
1060 rc = decode_abs(ctxt, ops);
Takuya Yoshikawa3e2815e2010-02-12 15:53:59 +09001061 if (rc != X86EMUL_CONTINUE)
Avi Kivity1c73ef6652007-11-01 06:31:28 +02001062 goto done;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001063
Avi Kivity7a5b56d2008-06-22 16:22:51 +03001064 if (!c->has_seg_override)
1065 set_seg_override(c, VCPU_SREG_DS);
Avi Kivityc7e75a32007-10-28 16:34:25 +02001066
Avi Kivity7a5b56d2008-06-22 16:22:51 +03001067 if (!(!c->twobyte && c->b == 0x8d))
1068 c->modrm_ea += seg_override_base(ctxt, c);
Avi Kivityc7e75a32007-10-28 16:34:25 +02001069
1070 if (c->ad_bytes != 8)
1071 c->modrm_ea = (u32)c->modrm_ea;
Gleb Natapov69f55cb2010-03-18 15:20:20 +02001072
1073 if (c->rip_relative)
1074 c->modrm_ea += c->eip;
1075
Avi Kivity6aa8b732006-12-10 02:21:36 -08001076 /*
1077 * Decode and fetch the source operand: register, memory
1078 * or immediate.
1079 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001080 switch (c->d & SrcMask) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08001081 case SrcNone:
1082 break;
1083 case SrcReg:
Avi Kivity9f1ef3f2007-10-31 11:21:06 +02001084 decode_register_operand(&c->src, c, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001085 break;
1086 case SrcMem16:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001087 c->src.bytes = 2;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001088 goto srcmem_common;
1089 case SrcMem32:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001090 c->src.bytes = 4;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001091 goto srcmem_common;
1092 case SrcMem:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001093 c->src.bytes = (c->d & ByteOp) ? 1 :
1094 c->op_bytes;
Rusty Russellb85b9ee92007-09-09 14:12:54 +03001095 /* Don't fetch the address for invlpg: it could be unmapped. */
Mike Dayd77c26f2007-10-08 09:02:08 -04001096 if (c->twobyte && c->b == 0x01 && c->modrm_reg == 7)
Rusty Russellb85b9ee92007-09-09 14:12:54 +03001097 break;
Mike Dayd77c26f2007-10-08 09:02:08 -04001098 srcmem_common:
Aurelien Jarno4e624172007-10-17 19:30:41 +02001099 /*
1100 * For instructions with a ModR/M byte, switch to register
1101 * access if Mod = 3.
1102 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001103 if ((c->d & ModRM) && c->modrm_mod == 3) {
1104 c->src.type = OP_REG;
Avi Kivity66b85502008-04-14 23:27:07 +03001105 c->src.val = c->modrm_val;
Avi Kivity107d6d22008-05-05 14:58:26 +03001106 c->src.ptr = c->modrm_ptr;
Aurelien Jarno4e624172007-10-17 19:30:41 +02001107 break;
1108 }
Laurent Viviere4e03de2007-09-18 11:52:50 +02001109 c->src.type = OP_MEM;
Gleb Natapov69f55cb2010-03-18 15:20:20 +02001110 c->src.ptr = (unsigned long *)c->modrm_ea;
1111 c->src.val = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001112 break;
1113 case SrcImm:
Avi Kivityc9eaf20f2009-05-18 16:13:45 +03001114 case SrcImmU:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001115 c->src.type = OP_IMM;
1116 c->src.ptr = (unsigned long *)c->eip;
1117 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1118 if (c->src.bytes == 8)
1119 c->src.bytes = 4;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001120 /* NB. Immediates are sign-extended as necessary. */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001121 switch (c->src.bytes) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08001122 case 1:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001123 c->src.val = insn_fetch(s8, 1, c->eip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001124 break;
1125 case 2:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001126 c->src.val = insn_fetch(s16, 2, c->eip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001127 break;
1128 case 4:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001129 c->src.val = insn_fetch(s32, 4, c->eip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001130 break;
1131 }
Avi Kivityc9eaf20f2009-05-18 16:13:45 +03001132 if ((c->d & SrcMask) == SrcImmU) {
1133 switch (c->src.bytes) {
1134 case 1:
1135 c->src.val &= 0xff;
1136 break;
1137 case 2:
1138 c->src.val &= 0xffff;
1139 break;
1140 case 4:
1141 c->src.val &= 0xffffffff;
1142 break;
1143 }
1144 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001145 break;
1146 case SrcImmByte:
Gleb Natapov341de7e2009-04-12 13:36:41 +03001147 case SrcImmUByte:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001148 c->src.type = OP_IMM;
1149 c->src.ptr = (unsigned long *)c->eip;
1150 c->src.bytes = 1;
Gleb Natapov341de7e2009-04-12 13:36:41 +03001151 if ((c->d & SrcMask) == SrcImmByte)
1152 c->src.val = insn_fetch(s8, 1, c->eip);
1153 else
1154 c->src.val = insn_fetch(u8, 1, c->eip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001155 break;
Guillaume Thouveninbfcadf82008-12-04 14:27:38 +01001156 case SrcOne:
1157 c->src.bytes = 1;
1158 c->src.val = 1;
1159 break;
Gleb Natapova682e352010-03-18 15:20:21 +02001160 case SrcSI:
1161 c->src.type = OP_MEM;
1162 c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1163 c->src.ptr = (unsigned long *)
1164 register_address(c, seg_override_base(ctxt, c),
1165 c->regs[VCPU_REGS_RSI]);
1166 c->src.val = 0;
1167 break;
Gleb Natapov414e6272010-04-28 19:15:26 +03001168 case SrcImmFAddr:
1169 c->src.type = OP_IMM;
1170 c->src.ptr = (unsigned long *)c->eip;
1171 c->src.bytes = c->op_bytes + 2;
1172 insn_fetch_arr(c->src.valptr, c->src.bytes, c->eip);
1173 break;
1174 case SrcMemFAddr:
1175 c->src.type = OP_MEM;
1176 c->src.ptr = (unsigned long *)c->modrm_ea;
1177 c->src.bytes = c->op_bytes + 2;
1178 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001179 }
1180
Guillaume Thouvenin0dc8d102008-12-04 14:26:42 +01001181 /*
1182 * Decode and fetch the second source operand: register, memory
1183 * or immediate.
1184 */
1185 switch (c->d & Src2Mask) {
1186 case Src2None:
1187 break;
1188 case Src2CL:
1189 c->src2.bytes = 1;
1190 c->src2.val = c->regs[VCPU_REGS_RCX] & 0x8;
1191 break;
1192 case Src2ImmByte:
1193 c->src2.type = OP_IMM;
1194 c->src2.ptr = (unsigned long *)c->eip;
1195 c->src2.bytes = 1;
1196 c->src2.val = insn_fetch(u8, 1, c->eip);
1197 break;
1198 case Src2One:
1199 c->src2.bytes = 1;
1200 c->src2.val = 1;
1201 break;
1202 }
1203
Avi Kivity038e51d2007-01-22 20:40:40 -08001204 /* Decode and fetch the destination operand: register or memory. */
Laurent Viviere4e03de2007-09-18 11:52:50 +02001205 switch (c->d & DstMask) {
Avi Kivity038e51d2007-01-22 20:40:40 -08001206 case ImplicitOps:
1207 /* Special instructions do their own operand decoding. */
Laurent Vivier8b4caf62007-09-18 11:27:19 +02001208 return 0;
Avi Kivity038e51d2007-01-22 20:40:40 -08001209 case DstReg:
Avi Kivity9f1ef3f2007-10-31 11:21:06 +02001210 decode_register_operand(&c->dst, c,
Avi Kivity3c118e22007-10-31 10:27:04 +02001211 c->twobyte && (c->b == 0xb6 || c->b == 0xb7));
Avi Kivity038e51d2007-01-22 20:40:40 -08001212 break;
1213 case DstMem:
Gleb Natapov6550e1f2010-03-21 13:08:21 +02001214 case DstMem64:
Laurent Viviere4e03de2007-09-18 11:52:50 +02001215 if ((c->d & ModRM) && c->modrm_mod == 3) {
Guillaume Thouvenin89c69632008-05-27 10:22:20 +02001216 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
Laurent Viviere4e03de2007-09-18 11:52:50 +02001217 c->dst.type = OP_REG;
Avi Kivity66b85502008-04-14 23:27:07 +03001218 c->dst.val = c->dst.orig_val = c->modrm_val;
Avi Kivity107d6d22008-05-05 14:58:26 +03001219 c->dst.ptr = c->modrm_ptr;
Aurelien Jarno4e624172007-10-17 19:30:41 +02001220 break;
1221 }
Laurent Vivier8b4caf62007-09-18 11:27:19 +02001222 c->dst.type = OP_MEM;
Gleb Natapov69f55cb2010-03-18 15:20:20 +02001223 c->dst.ptr = (unsigned long *)c->modrm_ea;
Gleb Natapov6550e1f2010-03-21 13:08:21 +02001224 if ((c->d & DstMask) == DstMem64)
1225 c->dst.bytes = 8;
1226 else
1227 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
Gleb Natapov69f55cb2010-03-18 15:20:20 +02001228 c->dst.val = 0;
1229 if (c->d & BitOp) {
1230 unsigned long mask = ~(c->dst.bytes * 8 - 1);
1231
1232 c->dst.ptr = (void *)c->dst.ptr +
1233 (c->src.val & mask) / 8;
1234 }
Laurent Vivier8b4caf62007-09-18 11:27:19 +02001235 break;
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +02001236 case DstAcc:
1237 c->dst.type = OP_REG;
Gleb Natapovd6d367d2010-03-15 16:38:28 +02001238 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +02001239 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
Gleb Natapovd6d367d2010-03-15 16:38:28 +02001240 switch (c->dst.bytes) {
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +02001241 case 1:
1242 c->dst.val = *(u8 *)c->dst.ptr;
1243 break;
1244 case 2:
1245 c->dst.val = *(u16 *)c->dst.ptr;
1246 break;
1247 case 4:
1248 c->dst.val = *(u32 *)c->dst.ptr;
1249 break;
Gleb Natapovd6d367d2010-03-15 16:38:28 +02001250 case 8:
1251 c->dst.val = *(u64 *)c->dst.ptr;
1252 break;
Guillaume Thouvenin9c9fddd2008-09-12 13:50:25 +02001253 }
1254 c->dst.orig_val = c->dst.val;
1255 break;
Gleb Natapova682e352010-03-18 15:20:21 +02001256 case DstDI:
1257 c->dst.type = OP_MEM;
1258 c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1259 c->dst.ptr = (unsigned long *)
1260 register_address(c, es_base(ctxt),
1261 c->regs[VCPU_REGS_RDI]);
1262 c->dst.val = 0;
1263 break;
Laurent Vivier8b4caf62007-09-18 11:27:19 +02001264 }
1265
1266done:
1267 return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
1268}
1269
Gleb Natapov9de41572010-04-28 19:15:22 +03001270static int read_emulated(struct x86_emulate_ctxt *ctxt,
1271 struct x86_emulate_ops *ops,
1272 unsigned long addr, void *dest, unsigned size)
1273{
1274 int rc;
1275 struct read_cache *mc = &ctxt->decode.mem_read;
1276
1277 while (size) {
1278 int n = min(size, 8u);
1279 size -= n;
1280 if (mc->pos < mc->end)
1281 goto read_cached;
1282
1283 rc = ops->read_emulated(addr, mc->data + mc->end, n, ctxt->vcpu);
1284 if (rc != X86EMUL_CONTINUE)
1285 return rc;
1286 mc->end += n;
1287
1288 read_cached:
1289 memcpy(dest, mc->data + mc->pos, n);
1290 mc->pos += n;
1291 dest += n;
1292 addr += n;
1293 }
1294 return X86EMUL_CONTINUE;
1295}
1296
Gleb Natapov7b262e92010-03-18 15:20:27 +02001297static int pio_in_emulated(struct x86_emulate_ctxt *ctxt,
1298 struct x86_emulate_ops *ops,
1299 unsigned int size, unsigned short port,
1300 void *dest)
1301{
1302 struct read_cache *rc = &ctxt->decode.io_read;
1303
1304 if (rc->pos == rc->end) { /* refill pio read ahead */
1305 struct decode_cache *c = &ctxt->decode;
1306 unsigned int in_page, n;
1307 unsigned int count = c->rep_prefix ?
1308 address_mask(c, c->regs[VCPU_REGS_RCX]) : 1;
1309 in_page = (ctxt->eflags & EFLG_DF) ?
1310 offset_in_page(c->regs[VCPU_REGS_RDI]) :
1311 PAGE_SIZE - offset_in_page(c->regs[VCPU_REGS_RDI]);
1312 n = min(min(in_page, (unsigned int)sizeof(rc->data)) / size,
1313 count);
1314 if (n == 0)
1315 n = 1;
1316 rc->pos = rc->end = 0;
1317 if (!ops->pio_in_emulated(size, port, rc->data, n, ctxt->vcpu))
1318 return 0;
1319 rc->end = n * size;
1320 }
1321
1322 memcpy(dest, rc->data + rc->pos, size);
1323 rc->pos += size;
1324 return 1;
1325}
1326
Gleb Natapov38ba30b2010-03-18 15:20:17 +02001327static u32 desc_limit_scaled(struct desc_struct *desc)
1328{
1329 u32 limit = get_desc_limit(desc);
1330
1331 return desc->g ? (limit << 12) | 0xfff : limit;
1332}
1333
1334static void get_descriptor_table_ptr(struct x86_emulate_ctxt *ctxt,
1335 struct x86_emulate_ops *ops,
1336 u16 selector, struct desc_ptr *dt)
1337{
1338 if (selector & 1 << 2) {
1339 struct desc_struct desc;
1340 memset (dt, 0, sizeof *dt);
1341 if (!ops->get_cached_descriptor(&desc, VCPU_SREG_LDTR, ctxt->vcpu))
1342 return;
1343
1344 dt->size = desc_limit_scaled(&desc); /* what if limit > 65535? */
1345 dt->address = get_desc_base(&desc);
1346 } else
1347 ops->get_gdt(dt, ctxt->vcpu);
1348}
1349
1350/* allowed just for 8 bytes segments */
1351static int read_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1352 struct x86_emulate_ops *ops,
1353 u16 selector, struct desc_struct *desc)
1354{
1355 struct desc_ptr dt;
1356 u16 index = selector >> 3;
1357 int ret;
1358 u32 err;
1359 ulong addr;
1360
1361 get_descriptor_table_ptr(ctxt, ops, selector, &dt);
1362
1363 if (dt.size < index * 8 + 7) {
1364 kvm_inject_gp(ctxt->vcpu, selector & 0xfffc);
1365 return X86EMUL_PROPAGATE_FAULT;
1366 }
1367 addr = dt.address + index * 8;
1368 ret = ops->read_std(addr, desc, sizeof *desc, ctxt->vcpu, &err);
1369 if (ret == X86EMUL_PROPAGATE_FAULT)
1370 kvm_inject_page_fault(ctxt->vcpu, addr, err);
1371
1372 return ret;
1373}
1374
1375/* allowed just for 8 bytes segments */
1376static int write_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1377 struct x86_emulate_ops *ops,
1378 u16 selector, struct desc_struct *desc)
1379{
1380 struct desc_ptr dt;
1381 u16 index = selector >> 3;
1382 u32 err;
1383 ulong addr;
1384 int ret;
1385
1386 get_descriptor_table_ptr(ctxt, ops, selector, &dt);
1387
1388 if (dt.size < index * 8 + 7) {
1389 kvm_inject_gp(ctxt->vcpu, selector & 0xfffc);
1390 return X86EMUL_PROPAGATE_FAULT;
1391 }
1392
1393 addr = dt.address + index * 8;
1394 ret = ops->write_std(addr, desc, sizeof *desc, ctxt->vcpu, &err);
1395 if (ret == X86EMUL_PROPAGATE_FAULT)
1396 kvm_inject_page_fault(ctxt->vcpu, addr, err);
1397
1398 return ret;
1399}
1400
1401static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt,
1402 struct x86_emulate_ops *ops,
1403 u16 selector, int seg)
1404{
1405 struct desc_struct seg_desc;
1406 u8 dpl, rpl, cpl;
1407 unsigned err_vec = GP_VECTOR;
1408 u32 err_code = 0;
1409 bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
1410 int ret;
1411
1412 memset(&seg_desc, 0, sizeof seg_desc);
1413
1414 if ((seg <= VCPU_SREG_GS && ctxt->mode == X86EMUL_MODE_VM86)
1415 || ctxt->mode == X86EMUL_MODE_REAL) {
1416 /* set real mode segment descriptor */
1417 set_desc_base(&seg_desc, selector << 4);
1418 set_desc_limit(&seg_desc, 0xffff);
1419 seg_desc.type = 3;
1420 seg_desc.p = 1;
1421 seg_desc.s = 1;
1422 goto load;
1423 }
1424
1425 /* NULL selector is not valid for TR, CS and SS */
1426 if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
1427 && null_selector)
1428 goto exception;
1429
1430 /* TR should be in GDT only */
1431 if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
1432 goto exception;
1433
1434 if (null_selector) /* for NULL selector skip all following checks */
1435 goto load;
1436
1437 ret = read_segment_descriptor(ctxt, ops, selector, &seg_desc);
1438 if (ret != X86EMUL_CONTINUE)
1439 return ret;
1440
1441 err_code = selector & 0xfffc;
1442 err_vec = GP_VECTOR;
1443
1444 /* can't load system descriptor into segment selecor */
1445 if (seg <= VCPU_SREG_GS && !seg_desc.s)
1446 goto exception;
1447
1448 if (!seg_desc.p) {
1449 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
1450 goto exception;
1451 }
1452
1453 rpl = selector & 3;
1454 dpl = seg_desc.dpl;
1455 cpl = ops->cpl(ctxt->vcpu);
1456
1457 switch (seg) {
1458 case VCPU_SREG_SS:
1459 /*
1460 * segment is not a writable data segment or segment
1461 * selector's RPL != CPL or segment selector's RPL != CPL
1462 */
1463 if (rpl != cpl || (seg_desc.type & 0xa) != 0x2 || dpl != cpl)
1464 goto exception;
1465 break;
1466 case VCPU_SREG_CS:
1467 if (!(seg_desc.type & 8))
1468 goto exception;
1469
1470 if (seg_desc.type & 4) {
1471 /* conforming */
1472 if (dpl > cpl)
1473 goto exception;
1474 } else {
1475 /* nonconforming */
1476 if (rpl > cpl || dpl != cpl)
1477 goto exception;
1478 }
1479 /* CS(RPL) <- CPL */
1480 selector = (selector & 0xfffc) | cpl;
1481 break;
1482 case VCPU_SREG_TR:
1483 if (seg_desc.s || (seg_desc.type != 1 && seg_desc.type != 9))
1484 goto exception;
1485 break;
1486 case VCPU_SREG_LDTR:
1487 if (seg_desc.s || seg_desc.type != 2)
1488 goto exception;
1489 break;
1490 default: /* DS, ES, FS, or GS */
1491 /*
1492 * segment is not a data or readable code segment or
1493 * ((segment is a data or nonconforming code segment)
1494 * and (both RPL and CPL > DPL))
1495 */
1496 if ((seg_desc.type & 0xa) == 0x8 ||
1497 (((seg_desc.type & 0xc) != 0xc) &&
1498 (rpl > dpl && cpl > dpl)))
1499 goto exception;
1500 break;
1501 }
1502
1503 if (seg_desc.s) {
1504 /* mark segment as accessed */
1505 seg_desc.type |= 1;
1506 ret = write_segment_descriptor(ctxt, ops, selector, &seg_desc);
1507 if (ret != X86EMUL_CONTINUE)
1508 return ret;
1509 }
1510load:
1511 ops->set_segment_selector(selector, seg, ctxt->vcpu);
1512 ops->set_cached_descriptor(&seg_desc, seg, ctxt->vcpu);
1513 return X86EMUL_CONTINUE;
1514exception:
1515 kvm_queue_exception_e(ctxt->vcpu, err_vec, err_code);
1516 return X86EMUL_PROPAGATE_FAULT;
1517}
1518
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001519static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
1520{
1521 struct decode_cache *c = &ctxt->decode;
1522
1523 c->dst.type = OP_MEM;
1524 c->dst.bytes = c->op_bytes;
1525 c->dst.val = c->src.val;
Harvey Harrison7a9572752008-02-19 07:40:41 -08001526 register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes);
Avi Kivity7a5b56d2008-06-22 16:22:51 +03001527 c->dst.ptr = (void *) register_address(c, ss_base(ctxt),
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001528 c->regs[VCPU_REGS_RSP]);
1529}
1530
Avi Kivityfaa5a3a2008-11-27 17:36:41 +02001531static int emulate_pop(struct x86_emulate_ctxt *ctxt,
Avi Kivity350f69d2009-01-05 11:12:40 +02001532 struct x86_emulate_ops *ops,
1533 void *dest, int len)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001534{
1535 struct decode_cache *c = &ctxt->decode;
1536 int rc;
1537
Gleb Natapov9de41572010-04-28 19:15:22 +03001538 rc = read_emulated(ctxt, ops, register_address(c, ss_base(ctxt),
1539 c->regs[VCPU_REGS_RSP]),
1540 dest, len);
Takuya Yoshikawab60d5132010-01-20 16:47:21 +09001541 if (rc != X86EMUL_CONTINUE)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001542 return rc;
1543
Avi Kivity350f69d2009-01-05 11:12:40 +02001544 register_address_increment(c, &c->regs[VCPU_REGS_RSP], len);
Avi Kivityfaa5a3a2008-11-27 17:36:41 +02001545 return rc;
1546}
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001547
Gleb Natapovd4c6a152010-02-10 14:21:34 +02001548static int emulate_popf(struct x86_emulate_ctxt *ctxt,
1549 struct x86_emulate_ops *ops,
1550 void *dest, int len)
1551{
1552 int rc;
1553 unsigned long val, change_mask;
1554 int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
Gleb Natapov9c537242010-03-18 15:20:05 +02001555 int cpl = ops->cpl(ctxt->vcpu);
Gleb Natapovd4c6a152010-02-10 14:21:34 +02001556
1557 rc = emulate_pop(ctxt, ops, &val, len);
1558 if (rc != X86EMUL_CONTINUE)
1559 return rc;
1560
1561 change_mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_OF
1562 | EFLG_TF | EFLG_DF | EFLG_NT | EFLG_RF | EFLG_AC | EFLG_ID;
1563
1564 switch(ctxt->mode) {
1565 case X86EMUL_MODE_PROT64:
1566 case X86EMUL_MODE_PROT32:
1567 case X86EMUL_MODE_PROT16:
1568 if (cpl == 0)
1569 change_mask |= EFLG_IOPL;
1570 if (cpl <= iopl)
1571 change_mask |= EFLG_IF;
1572 break;
1573 case X86EMUL_MODE_VM86:
1574 if (iopl < 3) {
1575 kvm_inject_gp(ctxt->vcpu, 0);
1576 return X86EMUL_PROPAGATE_FAULT;
1577 }
1578 change_mask |= EFLG_IF;
1579 break;
1580 default: /* real mode */
1581 change_mask |= (EFLG_IOPL | EFLG_IF);
1582 break;
1583 }
1584
1585 *(unsigned long *)dest =
1586 (ctxt->eflags & ~change_mask) | (val & change_mask);
1587
1588 return rc;
1589}
1590
Mohammed Gamal0934ac92009-08-23 14:24:24 +03001591static void emulate_push_sreg(struct x86_emulate_ctxt *ctxt, int seg)
1592{
1593 struct decode_cache *c = &ctxt->decode;
1594 struct kvm_segment segment;
1595
1596 kvm_x86_ops->get_segment(ctxt->vcpu, &segment, seg);
1597
1598 c->src.val = segment.selector;
1599 emulate_push(ctxt);
1600}
1601
1602static int emulate_pop_sreg(struct x86_emulate_ctxt *ctxt,
1603 struct x86_emulate_ops *ops, int seg)
1604{
1605 struct decode_cache *c = &ctxt->decode;
1606 unsigned long selector;
1607 int rc;
1608
1609 rc = emulate_pop(ctxt, ops, &selector, c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001610 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03001611 return rc;
1612
Gleb Natapov2e873022010-03-18 15:20:18 +02001613 rc = load_segment_descriptor(ctxt, ops, (u16)selector, seg);
Mohammed Gamal0934ac92009-08-23 14:24:24 +03001614 return rc;
1615}
1616
Mohammed Gamalabcf14b2009-09-01 15:28:11 +02001617static void emulate_pusha(struct x86_emulate_ctxt *ctxt)
1618{
1619 struct decode_cache *c = &ctxt->decode;
1620 unsigned long old_esp = c->regs[VCPU_REGS_RSP];
1621 int reg = VCPU_REGS_RAX;
1622
1623 while (reg <= VCPU_REGS_RDI) {
1624 (reg == VCPU_REGS_RSP) ?
1625 (c->src.val = old_esp) : (c->src.val = c->regs[reg]);
1626
1627 emulate_push(ctxt);
1628 ++reg;
1629 }
1630}
1631
1632static int emulate_popa(struct x86_emulate_ctxt *ctxt,
1633 struct x86_emulate_ops *ops)
1634{
1635 struct decode_cache *c = &ctxt->decode;
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001636 int rc = X86EMUL_CONTINUE;
Mohammed Gamalabcf14b2009-09-01 15:28:11 +02001637 int reg = VCPU_REGS_RDI;
1638
1639 while (reg >= VCPU_REGS_RAX) {
1640 if (reg == VCPU_REGS_RSP) {
1641 register_address_increment(c, &c->regs[VCPU_REGS_RSP],
1642 c->op_bytes);
1643 --reg;
1644 }
1645
1646 rc = emulate_pop(ctxt, ops, &c->regs[reg], c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001647 if (rc != X86EMUL_CONTINUE)
Mohammed Gamalabcf14b2009-09-01 15:28:11 +02001648 break;
1649 --reg;
1650 }
1651 return rc;
1652}
1653
Avi Kivityfaa5a3a2008-11-27 17:36:41 +02001654static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
1655 struct x86_emulate_ops *ops)
1656{
1657 struct decode_cache *c = &ctxt->decode;
Avi Kivityfaa5a3a2008-11-27 17:36:41 +02001658
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001659 return emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001660}
1661
Laurent Vivier05f086f2007-09-24 11:10:55 +02001662static inline void emulate_grp2(struct x86_emulate_ctxt *ctxt)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001663{
Laurent Vivier05f086f2007-09-24 11:10:55 +02001664 struct decode_cache *c = &ctxt->decode;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001665 switch (c->modrm_reg) {
1666 case 0: /* rol */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001667 emulate_2op_SrcB("rol", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001668 break;
1669 case 1: /* ror */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001670 emulate_2op_SrcB("ror", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001671 break;
1672 case 2: /* rcl */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001673 emulate_2op_SrcB("rcl", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001674 break;
1675 case 3: /* rcr */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001676 emulate_2op_SrcB("rcr", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001677 break;
1678 case 4: /* sal/shl */
1679 case 6: /* sal/shl */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001680 emulate_2op_SrcB("sal", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001681 break;
1682 case 5: /* shr */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001683 emulate_2op_SrcB("shr", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001684 break;
1685 case 7: /* sar */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001686 emulate_2op_SrcB("sar", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001687 break;
1688 }
1689}
1690
1691static inline int emulate_grp3(struct x86_emulate_ctxt *ctxt,
Laurent Vivier05f086f2007-09-24 11:10:55 +02001692 struct x86_emulate_ops *ops)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001693{
1694 struct decode_cache *c = &ctxt->decode;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001695
1696 switch (c->modrm_reg) {
1697 case 0 ... 1: /* test */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001698 emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001699 break;
1700 case 2: /* not */
1701 c->dst.val = ~c->dst.val;
1702 break;
1703 case 3: /* neg */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001704 emulate_1op("neg", c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001705 break;
1706 default:
Gleb Natapovaca06a82010-03-18 15:20:15 +02001707 return 0;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001708 }
Gleb Natapovaca06a82010-03-18 15:20:15 +02001709 return 1;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001710}
1711
1712static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
Laurent Viviera01af5e2007-09-24 11:10:56 +02001713 struct x86_emulate_ops *ops)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001714{
1715 struct decode_cache *c = &ctxt->decode;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001716
1717 switch (c->modrm_reg) {
1718 case 0: /* inc */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001719 emulate_1op("inc", c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001720 break;
1721 case 1: /* dec */
Laurent Vivier05f086f2007-09-24 11:10:55 +02001722 emulate_1op("dec", c->dst, ctxt->eflags);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001723 break;
Mohammed Gamald19292e2008-09-08 21:47:19 +03001724 case 2: /* call near abs */ {
1725 long int old_eip;
1726 old_eip = c->eip;
1727 c->eip = c->src.val;
1728 c->src.val = old_eip;
1729 emulate_push(ctxt);
1730 break;
1731 }
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001732 case 4: /* jmp abs */
Avi Kivityfd607542008-01-18 13:12:26 +02001733 c->eip = c->src.val;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001734 break;
1735 case 6: /* push */
Avi Kivityfd607542008-01-18 13:12:26 +02001736 emulate_push(ctxt);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001737 break;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001738 }
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001739 return X86EMUL_CONTINUE;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001740}
1741
1742static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
Gleb Natapov69f55cb2010-03-18 15:20:20 +02001743 struct x86_emulate_ops *ops)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001744{
1745 struct decode_cache *c = &ctxt->decode;
Gleb Natapov6550e1f2010-03-21 13:08:21 +02001746 u64 old = c->dst.orig_val;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001747
1748 if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) ||
1749 ((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) {
1750
1751 c->regs[VCPU_REGS_RAX] = (u32) (old >> 0);
1752 c->regs[VCPU_REGS_RDX] = (u32) (old >> 32);
Laurent Vivier05f086f2007-09-24 11:10:55 +02001753 ctxt->eflags &= ~EFLG_ZF;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001754 } else {
Gleb Natapov6550e1f2010-03-21 13:08:21 +02001755 c->dst.val = ((u64)c->regs[VCPU_REGS_RCX] << 32) |
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001756 (u32) c->regs[VCPU_REGS_RBX];
1757
Laurent Vivier05f086f2007-09-24 11:10:55 +02001758 ctxt->eflags |= EFLG_ZF;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001759 }
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001760 return X86EMUL_CONTINUE;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001761}
1762
Avi Kivitya77ab5e2009-01-05 13:27:34 +02001763static int emulate_ret_far(struct x86_emulate_ctxt *ctxt,
1764 struct x86_emulate_ops *ops)
1765{
1766 struct decode_cache *c = &ctxt->decode;
1767 int rc;
1768 unsigned long cs;
1769
1770 rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001771 if (rc != X86EMUL_CONTINUE)
Avi Kivitya77ab5e2009-01-05 13:27:34 +02001772 return rc;
1773 if (c->op_bytes == 4)
1774 c->eip = (u32)c->eip;
1775 rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001776 if (rc != X86EMUL_CONTINUE)
Avi Kivitya77ab5e2009-01-05 13:27:34 +02001777 return rc;
Gleb Natapov2e873022010-03-18 15:20:18 +02001778 rc = load_segment_descriptor(ctxt, ops, (u16)cs, VCPU_SREG_CS);
Avi Kivitya77ab5e2009-01-05 13:27:34 +02001779 return rc;
1780}
1781
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001782static inline int writeback(struct x86_emulate_ctxt *ctxt,
1783 struct x86_emulate_ops *ops)
1784{
1785 int rc;
1786 struct decode_cache *c = &ctxt->decode;
1787
1788 switch (c->dst.type) {
1789 case OP_REG:
1790 /* The 4-byte case *is* correct:
1791 * in 64-bit mode we zero-extend.
1792 */
1793 switch (c->dst.bytes) {
1794 case 1:
1795 *(u8 *)c->dst.ptr = (u8)c->dst.val;
1796 break;
1797 case 2:
1798 *(u16 *)c->dst.ptr = (u16)c->dst.val;
1799 break;
1800 case 4:
1801 *c->dst.ptr = (u32)c->dst.val;
1802 break; /* 64b: zero-ext */
1803 case 8:
1804 *c->dst.ptr = c->dst.val;
1805 break;
1806 }
1807 break;
1808 case OP_MEM:
1809 if (c->lock_prefix)
1810 rc = ops->cmpxchg_emulated(
1811 (unsigned long)c->dst.ptr,
1812 &c->dst.orig_val,
1813 &c->dst.val,
1814 c->dst.bytes,
1815 ctxt->vcpu);
1816 else
1817 rc = ops->write_emulated(
1818 (unsigned long)c->dst.ptr,
1819 &c->dst.val,
1820 c->dst.bytes,
1821 ctxt->vcpu);
Takuya Yoshikawab60d5132010-01-20 16:47:21 +09001822 if (rc != X86EMUL_CONTINUE)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001823 return rc;
Laurent Viviera01af5e2007-09-24 11:10:56 +02001824 break;
1825 case OP_NONE:
1826 /* no writeback */
1827 break;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001828 default:
1829 break;
1830 }
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09001831 return X86EMUL_CONTINUE;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02001832}
1833
Jaswinder Singh Rajputa3f9d392009-06-18 16:53:25 +05301834static void toggle_interruptibility(struct x86_emulate_ctxt *ctxt, u32 mask)
Glauber Costa310b5d32009-05-12 16:21:06 -04001835{
1836 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(ctxt->vcpu, mask);
1837 /*
1838 * an sti; sti; sequence only disable interrupts for the first
1839 * instruction. So, if the last instruction, be it emulated or
1840 * not, left the system with the INT_STI flag enabled, it
1841 * means that the last instruction is an sti. We should not
1842 * leave the flag on in this case. The same goes for mov ss
1843 */
1844 if (!(int_shadow & mask))
1845 ctxt->interruptibility = mask;
1846}
1847
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001848static inline void
1849setup_syscalls_segments(struct x86_emulate_ctxt *ctxt,
1850 struct kvm_segment *cs, struct kvm_segment *ss)
1851{
1852 memset(cs, 0, sizeof(struct kvm_segment));
1853 kvm_x86_ops->get_segment(ctxt->vcpu, cs, VCPU_SREG_CS);
1854 memset(ss, 0, sizeof(struct kvm_segment));
1855
1856 cs->l = 0; /* will be adjusted later */
1857 cs->base = 0; /* flat segment */
1858 cs->g = 1; /* 4kb granularity */
1859 cs->limit = 0xffffffff; /* 4GB limit */
1860 cs->type = 0x0b; /* Read, Execute, Accessed */
1861 cs->s = 1;
1862 cs->dpl = 0; /* will be adjusted later */
1863 cs->present = 1;
1864 cs->db = 1;
1865
1866 ss->unusable = 0;
1867 ss->base = 0; /* flat segment */
1868 ss->limit = 0xffffffff; /* 4GB limit */
1869 ss->g = 1; /* 4kb granularity */
1870 ss->s = 1;
1871 ss->type = 0x03; /* Read/Write, Accessed */
1872 ss->db = 1; /* 32bit stack segment */
1873 ss->dpl = 0;
1874 ss->present = 1;
1875}
1876
1877static int
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001878emulate_syscall(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001879{
1880 struct decode_cache *c = &ctxt->decode;
1881 struct kvm_segment cs, ss;
1882 u64 msr_data;
1883
1884 /* syscall is not available in real mode */
Gleb Natapov2e901c42010-03-18 15:20:12 +02001885 if (ctxt->mode == X86EMUL_MODE_REAL ||
1886 ctxt->mode == X86EMUL_MODE_VM86) {
1887 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
1888 return X86EMUL_PROPAGATE_FAULT;
1889 }
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001890
1891 setup_syscalls_segments(ctxt, &cs, &ss);
1892
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001893 ops->get_msr(ctxt->vcpu, MSR_STAR, &msr_data);
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001894 msr_data >>= 32;
1895 cs.selector = (u16)(msr_data & 0xfffc);
1896 ss.selector = (u16)(msr_data + 8);
1897
1898 if (is_long_mode(ctxt->vcpu)) {
1899 cs.db = 0;
1900 cs.l = 1;
1901 }
1902 kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
1903 kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);
1904
1905 c->regs[VCPU_REGS_RCX] = c->eip;
1906 if (is_long_mode(ctxt->vcpu)) {
1907#ifdef CONFIG_X86_64
1908 c->regs[VCPU_REGS_R11] = ctxt->eflags & ~EFLG_RF;
1909
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001910 ops->get_msr(ctxt->vcpu,
1911 ctxt->mode == X86EMUL_MODE_PROT64 ?
1912 MSR_LSTAR : MSR_CSTAR, &msr_data);
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001913 c->eip = msr_data;
1914
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001915 ops->get_msr(ctxt->vcpu, MSR_SYSCALL_MASK, &msr_data);
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001916 ctxt->eflags &= ~(msr_data | EFLG_RF);
1917#endif
1918 } else {
1919 /* legacy mode */
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001920 ops->get_msr(ctxt->vcpu, MSR_STAR, &msr_data);
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001921 c->eip = (u32)msr_data;
1922
1923 ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF);
1924 }
1925
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02001926 return X86EMUL_CONTINUE;
Andre Przywarae66bb2c2009-06-18 12:56:00 +02001927}
1928
Andre Przywara8c604352009-06-18 12:56:01 +02001929static int
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001930emulate_sysenter(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
Andre Przywara8c604352009-06-18 12:56:01 +02001931{
1932 struct decode_cache *c = &ctxt->decode;
1933 struct kvm_segment cs, ss;
1934 u64 msr_data;
1935
Gleb Natapova0044752010-02-10 14:21:31 +02001936 /* inject #GP if in real mode */
1937 if (ctxt->mode == X86EMUL_MODE_REAL) {
Andre Przywara8c604352009-06-18 12:56:01 +02001938 kvm_inject_gp(ctxt->vcpu, 0);
Gleb Natapov2e901c42010-03-18 15:20:12 +02001939 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara8c604352009-06-18 12:56:01 +02001940 }
1941
1942 /* XXX sysenter/sysexit have not been tested in 64bit mode.
1943 * Therefore, we inject an #UD.
1944 */
Gleb Natapov2e901c42010-03-18 15:20:12 +02001945 if (ctxt->mode == X86EMUL_MODE_PROT64) {
1946 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
1947 return X86EMUL_PROPAGATE_FAULT;
1948 }
Andre Przywara8c604352009-06-18 12:56:01 +02001949
1950 setup_syscalls_segments(ctxt, &cs, &ss);
1951
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001952 ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data);
Andre Przywara8c604352009-06-18 12:56:01 +02001953 switch (ctxt->mode) {
1954 case X86EMUL_MODE_PROT32:
1955 if ((msr_data & 0xfffc) == 0x0) {
1956 kvm_inject_gp(ctxt->vcpu, 0);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02001957 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara8c604352009-06-18 12:56:01 +02001958 }
1959 break;
1960 case X86EMUL_MODE_PROT64:
1961 if (msr_data == 0x0) {
1962 kvm_inject_gp(ctxt->vcpu, 0);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02001963 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara8c604352009-06-18 12:56:01 +02001964 }
1965 break;
1966 }
1967
1968 ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF);
1969 cs.selector = (u16)msr_data;
1970 cs.selector &= ~SELECTOR_RPL_MASK;
1971 ss.selector = cs.selector + 8;
1972 ss.selector &= ~SELECTOR_RPL_MASK;
1973 if (ctxt->mode == X86EMUL_MODE_PROT64
1974 || is_long_mode(ctxt->vcpu)) {
1975 cs.db = 0;
1976 cs.l = 1;
1977 }
1978
1979 kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
1980 kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);
1981
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001982 ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_EIP, &msr_data);
Andre Przywara8c604352009-06-18 12:56:01 +02001983 c->eip = msr_data;
1984
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001985 ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_ESP, &msr_data);
Andre Przywara8c604352009-06-18 12:56:01 +02001986 c->regs[VCPU_REGS_RSP] = msr_data;
1987
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02001988 return X86EMUL_CONTINUE;
Andre Przywara8c604352009-06-18 12:56:01 +02001989}
1990
Andre Przywara4668f052009-06-18 12:56:02 +02001991static int
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03001992emulate_sysexit(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
Andre Przywara4668f052009-06-18 12:56:02 +02001993{
1994 struct decode_cache *c = &ctxt->decode;
1995 struct kvm_segment cs, ss;
1996 u64 msr_data;
1997 int usermode;
1998
Gleb Natapova0044752010-02-10 14:21:31 +02001999 /* inject #GP if in real mode or Virtual 8086 mode */
2000 if (ctxt->mode == X86EMUL_MODE_REAL ||
2001 ctxt->mode == X86EMUL_MODE_VM86) {
Andre Przywara4668f052009-06-18 12:56:02 +02002002 kvm_inject_gp(ctxt->vcpu, 0);
Gleb Natapov2e901c42010-03-18 15:20:12 +02002003 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara4668f052009-06-18 12:56:02 +02002004 }
2005
Andre Przywara4668f052009-06-18 12:56:02 +02002006 setup_syscalls_segments(ctxt, &cs, &ss);
2007
2008 if ((c->rex_prefix & 0x8) != 0x0)
2009 usermode = X86EMUL_MODE_PROT64;
2010 else
2011 usermode = X86EMUL_MODE_PROT32;
2012
2013 cs.dpl = 3;
2014 ss.dpl = 3;
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03002015 ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data);
Andre Przywara4668f052009-06-18 12:56:02 +02002016 switch (usermode) {
2017 case X86EMUL_MODE_PROT32:
2018 cs.selector = (u16)(msr_data + 16);
2019 if ((msr_data & 0xfffc) == 0x0) {
2020 kvm_inject_gp(ctxt->vcpu, 0);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02002021 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara4668f052009-06-18 12:56:02 +02002022 }
2023 ss.selector = (u16)(msr_data + 24);
2024 break;
2025 case X86EMUL_MODE_PROT64:
2026 cs.selector = (u16)(msr_data + 32);
2027 if (msr_data == 0x0) {
2028 kvm_inject_gp(ctxt->vcpu, 0);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02002029 return X86EMUL_PROPAGATE_FAULT;
Andre Przywara4668f052009-06-18 12:56:02 +02002030 }
2031 ss.selector = cs.selector + 8;
2032 cs.db = 0;
2033 cs.l = 1;
2034 break;
2035 }
2036 cs.selector |= SELECTOR_RPL_MASK;
2037 ss.selector |= SELECTOR_RPL_MASK;
2038
2039 kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS);
2040 kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS);
2041
2042 c->eip = ctxt->vcpu->arch.regs[VCPU_REGS_RDX];
2043 c->regs[VCPU_REGS_RSP] = ctxt->vcpu->arch.regs[VCPU_REGS_RCX];
2044
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02002045 return X86EMUL_CONTINUE;
Andre Przywara4668f052009-06-18 12:56:02 +02002046}
2047
Gleb Natapov9c537242010-03-18 15:20:05 +02002048static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt,
2049 struct x86_emulate_ops *ops)
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002050{
2051 int iopl;
2052 if (ctxt->mode == X86EMUL_MODE_REAL)
2053 return false;
2054 if (ctxt->mode == X86EMUL_MODE_VM86)
2055 return true;
2056 iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
Gleb Natapov9c537242010-03-18 15:20:05 +02002057 return ops->cpl(ctxt->vcpu) > iopl;
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002058}
2059
2060static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt,
2061 struct x86_emulate_ops *ops,
2062 u16 port, u16 len)
2063{
2064 struct kvm_segment tr_seg;
2065 int r;
2066 u16 io_bitmap_ptr;
2067 u8 perm, bit_idx = port & 0x7;
2068 unsigned mask = (1 << len) - 1;
2069
2070 kvm_get_segment(ctxt->vcpu, &tr_seg, VCPU_SREG_TR);
2071 if (tr_seg.unusable)
2072 return false;
2073 if (tr_seg.limit < 103)
2074 return false;
2075 r = ops->read_std(tr_seg.base + 102, &io_bitmap_ptr, 2, ctxt->vcpu,
2076 NULL);
2077 if (r != X86EMUL_CONTINUE)
2078 return false;
2079 if (io_bitmap_ptr + port/8 > tr_seg.limit)
2080 return false;
2081 r = ops->read_std(tr_seg.base + io_bitmap_ptr + port/8, &perm, 1,
2082 ctxt->vcpu, NULL);
2083 if (r != X86EMUL_CONTINUE)
2084 return false;
2085 if ((perm >> bit_idx) & mask)
2086 return false;
2087 return true;
2088}
2089
2090static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt,
2091 struct x86_emulate_ops *ops,
2092 u16 port, u16 len)
2093{
Gleb Natapov9c537242010-03-18 15:20:05 +02002094 if (emulator_bad_iopl(ctxt, ops))
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002095 if (!emulator_io_port_access_allowed(ctxt, ops, port, len))
2096 return false;
2097 return true;
2098}
2099
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002100static void save_state_to_tss16(struct x86_emulate_ctxt *ctxt,
2101 struct x86_emulate_ops *ops,
2102 struct tss_segment_16 *tss)
2103{
2104 struct decode_cache *c = &ctxt->decode;
2105
2106 tss->ip = c->eip;
2107 tss->flag = ctxt->eflags;
2108 tss->ax = c->regs[VCPU_REGS_RAX];
2109 tss->cx = c->regs[VCPU_REGS_RCX];
2110 tss->dx = c->regs[VCPU_REGS_RDX];
2111 tss->bx = c->regs[VCPU_REGS_RBX];
2112 tss->sp = c->regs[VCPU_REGS_RSP];
2113 tss->bp = c->regs[VCPU_REGS_RBP];
2114 tss->si = c->regs[VCPU_REGS_RSI];
2115 tss->di = c->regs[VCPU_REGS_RDI];
2116
2117 tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
2118 tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
2119 tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
2120 tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
2121 tss->ldt = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
2122}
2123
2124static int load_state_from_tss16(struct x86_emulate_ctxt *ctxt,
2125 struct x86_emulate_ops *ops,
2126 struct tss_segment_16 *tss)
2127{
2128 struct decode_cache *c = &ctxt->decode;
2129 int ret;
2130
2131 c->eip = tss->ip;
2132 ctxt->eflags = tss->flag | 2;
2133 c->regs[VCPU_REGS_RAX] = tss->ax;
2134 c->regs[VCPU_REGS_RCX] = tss->cx;
2135 c->regs[VCPU_REGS_RDX] = tss->dx;
2136 c->regs[VCPU_REGS_RBX] = tss->bx;
2137 c->regs[VCPU_REGS_RSP] = tss->sp;
2138 c->regs[VCPU_REGS_RBP] = tss->bp;
2139 c->regs[VCPU_REGS_RSI] = tss->si;
2140 c->regs[VCPU_REGS_RDI] = tss->di;
2141
2142 /*
2143 * SDM says that segment selectors are loaded before segment
2144 * descriptors
2145 */
2146 ops->set_segment_selector(tss->ldt, VCPU_SREG_LDTR, ctxt->vcpu);
2147 ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
2148 ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
2149 ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
2150 ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
2151
2152 /*
2153 * Now load segment descriptors. If fault happenes at this stage
2154 * it is handled in a context of new task
2155 */
2156 ret = load_segment_descriptor(ctxt, ops, tss->ldt, VCPU_SREG_LDTR);
2157 if (ret != X86EMUL_CONTINUE)
2158 return ret;
2159 ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES);
2160 if (ret != X86EMUL_CONTINUE)
2161 return ret;
2162 ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS);
2163 if (ret != X86EMUL_CONTINUE)
2164 return ret;
2165 ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS);
2166 if (ret != X86EMUL_CONTINUE)
2167 return ret;
2168 ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS);
2169 if (ret != X86EMUL_CONTINUE)
2170 return ret;
2171
2172 return X86EMUL_CONTINUE;
2173}
2174
2175static int task_switch_16(struct x86_emulate_ctxt *ctxt,
2176 struct x86_emulate_ops *ops,
2177 u16 tss_selector, u16 old_tss_sel,
2178 ulong old_tss_base, struct desc_struct *new_desc)
2179{
2180 struct tss_segment_16 tss_seg;
2181 int ret;
2182 u32 err, new_tss_base = get_desc_base(new_desc);
2183
2184 ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2185 &err);
2186 if (ret == X86EMUL_PROPAGATE_FAULT) {
2187 /* FIXME: need to provide precise fault address */
2188 kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
2189 return ret;
2190 }
2191
2192 save_state_to_tss16(ctxt, ops, &tss_seg);
2193
2194 ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2195 &err);
2196 if (ret == X86EMUL_PROPAGATE_FAULT) {
2197 /* FIXME: need to provide precise fault address */
2198 kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
2199 return ret;
2200 }
2201
2202 ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2203 &err);
2204 if (ret == X86EMUL_PROPAGATE_FAULT) {
2205 /* FIXME: need to provide precise fault address */
2206 kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
2207 return ret;
2208 }
2209
2210 if (old_tss_sel != 0xffff) {
2211 tss_seg.prev_task_link = old_tss_sel;
2212
2213 ret = ops->write_std(new_tss_base,
2214 &tss_seg.prev_task_link,
2215 sizeof tss_seg.prev_task_link,
2216 ctxt->vcpu, &err);
2217 if (ret == X86EMUL_PROPAGATE_FAULT) {
2218 /* FIXME: need to provide precise fault address */
2219 kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
2220 return ret;
2221 }
2222 }
2223
2224 return load_state_from_tss16(ctxt, ops, &tss_seg);
2225}
2226
2227static void save_state_to_tss32(struct x86_emulate_ctxt *ctxt,
2228 struct x86_emulate_ops *ops,
2229 struct tss_segment_32 *tss)
2230{
2231 struct decode_cache *c = &ctxt->decode;
2232
2233 tss->cr3 = ops->get_cr(3, ctxt->vcpu);
2234 tss->eip = c->eip;
2235 tss->eflags = ctxt->eflags;
2236 tss->eax = c->regs[VCPU_REGS_RAX];
2237 tss->ecx = c->regs[VCPU_REGS_RCX];
2238 tss->edx = c->regs[VCPU_REGS_RDX];
2239 tss->ebx = c->regs[VCPU_REGS_RBX];
2240 tss->esp = c->regs[VCPU_REGS_RSP];
2241 tss->ebp = c->regs[VCPU_REGS_RBP];
2242 tss->esi = c->regs[VCPU_REGS_RSI];
2243 tss->edi = c->regs[VCPU_REGS_RDI];
2244
2245 tss->es = ops->get_segment_selector(VCPU_SREG_ES, ctxt->vcpu);
2246 tss->cs = ops->get_segment_selector(VCPU_SREG_CS, ctxt->vcpu);
2247 tss->ss = ops->get_segment_selector(VCPU_SREG_SS, ctxt->vcpu);
2248 tss->ds = ops->get_segment_selector(VCPU_SREG_DS, ctxt->vcpu);
2249 tss->fs = ops->get_segment_selector(VCPU_SREG_FS, ctxt->vcpu);
2250 tss->gs = ops->get_segment_selector(VCPU_SREG_GS, ctxt->vcpu);
2251 tss->ldt_selector = ops->get_segment_selector(VCPU_SREG_LDTR, ctxt->vcpu);
2252}
2253
2254static int load_state_from_tss32(struct x86_emulate_ctxt *ctxt,
2255 struct x86_emulate_ops *ops,
2256 struct tss_segment_32 *tss)
2257{
2258 struct decode_cache *c = &ctxt->decode;
2259 int ret;
2260
2261 ops->set_cr(3, tss->cr3, ctxt->vcpu);
2262 c->eip = tss->eip;
2263 ctxt->eflags = tss->eflags | 2;
2264 c->regs[VCPU_REGS_RAX] = tss->eax;
2265 c->regs[VCPU_REGS_RCX] = tss->ecx;
2266 c->regs[VCPU_REGS_RDX] = tss->edx;
2267 c->regs[VCPU_REGS_RBX] = tss->ebx;
2268 c->regs[VCPU_REGS_RSP] = tss->esp;
2269 c->regs[VCPU_REGS_RBP] = tss->ebp;
2270 c->regs[VCPU_REGS_RSI] = tss->esi;
2271 c->regs[VCPU_REGS_RDI] = tss->edi;
2272
2273 /*
2274 * SDM says that segment selectors are loaded before segment
2275 * descriptors
2276 */
2277 ops->set_segment_selector(tss->ldt_selector, VCPU_SREG_LDTR, ctxt->vcpu);
2278 ops->set_segment_selector(tss->es, VCPU_SREG_ES, ctxt->vcpu);
2279 ops->set_segment_selector(tss->cs, VCPU_SREG_CS, ctxt->vcpu);
2280 ops->set_segment_selector(tss->ss, VCPU_SREG_SS, ctxt->vcpu);
2281 ops->set_segment_selector(tss->ds, VCPU_SREG_DS, ctxt->vcpu);
2282 ops->set_segment_selector(tss->fs, VCPU_SREG_FS, ctxt->vcpu);
2283 ops->set_segment_selector(tss->gs, VCPU_SREG_GS, ctxt->vcpu);
2284
2285 /*
2286 * Now load segment descriptors. If fault happenes at this stage
2287 * it is handled in a context of new task
2288 */
2289 ret = load_segment_descriptor(ctxt, ops, tss->ldt_selector, VCPU_SREG_LDTR);
2290 if (ret != X86EMUL_CONTINUE)
2291 return ret;
2292 ret = load_segment_descriptor(ctxt, ops, tss->es, VCPU_SREG_ES);
2293 if (ret != X86EMUL_CONTINUE)
2294 return ret;
2295 ret = load_segment_descriptor(ctxt, ops, tss->cs, VCPU_SREG_CS);
2296 if (ret != X86EMUL_CONTINUE)
2297 return ret;
2298 ret = load_segment_descriptor(ctxt, ops, tss->ss, VCPU_SREG_SS);
2299 if (ret != X86EMUL_CONTINUE)
2300 return ret;
2301 ret = load_segment_descriptor(ctxt, ops, tss->ds, VCPU_SREG_DS);
2302 if (ret != X86EMUL_CONTINUE)
2303 return ret;
2304 ret = load_segment_descriptor(ctxt, ops, tss->fs, VCPU_SREG_FS);
2305 if (ret != X86EMUL_CONTINUE)
2306 return ret;
2307 ret = load_segment_descriptor(ctxt, ops, tss->gs, VCPU_SREG_GS);
2308 if (ret != X86EMUL_CONTINUE)
2309 return ret;
2310
2311 return X86EMUL_CONTINUE;
2312}
2313
2314static int task_switch_32(struct x86_emulate_ctxt *ctxt,
2315 struct x86_emulate_ops *ops,
2316 u16 tss_selector, u16 old_tss_sel,
2317 ulong old_tss_base, struct desc_struct *new_desc)
2318{
2319 struct tss_segment_32 tss_seg;
2320 int ret;
2321 u32 err, new_tss_base = get_desc_base(new_desc);
2322
2323 ret = ops->read_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2324 &err);
2325 if (ret == X86EMUL_PROPAGATE_FAULT) {
2326 /* FIXME: need to provide precise fault address */
2327 kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
2328 return ret;
2329 }
2330
2331 save_state_to_tss32(ctxt, ops, &tss_seg);
2332
2333 ret = ops->write_std(old_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2334 &err);
2335 if (ret == X86EMUL_PROPAGATE_FAULT) {
2336 /* FIXME: need to provide precise fault address */
2337 kvm_inject_page_fault(ctxt->vcpu, old_tss_base, err);
2338 return ret;
2339 }
2340
2341 ret = ops->read_std(new_tss_base, &tss_seg, sizeof tss_seg, ctxt->vcpu,
2342 &err);
2343 if (ret == X86EMUL_PROPAGATE_FAULT) {
2344 /* FIXME: need to provide precise fault address */
2345 kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
2346 return ret;
2347 }
2348
2349 if (old_tss_sel != 0xffff) {
2350 tss_seg.prev_task_link = old_tss_sel;
2351
2352 ret = ops->write_std(new_tss_base,
2353 &tss_seg.prev_task_link,
2354 sizeof tss_seg.prev_task_link,
2355 ctxt->vcpu, &err);
2356 if (ret == X86EMUL_PROPAGATE_FAULT) {
2357 /* FIXME: need to provide precise fault address */
2358 kvm_inject_page_fault(ctxt->vcpu, new_tss_base, err);
2359 return ret;
2360 }
2361 }
2362
2363 return load_state_from_tss32(ctxt, ops, &tss_seg);
2364}
2365
2366static int emulator_do_task_switch(struct x86_emulate_ctxt *ctxt,
Jan Kiszkae269fb22010-04-14 15:51:09 +02002367 struct x86_emulate_ops *ops,
2368 u16 tss_selector, int reason,
2369 bool has_error_code, u32 error_code)
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002370{
2371 struct desc_struct curr_tss_desc, next_tss_desc;
2372 int ret;
2373 u16 old_tss_sel = ops->get_segment_selector(VCPU_SREG_TR, ctxt->vcpu);
2374 ulong old_tss_base =
Gleb Natapov5951c442010-04-28 19:15:29 +03002375 ops->get_cached_segment_base(VCPU_SREG_TR, ctxt->vcpu);
Gleb Natapovceffb452010-03-18 15:20:19 +02002376 u32 desc_limit;
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002377
2378 /* FIXME: old_tss_base == ~0 ? */
2379
2380 ret = read_segment_descriptor(ctxt, ops, tss_selector, &next_tss_desc);
2381 if (ret != X86EMUL_CONTINUE)
2382 return ret;
2383 ret = read_segment_descriptor(ctxt, ops, old_tss_sel, &curr_tss_desc);
2384 if (ret != X86EMUL_CONTINUE)
2385 return ret;
2386
2387 /* FIXME: check that next_tss_desc is tss */
2388
2389 if (reason != TASK_SWITCH_IRET) {
2390 if ((tss_selector & 3) > next_tss_desc.dpl ||
2391 ops->cpl(ctxt->vcpu) > next_tss_desc.dpl) {
2392 kvm_inject_gp(ctxt->vcpu, 0);
2393 return X86EMUL_PROPAGATE_FAULT;
2394 }
2395 }
2396
Gleb Natapovceffb452010-03-18 15:20:19 +02002397 desc_limit = desc_limit_scaled(&next_tss_desc);
2398 if (!next_tss_desc.p ||
2399 ((desc_limit < 0x67 && (next_tss_desc.type & 8)) ||
2400 desc_limit < 0x2b)) {
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002401 kvm_queue_exception_e(ctxt->vcpu, TS_VECTOR,
2402 tss_selector & 0xfffc);
2403 return X86EMUL_PROPAGATE_FAULT;
2404 }
2405
2406 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
2407 curr_tss_desc.type &= ~(1 << 1); /* clear busy flag */
2408 write_segment_descriptor(ctxt, ops, old_tss_sel,
2409 &curr_tss_desc);
2410 }
2411
2412 if (reason == TASK_SWITCH_IRET)
2413 ctxt->eflags = ctxt->eflags & ~X86_EFLAGS_NT;
2414
2415 /* set back link to prev task only if NT bit is set in eflags
2416 note that old_tss_sel is not used afetr this point */
2417 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
2418 old_tss_sel = 0xffff;
2419
2420 if (next_tss_desc.type & 8)
2421 ret = task_switch_32(ctxt, ops, tss_selector, old_tss_sel,
2422 old_tss_base, &next_tss_desc);
2423 else
2424 ret = task_switch_16(ctxt, ops, tss_selector, old_tss_sel,
2425 old_tss_base, &next_tss_desc);
Jan Kiszka0760d442010-04-14 15:50:57 +02002426 if (ret != X86EMUL_CONTINUE)
2427 return ret;
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002428
2429 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE)
2430 ctxt->eflags = ctxt->eflags | X86_EFLAGS_NT;
2431
2432 if (reason != TASK_SWITCH_IRET) {
2433 next_tss_desc.type |= (1 << 1); /* set busy flag */
2434 write_segment_descriptor(ctxt, ops, tss_selector,
2435 &next_tss_desc);
2436 }
2437
2438 ops->set_cr(0, ops->get_cr(0, ctxt->vcpu) | X86_CR0_TS, ctxt->vcpu);
2439 ops->set_cached_descriptor(&next_tss_desc, VCPU_SREG_TR, ctxt->vcpu);
2440 ops->set_segment_selector(tss_selector, VCPU_SREG_TR, ctxt->vcpu);
2441
Jan Kiszkae269fb22010-04-14 15:51:09 +02002442 if (has_error_code) {
2443 struct decode_cache *c = &ctxt->decode;
2444
2445 c->op_bytes = c->ad_bytes = (next_tss_desc.type & 8) ? 4 : 2;
2446 c->lock_prefix = 0;
2447 c->src.val = (unsigned long) error_code;
2448 emulate_push(ctxt);
2449 }
2450
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002451 return ret;
2452}
2453
2454int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
2455 struct x86_emulate_ops *ops,
Jan Kiszkae269fb22010-04-14 15:51:09 +02002456 u16 tss_selector, int reason,
2457 bool has_error_code, u32 error_code)
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002458{
2459 struct decode_cache *c = &ctxt->decode;
2460 int rc;
2461
2462 memset(c, 0, sizeof(struct decode_cache));
2463 c->eip = ctxt->eip;
2464 memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
Jan Kiszkae269fb22010-04-14 15:51:09 +02002465 c->dst.type = OP_NONE;
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002466
Jan Kiszkae269fb22010-04-14 15:51:09 +02002467 rc = emulator_do_task_switch(ctxt, ops, tss_selector, reason,
2468 has_error_code, error_code);
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002469
2470 if (rc == X86EMUL_CONTINUE) {
2471 memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
2472 kvm_rip_write(ctxt->vcpu, c->eip);
Jan Kiszkae269fb22010-04-14 15:51:09 +02002473 rc = writeback(ctxt, ops);
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002474 }
2475
Gleb Natapov19d04432010-04-15 12:29:50 +03002476 return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
Gleb Natapov38ba30b2010-03-18 15:20:17 +02002477}
2478
Gleb Natapova682e352010-03-18 15:20:21 +02002479static void string_addr_inc(struct x86_emulate_ctxt *ctxt, unsigned long base,
Gleb Natapovd9271122010-03-18 15:20:22 +02002480 int reg, struct operand *op)
Gleb Natapova682e352010-03-18 15:20:21 +02002481{
2482 struct decode_cache *c = &ctxt->decode;
2483 int df = (ctxt->eflags & EFLG_DF) ? -1 : 1;
2484
Gleb Natapovd9271122010-03-18 15:20:22 +02002485 register_address_increment(c, &c->regs[reg], df * op->bytes);
2486 op->ptr = (unsigned long *)register_address(c, base, c->regs[reg]);
Gleb Natapova682e352010-03-18 15:20:21 +02002487}
2488
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002489int
Laurent Vivier1be3aa42007-09-18 11:27:27 +02002490x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002491{
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002492 u64 msr_data;
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002493 struct decode_cache *c = &ctxt->decode;
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002494 int rc = X86EMUL_CONTINUE;
Gleb Natapov5cd21912010-03-18 15:20:26 +02002495 int saved_dst_type = c->dst.type;
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002496
Glauber Costa310b5d32009-05-12 16:21:06 -04002497 ctxt->interruptibility = 0;
Gleb Natapov9de41572010-04-28 19:15:22 +03002498 ctxt->decode.mem_read.pos = 0;
Glauber Costa310b5d32009-05-12 16:21:06 -04002499
Laurent Vivier34273182007-09-18 11:27:37 +02002500 /* Shadow copy of register state. Committed on successful emulation.
2501 * NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
2502 * modify them.
2503 */
2504
Zhang Xiantaoad312c72007-12-13 23:50:52 +08002505 memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
Laurent Vivier34273182007-09-18 11:27:37 +02002506
Gleb Natapov11616242010-02-11 14:43:14 +02002507 if (ctxt->mode == X86EMUL_MODE_PROT64 && (c->d & No64)) {
2508 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
2509 goto done;
2510 }
2511
Gleb Natapovd380a5e2010-02-10 14:21:36 +02002512 /* LOCK prefix is allowed only with some instructions */
Gleb Natapova41ffb752010-03-18 15:20:14 +02002513 if (c->lock_prefix && (!(c->d & Lock) || c->dst.type != OP_MEM)) {
Gleb Natapovd380a5e2010-02-10 14:21:36 +02002514 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
2515 goto done;
2516 }
2517
Gleb Natapove92805a2010-02-10 14:21:35 +02002518 /* Privileged instruction can be executed only in CPL=0 */
Gleb Natapov9c537242010-03-18 15:20:05 +02002519 if ((c->d & Priv) && ops->cpl(ctxt->vcpu)) {
Gleb Natapove92805a2010-02-10 14:21:35 +02002520 kvm_inject_gp(ctxt->vcpu, 0);
2521 goto done;
2522 }
2523
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002524 if (c->rep_prefix && (c->d & String)) {
Gleb Natapov5cd21912010-03-18 15:20:26 +02002525 ctxt->restart = true;
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002526 /* All REP prefixes have the same first termination condition */
Gleb Natapovc73e1972010-03-15 16:38:29 +02002527 if (address_mask(c, c->regs[VCPU_REGS_RCX]) == 0) {
Gleb Natapov5cd21912010-03-18 15:20:26 +02002528 string_done:
2529 ctxt->restart = false;
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002530 kvm_rip_write(ctxt->vcpu, c->eip);
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002531 goto done;
2532 }
2533 /* The second termination condition only applies for REPE
2534 * and REPNE. Test if the repeat string operation prefix is
2535 * REPE/REPZ or REPNE/REPNZ and if it's the case it tests the
2536 * corresponding termination condition according to:
2537 * - if REPE/REPZ and ZF = 0 then done
2538 * - if REPNE/REPNZ and ZF = 1 then done
2539 */
2540 if ((c->b == 0xa6) || (c->b == 0xa7) ||
Gleb Natapov5cd21912010-03-18 15:20:26 +02002541 (c->b == 0xae) || (c->b == 0xaf)) {
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002542 if ((c->rep_prefix == REPE_PREFIX) &&
Gleb Natapov5cd21912010-03-18 15:20:26 +02002543 ((ctxt->eflags & EFLG_ZF) == 0))
2544 goto string_done;
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002545 if ((c->rep_prefix == REPNE_PREFIX) &&
Gleb Natapov5cd21912010-03-18 15:20:26 +02002546 ((ctxt->eflags & EFLG_ZF) == EFLG_ZF))
2547 goto string_done;
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002548 }
Gleb Natapov063db062010-03-18 15:20:06 +02002549 c->eip = ctxt->eip;
Avi Kivityb9fa9d62007-11-27 19:05:37 +02002550 }
2551
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002552 if (c->src.type == OP_MEM) {
Gleb Natapov9de41572010-04-28 19:15:22 +03002553 rc = read_emulated(ctxt, ops, (unsigned long)c->src.ptr,
Gleb Natapov414e6272010-04-28 19:15:26 +03002554 c->src.valptr, c->src.bytes);
Takuya Yoshikawab60d5132010-01-20 16:47:21 +09002555 if (rc != X86EMUL_CONTINUE)
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002556 goto done;
2557 c->src.orig_val = c->src.val;
2558 }
2559
Gleb Natapove35b7b92010-02-25 16:36:42 +02002560 if (c->src2.type == OP_MEM) {
Gleb Natapov9de41572010-04-28 19:15:22 +03002561 rc = read_emulated(ctxt, ops, (unsigned long)c->src2.ptr,
2562 &c->src2.val, c->src2.bytes);
Gleb Natapove35b7b92010-02-25 16:36:42 +02002563 if (rc != X86EMUL_CONTINUE)
2564 goto done;
2565 }
2566
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002567 if ((c->d & DstMask) == ImplicitOps)
2568 goto special_insn;
2569
2570
Gleb Natapov69f55cb2010-03-18 15:20:20 +02002571 if ((c->dst.type == OP_MEM) && !(c->d & Mov)) {
2572 /* optimisation - avoid slow emulated read if Mov */
Gleb Natapov9de41572010-04-28 19:15:22 +03002573 rc = read_emulated(ctxt, ops, (unsigned long)c->dst.ptr,
2574 &c->dst.val, c->dst.bytes);
Gleb Natapov69f55cb2010-03-18 15:20:20 +02002575 if (rc != X86EMUL_CONTINUE)
2576 goto done;
Avi Kivity038e51d2007-01-22 20:40:40 -08002577 }
Laurent Viviere4e03de2007-09-18 11:52:50 +02002578 c->dst.orig_val = c->dst.val;
Avi Kivity038e51d2007-01-22 20:40:40 -08002579
Avi Kivity018a98d2007-11-27 19:30:56 +02002580special_insn:
2581
Laurent Viviere4e03de2007-09-18 11:52:50 +02002582 if (c->twobyte)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002583 goto twobyte_insn;
2584
Laurent Viviere4e03de2007-09-18 11:52:50 +02002585 switch (c->b) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002586 case 0x00 ... 0x05:
2587 add: /* add */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002588 emulate_2op_SrcV("add", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002589 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002590 case 0x06: /* push es */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002591 emulate_push_sreg(ctxt, VCPU_SREG_ES);
2592 break;
2593 case 0x07: /* pop es */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002594 rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002595 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002596 goto done;
2597 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002598 case 0x08 ... 0x0d:
2599 or: /* or */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002600 emulate_2op_SrcV("or", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002601 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002602 case 0x0e: /* push cs */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002603 emulate_push_sreg(ctxt, VCPU_SREG_CS);
2604 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002605 case 0x10 ... 0x15:
2606 adc: /* adc */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002607 emulate_2op_SrcV("adc", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002608 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002609 case 0x16: /* push ss */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002610 emulate_push_sreg(ctxt, VCPU_SREG_SS);
2611 break;
2612 case 0x17: /* pop ss */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002613 rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002614 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002615 goto done;
2616 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002617 case 0x18 ... 0x1d:
2618 sbb: /* sbb */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002619 emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002620 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002621 case 0x1e: /* push ds */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002622 emulate_push_sreg(ctxt, VCPU_SREG_DS);
2623 break;
2624 case 0x1f: /* pop ds */
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002625 rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002626 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03002627 goto done;
2628 break;
Guillaume Thouveninaa3a8162008-09-12 13:52:18 +02002629 case 0x20 ... 0x25:
Avi Kivity6aa8b732006-12-10 02:21:36 -08002630 and: /* and */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002631 emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002632 break;
2633 case 0x28 ... 0x2d:
2634 sub: /* sub */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002635 emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002636 break;
2637 case 0x30 ... 0x35:
2638 xor: /* xor */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002639 emulate_2op_SrcV("xor", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002640 break;
2641 case 0x38 ... 0x3d:
2642 cmp: /* cmp */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002643 emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002644 break;
Avi Kivity33615aa2007-10-31 11:15:56 +02002645 case 0x40 ... 0x47: /* inc r16/r32 */
2646 emulate_1op("inc", c->dst, ctxt->eflags);
2647 break;
2648 case 0x48 ... 0x4f: /* dec r16/r32 */
2649 emulate_1op("dec", c->dst, ctxt->eflags);
2650 break;
2651 case 0x50 ... 0x57: /* push reg */
Guillaume Thouvenin2786b012008-09-22 16:08:06 +02002652 emulate_push(ctxt);
Avi Kivity33615aa2007-10-31 11:15:56 +02002653 break;
2654 case 0x58 ... 0x5f: /* pop reg */
2655 pop_instruction:
Avi Kivity350f69d2009-01-05 11:12:40 +02002656 rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002657 if (rc != X86EMUL_CONTINUE)
Avi Kivity33615aa2007-10-31 11:15:56 +02002658 goto done;
Avi Kivity33615aa2007-10-31 11:15:56 +02002659 break;
Mohammed Gamalabcf14b2009-09-01 15:28:11 +02002660 case 0x60: /* pusha */
2661 emulate_pusha(ctxt);
2662 break;
2663 case 0x61: /* popa */
2664 rc = emulate_popa(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002665 if (rc != X86EMUL_CONTINUE)
Mohammed Gamalabcf14b2009-09-01 15:28:11 +02002666 goto done;
2667 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002668 case 0x63: /* movsxd */
Laurent Vivier8b4caf62007-09-18 11:27:19 +02002669 if (ctxt->mode != X86EMUL_MODE_PROT64)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002670 goto cannot_emulate;
Laurent Viviere4e03de2007-09-18 11:52:50 +02002671 c->dst.val = (s32) c->src.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002672 break;
Avi Kivity91ed7a02008-05-29 14:38:38 +03002673 case 0x68: /* push imm */
Avi Kivity018a98d2007-11-27 19:30:56 +02002674 case 0x6a: /* push imm8 */
Avi Kivity018a98d2007-11-27 19:30:56 +02002675 emulate_push(ctxt);
2676 break;
2677 case 0x6c: /* insb */
2678 case 0x6d: /* insw/insd */
Gleb Natapov79729952010-03-18 15:20:24 +02002679 c->dst.bytes = min(c->dst.bytes, 4u);
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002680 if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
Gleb Natapov79729952010-03-18 15:20:24 +02002681 c->dst.bytes)) {
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002682 kvm_inject_gp(ctxt->vcpu, 0);
2683 goto done;
2684 }
Gleb Natapov7b262e92010-03-18 15:20:27 +02002685 if (!pio_in_emulated(ctxt, ops, c->dst.bytes,
2686 c->regs[VCPU_REGS_RDX], &c->dst.val))
Gleb Natapov79729952010-03-18 15:20:24 +02002687 goto done; /* IO is needed, skip writeback */
2688 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02002689 case 0x6e: /* outsb */
2690 case 0x6f: /* outsw/outsd */
Gleb Natapov79729952010-03-18 15:20:24 +02002691 c->src.bytes = min(c->src.bytes, 4u);
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002692 if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
Gleb Natapov79729952010-03-18 15:20:24 +02002693 c->src.bytes)) {
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002694 kvm_inject_gp(ctxt->vcpu, 0);
2695 goto done;
2696 }
Gleb Natapov79729952010-03-18 15:20:24 +02002697 ops->pio_out_emulated(c->src.bytes, c->regs[VCPU_REGS_RDX],
2698 &c->src.val, 1, ctxt->vcpu);
2699
2700 c->dst.type = OP_NONE; /* nothing to writeback */
2701 break;
Gleb Natapovb2833e32009-04-12 13:36:30 +03002702 case 0x70 ... 0x7f: /* jcc (short) */
Avi Kivity018a98d2007-11-27 19:30:56 +02002703 if (test_cc(c->b, ctxt->eflags))
Gleb Natapovb2833e32009-04-12 13:36:30 +03002704 jmp_rel(c, c->src.val);
Avi Kivity018a98d2007-11-27 19:30:56 +02002705 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002706 case 0x80 ... 0x83: /* Grp1 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02002707 switch (c->modrm_reg) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002708 case 0:
2709 goto add;
2710 case 1:
2711 goto or;
2712 case 2:
2713 goto adc;
2714 case 3:
2715 goto sbb;
2716 case 4:
2717 goto and;
2718 case 5:
2719 goto sub;
2720 case 6:
2721 goto xor;
2722 case 7:
2723 goto cmp;
2724 }
2725 break;
2726 case 0x84 ... 0x85:
Laurent Vivier05f086f2007-09-24 11:10:55 +02002727 emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002728 break;
2729 case 0x86 ... 0x87: /* xchg */
Mohammed Gamalb13354f2008-06-15 19:37:38 +03002730 xchg:
Avi Kivity6aa8b732006-12-10 02:21:36 -08002731 /* Write back the register source. */
Laurent Viviere4e03de2007-09-18 11:52:50 +02002732 switch (c->dst.bytes) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002733 case 1:
Laurent Viviere4e03de2007-09-18 11:52:50 +02002734 *(u8 *) c->src.ptr = (u8) c->dst.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002735 break;
2736 case 2:
Laurent Viviere4e03de2007-09-18 11:52:50 +02002737 *(u16 *) c->src.ptr = (u16) c->dst.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002738 break;
2739 case 4:
Laurent Viviere4e03de2007-09-18 11:52:50 +02002740 *c->src.ptr = (u32) c->dst.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002741 break; /* 64b reg: zero-extend */
2742 case 8:
Laurent Viviere4e03de2007-09-18 11:52:50 +02002743 *c->src.ptr = c->dst.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002744 break;
2745 }
2746 /*
2747 * Write back the memory destination with implicit LOCK
2748 * prefix.
2749 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02002750 c->dst.val = c->src.val;
2751 c->lock_prefix = 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002752 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002753 case 0x88 ... 0x8b: /* mov */
Nitin A Kamble7de75242007-09-15 10:13:07 +03002754 goto mov;
Guillaume Thouvenin38d5bc62008-05-27 15:13:28 +02002755 case 0x8c: { /* mov r/m, sreg */
2756 struct kvm_segment segreg;
2757
Gleb Natapov5e3ae6c2010-03-18 15:20:07 +02002758 if (c->modrm_reg <= VCPU_SREG_GS)
Guillaume Thouvenin38d5bc62008-05-27 15:13:28 +02002759 kvm_get_segment(ctxt->vcpu, &segreg, c->modrm_reg);
2760 else {
Gleb Natapov5e3ae6c2010-03-18 15:20:07 +02002761 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
2762 goto done;
Guillaume Thouvenin38d5bc62008-05-27 15:13:28 +02002763 }
2764 c->dst.val = segreg.selector;
2765 break;
2766 }
Nitin A Kamble7e0b54b2007-09-15 10:35:36 +03002767 case 0x8d: /* lea r16/r32, m */
Avi Kivityf9b7aab2008-04-14 23:46:37 +03002768 c->dst.val = c->modrm_ea;
Nitin A Kamble7e0b54b2007-09-15 10:35:36 +03002769 break;
Guillaume Thouvenin42571982008-05-27 14:49:15 +02002770 case 0x8e: { /* mov seg, r/m16 */
2771 uint16_t sel;
Guillaume Thouvenin42571982008-05-27 14:49:15 +02002772
2773 sel = c->src.val;
Gleb Natapov8b9f4412010-02-18 12:14:59 +02002774
Gleb Natapovc6975182010-02-18 12:15:01 +02002775 if (c->modrm_reg == VCPU_SREG_CS ||
2776 c->modrm_reg > VCPU_SREG_GS) {
Gleb Natapov8b9f4412010-02-18 12:14:59 +02002777 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
2778 goto done;
2779 }
2780
Glauber Costa310b5d32009-05-12 16:21:06 -04002781 if (c->modrm_reg == VCPU_SREG_SS)
Jan Kiszka48005f62010-02-19 19:38:07 +01002782 toggle_interruptibility(ctxt, KVM_X86_SHADOW_INT_MOV_SS);
Glauber Costa310b5d32009-05-12 16:21:06 -04002783
Gleb Natapov2e873022010-03-18 15:20:18 +02002784 rc = load_segment_descriptor(ctxt, ops, sel, c->modrm_reg);
Guillaume Thouvenin42571982008-05-27 14:49:15 +02002785
2786 c->dst.type = OP_NONE; /* Disable writeback. */
2787 break;
2788 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08002789 case 0x8f: /* pop (sole member of Grp1a) */
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02002790 rc = emulate_grp1a(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002791 if (rc != X86EMUL_CONTINUE)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002792 goto done;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002793 break;
Mohammed Gamalb13354f2008-06-15 19:37:38 +03002794 case 0x90: /* nop / xchg r8,rax */
Gleb Natapovb8a98942010-04-28 19:15:25 +03002795 if (c->dst.ptr == (unsigned long *)&c->regs[VCPU_REGS_RAX]) {
2796 c->dst.type = OP_NONE; /* nop */
Mohammed Gamalb13354f2008-06-15 19:37:38 +03002797 break;
2798 }
2799 case 0x91 ... 0x97: /* xchg reg,rax */
Gleb Natapovf0c13ef2010-04-28 19:15:24 +03002800 c->src.type = OP_REG;
2801 c->src.bytes = c->op_bytes;
Mohammed Gamalb13354f2008-06-15 19:37:38 +03002802 c->src.ptr = (unsigned long *) &c->regs[VCPU_REGS_RAX];
2803 c->src.val = *(c->src.ptr);
2804 goto xchg;
Nitin A Kamblefd2a7602007-08-28 18:22:47 -07002805 case 0x9c: /* pushf */
Laurent Vivier05f086f2007-09-24 11:10:55 +02002806 c->src.val = (unsigned long) ctxt->eflags;
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02002807 emulate_push(ctxt);
2808 break;
Nitin A Kamble535eabc2007-09-15 10:45:05 +03002809 case 0x9d: /* popf */
Avi Kivity2b48cc72008-11-29 20:36:13 +02002810 c->dst.type = OP_REG;
Laurent Vivier05f086f2007-09-24 11:10:55 +02002811 c->dst.ptr = (unsigned long *) &ctxt->eflags;
Avi Kivity2b48cc72008-11-29 20:36:13 +02002812 c->dst.bytes = c->op_bytes;
Gleb Natapovd4c6a152010-02-10 14:21:34 +02002813 rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes);
2814 if (rc != X86EMUL_CONTINUE)
2815 goto done;
2816 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02002817 case 0xa0 ... 0xa1: /* mov */
2818 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
2819 c->dst.val = c->src.val;
2820 break;
2821 case 0xa2 ... 0xa3: /* mov */
2822 c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX];
2823 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002824 case 0xa4 ... 0xa5: /* movs */
Gleb Natapova682e352010-03-18 15:20:21 +02002825 goto mov;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002826 case 0xa6 ... 0xa7: /* cmps */
Guillaume Thouvenind7e51172007-11-26 13:49:09 +01002827 c->dst.type = OP_NONE; /* Disable writeback. */
Guillaume Thouvenind7e51172007-11-26 13:49:09 +01002828 DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr);
Gleb Natapova682e352010-03-18 15:20:21 +02002829 goto cmp;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002830 case 0xaa ... 0xab: /* stos */
Laurent Viviere4e03de2007-09-18 11:52:50 +02002831 c->dst.val = c->regs[VCPU_REGS_RAX];
Avi Kivity6aa8b732006-12-10 02:21:36 -08002832 break;
2833 case 0xac ... 0xad: /* lods */
Gleb Natapova682e352010-03-18 15:20:21 +02002834 goto mov;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002835 case 0xae ... 0xaf: /* scas */
2836 DPRINTF("Urk! I don't handle SCAS.\n");
2837 goto cannot_emulate;
Mohammed Gamala5e2e822008-08-27 05:02:56 +03002838 case 0xb0 ... 0xbf: /* mov r, imm */
Guillaume Thouvenin615ac122008-05-27 10:19:16 +02002839 goto mov;
Avi Kivity018a98d2007-11-27 19:30:56 +02002840 case 0xc0 ... 0xc1:
2841 emulate_grp2(ctxt);
2842 break;
Avi Kivity111de5d2007-11-27 19:14:21 +02002843 case 0xc3: /* ret */
Avi Kivitycf5de4f2008-11-28 00:14:07 +02002844 c->dst.type = OP_REG;
Avi Kivity111de5d2007-11-27 19:14:21 +02002845 c->dst.ptr = &c->eip;
Avi Kivitycf5de4f2008-11-28 00:14:07 +02002846 c->dst.bytes = c->op_bytes;
Avi Kivity111de5d2007-11-27 19:14:21 +02002847 goto pop_instruction;
Avi Kivity018a98d2007-11-27 19:30:56 +02002848 case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
2849 mov:
2850 c->dst.val = c->src.val;
2851 break;
Avi Kivitya77ab5e2009-01-05 13:27:34 +02002852 case 0xcb: /* ret far */
2853 rc = emulate_ret_far(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002854 if (rc != X86EMUL_CONTINUE)
Avi Kivitya77ab5e2009-01-05 13:27:34 +02002855 goto done;
2856 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02002857 case 0xd0 ... 0xd1: /* Grp2 */
2858 c->src.val = 1;
2859 emulate_grp2(ctxt);
2860 break;
2861 case 0xd2 ... 0xd3: /* Grp2 */
2862 c->src.val = c->regs[VCPU_REGS_RCX];
2863 emulate_grp2(ctxt);
2864 break;
Mohammed Gamala6a30342008-09-06 17:22:29 +03002865 case 0xe4: /* inb */
2866 case 0xe5: /* in */
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02002867 goto do_io_in;
Mohammed Gamala6a30342008-09-06 17:22:29 +03002868 case 0xe6: /* outb */
2869 case 0xe7: /* out */
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02002870 goto do_io_out;
Nitin A Kamble1a52e052007-09-18 16:34:25 -07002871 case 0xe8: /* call (near) */ {
Gleb Natapovd53c4772009-04-12 13:36:36 +03002872 long int rel = c->src.val;
Laurent Viviere4e03de2007-09-18 11:52:50 +02002873 c->src.val = (unsigned long) c->eip;
Harvey Harrison7a9572752008-02-19 07:40:41 -08002874 jmp_rel(c, rel);
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02002875 emulate_push(ctxt);
2876 break;
Nitin A Kamble1a52e052007-09-18 16:34:25 -07002877 }
2878 case 0xe9: /* jmp rel */
Guillaume Thouvenin954cd362008-05-27 10:19:08 +02002879 goto jmp;
Gleb Natapov414e6272010-04-28 19:15:26 +03002880 case 0xea: { /* jmp far */
2881 unsigned short sel;
Gleb Natapovea79849d2010-02-25 16:36:43 +02002882 jump_far:
Gleb Natapov414e6272010-04-28 19:15:26 +03002883 memcpy(&sel, c->src.valptr + c->op_bytes, 2);
2884
2885 if (load_segment_descriptor(ctxt, ops, sel, VCPU_SREG_CS))
Gleb Natapovc6975182010-02-18 12:15:01 +02002886 goto done;
Guillaume Thouvenin954cd362008-05-27 10:19:08 +02002887
Gleb Natapov414e6272010-04-28 19:15:26 +03002888 c->eip = 0;
2889 memcpy(&c->eip, c->src.valptr, c->op_bytes);
Guillaume Thouvenin954cd362008-05-27 10:19:08 +02002890 break;
Gleb Natapov414e6272010-04-28 19:15:26 +03002891 }
Guillaume Thouvenin954cd362008-05-27 10:19:08 +02002892 case 0xeb:
2893 jmp: /* jmp rel short */
Harvey Harrison7a9572752008-02-19 07:40:41 -08002894 jmp_rel(c, c->src.val);
Laurent Viviera01af5e2007-09-24 11:10:56 +02002895 c->dst.type = OP_NONE; /* Disable writeback. */
Nitin A Kamble1a52e052007-09-18 16:34:25 -07002896 break;
Mohammed Gamala6a30342008-09-06 17:22:29 +03002897 case 0xec: /* in al,dx */
2898 case 0xed: /* in (e/r)ax,dx */
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02002899 c->src.val = c->regs[VCPU_REGS_RDX];
2900 do_io_in:
2901 c->dst.bytes = min(c->dst.bytes, 4u);
2902 if (!emulator_io_permited(ctxt, ops, c->src.val, c->dst.bytes)) {
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002903 kvm_inject_gp(ctxt->vcpu, 0);
2904 goto done;
2905 }
Gleb Natapov7b262e92010-03-18 15:20:27 +02002906 if (!pio_in_emulated(ctxt, ops, c->dst.bytes, c->src.val,
2907 &c->dst.val))
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02002908 goto done; /* IO is needed */
2909 break;
2910 case 0xee: /* out al,dx */
2911 case 0xef: /* out (e/r)ax,dx */
2912 c->src.val = c->regs[VCPU_REGS_RDX];
2913 do_io_out:
2914 c->dst.bytes = min(c->dst.bytes, 4u);
2915 if (!emulator_io_permited(ctxt, ops, c->src.val, c->dst.bytes)) {
2916 kvm_inject_gp(ctxt->vcpu, 0);
2917 goto done;
Mohammed Gamala6a30342008-09-06 17:22:29 +03002918 }
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02002919 ops->pio_out_emulated(c->dst.bytes, c->src.val, &c->dst.val, 1,
2920 ctxt->vcpu);
2921 c->dst.type = OP_NONE; /* Disable writeback. */
Guillaume Thouvenine93f36b2008-10-28 10:51:30 +01002922 break;
Avi Kivity111de5d2007-11-27 19:14:21 +02002923 case 0xf4: /* hlt */
Zhang Xiantaoad312c72007-12-13 23:50:52 +08002924 ctxt->vcpu->arch.halt_request = 1;
Mohammed Gamal19fdfa02008-07-06 16:51:26 +03002925 break;
Avi Kivity111de5d2007-11-27 19:14:21 +02002926 case 0xf5: /* cmc */
2927 /* complement carry flag from eflags reg */
2928 ctxt->eflags ^= EFLG_CF;
2929 c->dst.type = OP_NONE; /* Disable writeback. */
2930 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02002931 case 0xf6 ... 0xf7: /* Grp3 */
Gleb Natapovaca06a82010-03-18 15:20:15 +02002932 if (!emulate_grp3(ctxt, ops))
2933 goto cannot_emulate;
Avi Kivity018a98d2007-11-27 19:30:56 +02002934 break;
Avi Kivity111de5d2007-11-27 19:14:21 +02002935 case 0xf8: /* clc */
2936 ctxt->eflags &= ~EFLG_CF;
2937 c->dst.type = OP_NONE; /* Disable writeback. */
2938 break;
2939 case 0xfa: /* cli */
Gleb Natapov9c537242010-03-18 15:20:05 +02002940 if (emulator_bad_iopl(ctxt, ops))
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002941 kvm_inject_gp(ctxt->vcpu, 0);
2942 else {
2943 ctxt->eflags &= ~X86_EFLAGS_IF;
2944 c->dst.type = OP_NONE; /* Disable writeback. */
2945 }
Avi Kivity111de5d2007-11-27 19:14:21 +02002946 break;
2947 case 0xfb: /* sti */
Gleb Natapov9c537242010-03-18 15:20:05 +02002948 if (emulator_bad_iopl(ctxt, ops))
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002949 kvm_inject_gp(ctxt->vcpu, 0);
2950 else {
Jan Kiszka48005f62010-02-19 19:38:07 +01002951 toggle_interruptibility(ctxt, KVM_X86_SHADOW_INT_STI);
Gleb Natapovf850e2e2010-02-10 14:21:33 +02002952 ctxt->eflags |= X86_EFLAGS_IF;
2953 c->dst.type = OP_NONE; /* Disable writeback. */
2954 }
Avi Kivity111de5d2007-11-27 19:14:21 +02002955 break;
Mohammed Gamalfb4616f2008-09-01 04:52:24 +03002956 case 0xfc: /* cld */
2957 ctxt->eflags &= ~EFLG_DF;
2958 c->dst.type = OP_NONE; /* Disable writeback. */
2959 break;
2960 case 0xfd: /* std */
2961 ctxt->eflags |= EFLG_DF;
2962 c->dst.type = OP_NONE; /* Disable writeback. */
2963 break;
Gleb Natapovea79849d2010-02-25 16:36:43 +02002964 case 0xfe: /* Grp4 */
2965 grp45:
Avi Kivity018a98d2007-11-27 19:30:56 +02002966 rc = emulate_grp45(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002967 if (rc != X86EMUL_CONTINUE)
Avi Kivity018a98d2007-11-27 19:30:56 +02002968 goto done;
2969 break;
Gleb Natapovea79849d2010-02-25 16:36:43 +02002970 case 0xff: /* Grp5 */
2971 if (c->modrm_reg == 5)
2972 goto jump_far;
2973 goto grp45;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002974 }
Avi Kivity018a98d2007-11-27 19:30:56 +02002975
2976writeback:
2977 rc = writeback(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09002978 if (rc != X86EMUL_CONTINUE)
Avi Kivity018a98d2007-11-27 19:30:56 +02002979 goto done;
2980
Gleb Natapov5cd21912010-03-18 15:20:26 +02002981 /*
2982 * restore dst type in case the decoding will be reused
2983 * (happens for string instruction )
2984 */
2985 c->dst.type = saved_dst_type;
2986
Gleb Natapova682e352010-03-18 15:20:21 +02002987 if ((c->d & SrcMask) == SrcSI)
2988 string_addr_inc(ctxt, seg_override_base(ctxt, c), VCPU_REGS_RSI,
Gleb Natapovd9271122010-03-18 15:20:22 +02002989 &c->src);
Gleb Natapova682e352010-03-18 15:20:21 +02002990
2991 if ((c->d & DstMask) == DstDI)
Gleb Natapovd9271122010-03-18 15:20:22 +02002992 string_addr_inc(ctxt, es_base(ctxt), VCPU_REGS_RDI, &c->dst);
2993
Gleb Natapov5cd21912010-03-18 15:20:26 +02002994 if (c->rep_prefix && (c->d & String)) {
Gleb Natapov7b262e92010-03-18 15:20:27 +02002995 struct read_cache *rc = &ctxt->decode.io_read;
Gleb Natapovd9271122010-03-18 15:20:22 +02002996 register_address_increment(c, &c->regs[VCPU_REGS_RCX], -1);
Gleb Natapov7b262e92010-03-18 15:20:27 +02002997 /*
2998 * Re-enter guest when pio read ahead buffer is empty or,
2999 * if it is not used, after each 1024 iteration.
3000 */
3001 if ((rc->end == 0 && !(c->regs[VCPU_REGS_RCX] & 0x3ff)) ||
3002 (rc->end != 0 && rc->end == rc->pos))
Gleb Natapov5cd21912010-03-18 15:20:26 +02003003 ctxt->restart = false;
3004 }
Gleb Natapov9de41572010-04-28 19:15:22 +03003005 /*
3006 * reset read cache here in case string instruction is restared
3007 * without decoding
3008 */
3009 ctxt->decode.mem_read.end = 0;
Avi Kivity018a98d2007-11-27 19:30:56 +02003010 /* Commit shadow register state. */
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003011 memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003012 kvm_rip_write(ctxt->vcpu, c->eip);
Gleb Natapov482ac182010-03-21 13:08:20 +02003013 ops->set_rflags(ctxt->vcpu, ctxt->eflags);
Avi Kivity018a98d2007-11-27 19:30:56 +02003014
3015done:
Gleb Natapovcb404fe2010-03-18 15:20:25 +02003016 return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003017
3018twobyte_insn:
Laurent Viviere4e03de2007-09-18 11:52:50 +02003019 switch (c->b) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08003020 case 0x01: /* lgdt, lidt, lmsw */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003021 switch (c->modrm_reg) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08003022 u16 size;
3023 unsigned long address;
3024
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003025 case 0: /* vmcall */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003026 if (c->modrm_mod != 3 || c->modrm_rm != 1)
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003027 goto cannot_emulate;
3028
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05003029 rc = kvm_fix_hypercall(ctxt->vcpu);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003030 if (rc != X86EMUL_CONTINUE)
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05003031 goto done;
3032
Avi Kivity33e38852008-05-21 15:34:25 +03003033 /* Let the processor re-execute the fixed hypercall */
Gleb Natapov063db062010-03-18 15:20:06 +02003034 c->eip = ctxt->eip;
Avi Kivity16286d02008-04-14 14:40:50 +03003035 /* Disable writeback. */
3036 c->dst.type = OP_NONE;
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003037 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003038 case 2: /* lgdt */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003039 rc = read_descriptor(ctxt, ops, c->src.ptr,
3040 &size, &address, c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003041 if (rc != X86EMUL_CONTINUE)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003042 goto done;
3043 realmode_lgdt(ctxt->vcpu, size, address);
Avi Kivity16286d02008-04-14 14:40:50 +03003044 /* Disable writeback. */
3045 c->dst.type = OP_NONE;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003046 break;
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003047 case 3: /* lidt/vmmcall */
Avi Kivity2b3d2a22008-12-23 19:46:01 +02003048 if (c->modrm_mod == 3) {
3049 switch (c->modrm_rm) {
3050 case 1:
3051 rc = kvm_fix_hypercall(ctxt->vcpu);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003052 if (rc != X86EMUL_CONTINUE)
Avi Kivity2b3d2a22008-12-23 19:46:01 +02003053 goto done;
3054 break;
3055 default:
3056 goto cannot_emulate;
3057 }
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003058 } else {
Laurent Viviere4e03de2007-09-18 11:52:50 +02003059 rc = read_descriptor(ctxt, ops, c->src.ptr,
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003060 &size, &address,
Laurent Viviere4e03de2007-09-18 11:52:50 +02003061 c->op_bytes);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003062 if (rc != X86EMUL_CONTINUE)
Anthony Liguoriaca7f962007-09-17 14:57:49 -05003063 goto done;
3064 realmode_lidt(ctxt->vcpu, size, address);
3065 }
Avi Kivity16286d02008-04-14 14:40:50 +03003066 /* Disable writeback. */
3067 c->dst.type = OP_NONE;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003068 break;
3069 case 4: /* smsw */
Avi Kivity16286d02008-04-14 14:40:50 +03003070 c->dst.bytes = 2;
Gleb Natapov52a46612010-03-18 15:20:03 +02003071 c->dst.val = ops->get_cr(0, ctxt->vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003072 break;
3073 case 6: /* lmsw */
Gleb Natapov93a152b2010-03-18 15:20:04 +02003074 ops->set_cr(0, (ops->get_cr(0, ctxt->vcpu) & ~0x0ful) |
3075 (c->src.val & 0x0f), ctxt->vcpu);
Avi Kivitydc7457e2008-04-30 16:13:36 +03003076 c->dst.type = OP_NONE;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003077 break;
Gleb Natapov6e1e5ff2010-03-18 15:20:08 +02003078 case 5: /* not defined */
3079 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
3080 goto done;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003081 case 7: /* invlpg*/
Gleb Natapov69f55cb2010-03-18 15:20:20 +02003082 emulate_invlpg(ctxt->vcpu, c->modrm_ea);
Avi Kivity16286d02008-04-14 14:40:50 +03003083 /* Disable writeback. */
3084 c->dst.type = OP_NONE;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003085 break;
3086 default:
3087 goto cannot_emulate;
3088 }
3089 break;
Andre Przywarae99f0502009-06-17 15:50:33 +02003090 case 0x05: /* syscall */
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03003091 rc = emulate_syscall(ctxt, ops);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02003092 if (rc != X86EMUL_CONTINUE)
3093 goto done;
Andre Przywarae66bb2c2009-06-18 12:56:00 +02003094 else
3095 goto writeback;
Andre Przywarae99f0502009-06-17 15:50:33 +02003096 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02003097 case 0x06:
3098 emulate_clts(ctxt->vcpu);
3099 c->dst.type = OP_NONE;
3100 break;
3101 case 0x08: /* invd */
3102 case 0x09: /* wbinvd */
3103 case 0x0d: /* GrpP (prefetch) */
3104 case 0x18: /* Grp16 (prefetch/nop) */
3105 c->dst.type = OP_NONE;
3106 break;
3107 case 0x20: /* mov cr, reg */
Gleb Natapov6aebfa62010-03-18 15:20:10 +02003108 switch (c->modrm_reg) {
3109 case 1:
3110 case 5 ... 7:
3111 case 9 ... 15:
3112 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
3113 goto done;
3114 }
Gleb Natapov52a46612010-03-18 15:20:03 +02003115 c->regs[c->modrm_rm] = ops->get_cr(c->modrm_reg, ctxt->vcpu);
Avi Kivity018a98d2007-11-27 19:30:56 +02003116 c->dst.type = OP_NONE; /* no writeback */
3117 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003118 case 0x21: /* mov from dr to reg */
Gleb Natapov1e470be2010-03-18 15:20:11 +02003119 if ((ops->get_cr(4, ctxt->vcpu) & X86_CR4_DE) &&
3120 (c->modrm_reg == 4 || c->modrm_reg == 5)) {
3121 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
3122 goto done;
3123 }
Gleb Natapov35aa5372010-04-28 19:15:27 +03003124 ops->get_dr(c->modrm_reg, &c->regs[c->modrm_rm], ctxt->vcpu);
Laurent Viviera01af5e2007-09-24 11:10:56 +02003125 c->dst.type = OP_NONE; /* no writeback */
Avi Kivity6aa8b732006-12-10 02:21:36 -08003126 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02003127 case 0x22: /* mov reg, cr */
Gleb Natapov52a46612010-03-18 15:20:03 +02003128 ops->set_cr(c->modrm_reg, c->modrm_val, ctxt->vcpu);
Avi Kivity018a98d2007-11-27 19:30:56 +02003129 c->dst.type = OP_NONE;
3130 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003131 case 0x23: /* mov from reg to dr */
Gleb Natapov1e470be2010-03-18 15:20:11 +02003132 if ((ops->get_cr(4, ctxt->vcpu) & X86_CR4_DE) &&
3133 (c->modrm_reg == 4 || c->modrm_reg == 5)) {
3134 kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
3135 goto done;
3136 }
Gleb Natapov35aa5372010-04-28 19:15:27 +03003137
3138 ops->set_dr(c->modrm_reg,c->regs[c->modrm_rm] &
3139 ((ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U),
3140 ctxt->vcpu);
Laurent Viviera01af5e2007-09-24 11:10:56 +02003141 c->dst.type = OP_NONE; /* no writeback */
Avi Kivity6aa8b732006-12-10 02:21:36 -08003142 break;
Avi Kivity018a98d2007-11-27 19:30:56 +02003143 case 0x30:
3144 /* wrmsr */
3145 msr_data = (u32)c->regs[VCPU_REGS_RAX]
3146 | ((u64)c->regs[VCPU_REGS_RDX] << 32);
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03003147 if (ops->set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data)) {
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02003148 kvm_inject_gp(ctxt->vcpu, 0);
Gleb Natapovfd525362010-03-18 15:20:13 +02003149 goto done;
Avi Kivity018a98d2007-11-27 19:30:56 +02003150 }
3151 rc = X86EMUL_CONTINUE;
3152 c->dst.type = OP_NONE;
3153 break;
3154 case 0x32:
3155 /* rdmsr */
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03003156 if (ops->get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data)) {
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02003157 kvm_inject_gp(ctxt->vcpu, 0);
Gleb Natapovfd525362010-03-18 15:20:13 +02003158 goto done;
Avi Kivity018a98d2007-11-27 19:30:56 +02003159 } else {
3160 c->regs[VCPU_REGS_RAX] = (u32)msr_data;
3161 c->regs[VCPU_REGS_RDX] = msr_data >> 32;
3162 }
3163 rc = X86EMUL_CONTINUE;
3164 c->dst.type = OP_NONE;
3165 break;
Andre Przywarae99f0502009-06-17 15:50:33 +02003166 case 0x34: /* sysenter */
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03003167 rc = emulate_sysenter(ctxt, ops);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02003168 if (rc != X86EMUL_CONTINUE)
3169 goto done;
Andre Przywara8c604352009-06-18 12:56:01 +02003170 else
3171 goto writeback;
Andre Przywarae99f0502009-06-17 15:50:33 +02003172 break;
3173 case 0x35: /* sysexit */
Gleb Natapov3fb1b5d2010-04-28 19:15:28 +03003174 rc = emulate_sysexit(ctxt, ops);
Takuya Yoshikawae54cfa92010-02-18 12:15:02 +02003175 if (rc != X86EMUL_CONTINUE)
3176 goto done;
Andre Przywara4668f052009-06-18 12:56:02 +02003177 else
3178 goto writeback;
Andre Przywarae99f0502009-06-17 15:50:33 +02003179 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003180 case 0x40 ... 0x4f: /* cmov */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003181 c->dst.val = c->dst.orig_val = c->src.val;
Laurent Viviera01af5e2007-09-24 11:10:56 +02003182 if (!test_cc(c->b, ctxt->eflags))
3183 c->dst.type = OP_NONE; /* no writeback */
Avi Kivity6aa8b732006-12-10 02:21:36 -08003184 break;
Gleb Natapovb2833e32009-04-12 13:36:30 +03003185 case 0x80 ... 0x8f: /* jnz rel, etc*/
Avi Kivity018a98d2007-11-27 19:30:56 +02003186 if (test_cc(c->b, ctxt->eflags))
Gleb Natapovb2833e32009-04-12 13:36:30 +03003187 jmp_rel(c, c->src.val);
Avi Kivity018a98d2007-11-27 19:30:56 +02003188 c->dst.type = OP_NONE;
3189 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03003190 case 0xa0: /* push fs */
3191 emulate_push_sreg(ctxt, VCPU_SREG_FS);
3192 break;
3193 case 0xa1: /* pop fs */
3194 rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_FS);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003195 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03003196 goto done;
3197 break;
Nitin A Kamble7de75242007-09-15 10:13:07 +03003198 case 0xa3:
3199 bt: /* bt */
Qing Hee4f8e032007-09-24 17:22:13 +08003200 c->dst.type = OP_NONE;
Laurent Viviere4e03de2007-09-18 11:52:50 +02003201 /* only subword offset */
3202 c->src.val &= (c->dst.bytes << 3) - 1;
Laurent Vivier05f086f2007-09-24 11:10:55 +02003203 emulate_2op_SrcV_nobyte("bt", c->src, c->dst, ctxt->eflags);
Nitin A Kamble7de75242007-09-15 10:13:07 +03003204 break;
Guillaume Thouvenin9bf8ea42008-12-04 14:30:13 +01003205 case 0xa4: /* shld imm8, r, r/m */
3206 case 0xa5: /* shld cl, r, r/m */
3207 emulate_2op_cl("shld", c->src2, c->src, c->dst, ctxt->eflags);
3208 break;
Mohammed Gamal0934ac92009-08-23 14:24:24 +03003209 case 0xa8: /* push gs */
3210 emulate_push_sreg(ctxt, VCPU_SREG_GS);
3211 break;
3212 case 0xa9: /* pop gs */
3213 rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_GS);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003214 if (rc != X86EMUL_CONTINUE)
Mohammed Gamal0934ac92009-08-23 14:24:24 +03003215 goto done;
3216 break;
Nitin A Kamble7de75242007-09-15 10:13:07 +03003217 case 0xab:
3218 bts: /* bts */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003219 /* only subword offset */
3220 c->src.val &= (c->dst.bytes << 3) - 1;
Laurent Vivier05f086f2007-09-24 11:10:55 +02003221 emulate_2op_SrcV_nobyte("bts", c->src, c->dst, ctxt->eflags);
Nitin A Kamble7de75242007-09-15 10:13:07 +03003222 break;
Guillaume Thouvenin9bf8ea42008-12-04 14:30:13 +01003223 case 0xac: /* shrd imm8, r, r/m */
3224 case 0xad: /* shrd cl, r, r/m */
3225 emulate_2op_cl("shrd", c->src2, c->src, c->dst, ctxt->eflags);
3226 break;
Glauber Costa2a7c5b82008-07-10 17:08:15 -03003227 case 0xae: /* clflush */
3228 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003229 case 0xb0 ... 0xb1: /* cmpxchg */
3230 /*
3231 * Save real source value, then compare EAX against
3232 * destination.
3233 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003234 c->src.orig_val = c->src.val;
3235 c->src.val = c->regs[VCPU_REGS_RAX];
Laurent Vivier05f086f2007-09-24 11:10:55 +02003236 emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
3237 if (ctxt->eflags & EFLG_ZF) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08003238 /* Success: write back to memory. */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003239 c->dst.val = c->src.orig_val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003240 } else {
3241 /* Failure: write the value we saw to EAX. */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003242 c->dst.type = OP_REG;
3243 c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
Avi Kivity6aa8b732006-12-10 02:21:36 -08003244 }
3245 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003246 case 0xb3:
3247 btr: /* btr */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003248 /* only subword offset */
3249 c->src.val &= (c->dst.bytes << 3) - 1;
Laurent Vivier05f086f2007-09-24 11:10:55 +02003250 emulate_2op_SrcV_nobyte("btr", c->src, c->dst, ctxt->eflags);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003251 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003252 case 0xb6 ... 0xb7: /* movzx */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003253 c->dst.bytes = c->op_bytes;
3254 c->dst.val = (c->d & ByteOp) ? (u8) c->src.val
3255 : (u16) c->src.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003256 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003257 case 0xba: /* Grp8 */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003258 switch (c->modrm_reg & 3) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08003259 case 0:
3260 goto bt;
3261 case 1:
3262 goto bts;
3263 case 2:
3264 goto btr;
3265 case 3:
3266 goto btc;
3267 }
3268 break;
Nitin A Kamble7de75242007-09-15 10:13:07 +03003269 case 0xbb:
3270 btc: /* btc */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003271 /* only subword offset */
3272 c->src.val &= (c->dst.bytes << 3) - 1;
Laurent Vivier05f086f2007-09-24 11:10:55 +02003273 emulate_2op_SrcV_nobyte("btc", c->src, c->dst, ctxt->eflags);
Nitin A Kamble7de75242007-09-15 10:13:07 +03003274 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003275 case 0xbe ... 0xbf: /* movsx */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003276 c->dst.bytes = c->op_bytes;
3277 c->dst.val = (c->d & ByteOp) ? (s8) c->src.val :
3278 (s16) c->src.val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003279 break;
Sheng Yanga012e652007-10-15 14:24:20 +08003280 case 0xc3: /* movnti */
Laurent Viviere4e03de2007-09-18 11:52:50 +02003281 c->dst.bytes = c->op_bytes;
3282 c->dst.val = (c->op_bytes == 4) ? (u32) c->src.val :
3283 (u64) c->src.val;
Sheng Yanga012e652007-10-15 14:24:20 +08003284 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003285 case 0xc7: /* Grp9 (cmpxchg8b) */
Gleb Natapov69f55cb2010-03-18 15:20:20 +02003286 rc = emulate_grp9(ctxt, ops);
Takuya Yoshikawa1b30eaa2010-02-12 15:57:56 +09003287 if (rc != X86EMUL_CONTINUE)
Laurent Vivier8cdbd2c2007-09-24 11:10:54 +02003288 goto done;
3289 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003290 }
3291 goto writeback;
3292
3293cannot_emulate:
Laurent Viviere4e03de2007-09-18 11:52:50 +02003294 DPRINTF("Cannot emulate %02x\n", c->b);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003295 return -1;
3296}