Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 20 | #include <linux/ratelimit.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 21 | #include <linux/pci.h> |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 22 | #include <linux/pci-ats.h> |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 23 | #include <linux/bitmap.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 25 | #include <linux/debugfs.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 26 | #include <linux/scatterlist.h> |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 29 | #include <linux/iommu.h> |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 30 | #include <linux/delay.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 31 | #include <linux/amd-iommu.h> |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 32 | #include <linux/notifier.h> |
| 33 | #include <linux/export.h> |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 34 | #include <linux/irq.h> |
| 35 | #include <linux/msi.h> |
| 36 | #include <asm/irq_remapping.h> |
| 37 | #include <asm/io_apic.h> |
| 38 | #include <asm/apic.h> |
| 39 | #include <asm/hw_irq.h> |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 40 | #include <asm/msidef.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 41 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 42 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 43 | #include <asm/gart.h> |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 44 | #include <asm/dma.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 45 | |
| 46 | #include "amd_iommu_proto.h" |
| 47 | #include "amd_iommu_types.h" |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 48 | #include "irq_remapping.h" |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 49 | |
| 50 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 51 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 52 | #define LOOP_TIMEOUT 100000 |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 53 | |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 54 | /* |
| 55 | * This bitmap is used to advertise the page sizes our hardware support |
| 56 | * to the IOMMU core, which will then use this information to split |
| 57 | * physically contiguous memory regions it is mapping into page sizes |
| 58 | * that we support. |
| 59 | * |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 60 | * 512GB Pages are not supported due to a hardware bug |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 61 | */ |
Joerg Roedel | 954e3dd | 2012-12-02 15:35:37 +0100 | [diff] [blame] | 62 | #define AMD_IOMMU_PGSIZES ((~0xFFFUL) & ~(2ULL << 38)) |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 63 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 64 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 65 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 66 | /* A list of preallocated protection domains */ |
| 67 | static LIST_HEAD(iommu_pd_list); |
| 68 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 69 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 70 | /* List of all available dev_data structures */ |
| 71 | static LIST_HEAD(dev_data_list); |
| 72 | static DEFINE_SPINLOCK(dev_data_list_lock); |
| 73 | |
Joerg Roedel | 6efed63 | 2012-06-14 15:52:58 +0200 | [diff] [blame] | 74 | LIST_HEAD(ioapic_map); |
| 75 | LIST_HEAD(hpet_map); |
| 76 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 77 | /* |
| 78 | * Domain for untranslated devices - only allocated |
| 79 | * if iommu=pt passed on kernel cmd line. |
| 80 | */ |
| 81 | static struct protection_domain *pt_domain; |
| 82 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 83 | static struct iommu_ops amd_iommu_ops; |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 84 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 85 | static ATOMIC_NOTIFIER_HEAD(ppr_notifier); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 86 | int amd_iommu_max_glx_val = -1; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 87 | |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 88 | static struct dma_map_ops amd_iommu_dma_ops; |
| 89 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 90 | /* |
| 91 | * general struct to manage commands send to an IOMMU |
| 92 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 93 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 94 | u32 data[4]; |
| 95 | }; |
| 96 | |
Joerg Roedel | 05152a0 | 2012-06-15 16:53:51 +0200 | [diff] [blame] | 97 | struct kmem_cache *amd_iommu_irq_cache; |
| 98 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 99 | static void update_domain(struct protection_domain *domain); |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 100 | static int __init alloc_passthrough_domain(void); |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 101 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 102 | /**************************************************************************** |
| 103 | * |
| 104 | * Helper functions |
| 105 | * |
| 106 | ****************************************************************************/ |
| 107 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 108 | static struct iommu_dev_data *alloc_dev_data(u16 devid) |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 109 | { |
| 110 | struct iommu_dev_data *dev_data; |
| 111 | unsigned long flags; |
| 112 | |
| 113 | dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL); |
| 114 | if (!dev_data) |
| 115 | return NULL; |
| 116 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 117 | dev_data->devid = devid; |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 118 | atomic_set(&dev_data->bind, 0); |
| 119 | |
| 120 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 121 | list_add_tail(&dev_data->dev_data_list, &dev_data_list); |
| 122 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 123 | |
| 124 | return dev_data; |
| 125 | } |
| 126 | |
| 127 | static void free_dev_data(struct iommu_dev_data *dev_data) |
| 128 | { |
| 129 | unsigned long flags; |
| 130 | |
| 131 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 132 | list_del(&dev_data->dev_data_list); |
| 133 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 134 | |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 135 | if (dev_data->group) |
| 136 | iommu_group_put(dev_data->group); |
| 137 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 138 | kfree(dev_data); |
| 139 | } |
| 140 | |
Joerg Roedel | 3b03bb7 | 2011-06-09 18:53:25 +0200 | [diff] [blame] | 141 | static struct iommu_dev_data *search_dev_data(u16 devid) |
| 142 | { |
| 143 | struct iommu_dev_data *dev_data; |
| 144 | unsigned long flags; |
| 145 | |
| 146 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 147 | list_for_each_entry(dev_data, &dev_data_list, dev_data_list) { |
| 148 | if (dev_data->devid == devid) |
| 149 | goto out_unlock; |
| 150 | } |
| 151 | |
| 152 | dev_data = NULL; |
| 153 | |
| 154 | out_unlock: |
| 155 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 156 | |
| 157 | return dev_data; |
| 158 | } |
| 159 | |
| 160 | static struct iommu_dev_data *find_dev_data(u16 devid) |
| 161 | { |
| 162 | struct iommu_dev_data *dev_data; |
| 163 | |
| 164 | dev_data = search_dev_data(devid); |
| 165 | |
| 166 | if (dev_data == NULL) |
| 167 | dev_data = alloc_dev_data(devid); |
| 168 | |
| 169 | return dev_data; |
| 170 | } |
| 171 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 172 | static inline u16 get_device_id(struct device *dev) |
| 173 | { |
| 174 | struct pci_dev *pdev = to_pci_dev(dev); |
| 175 | |
| 176 | return calc_devid(pdev->bus->number, pdev->devfn); |
| 177 | } |
| 178 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 179 | static struct iommu_dev_data *get_dev_data(struct device *dev) |
| 180 | { |
| 181 | return dev->archdata.iommu; |
| 182 | } |
| 183 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 184 | static bool pci_iommuv2_capable(struct pci_dev *pdev) |
| 185 | { |
| 186 | static const int caps[] = { |
| 187 | PCI_EXT_CAP_ID_ATS, |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 188 | PCI_EXT_CAP_ID_PRI, |
| 189 | PCI_EXT_CAP_ID_PASID, |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 190 | }; |
| 191 | int i, pos; |
| 192 | |
| 193 | for (i = 0; i < 3; ++i) { |
| 194 | pos = pci_find_ext_capability(pdev, caps[i]); |
| 195 | if (pos == 0) |
| 196 | return false; |
| 197 | } |
| 198 | |
| 199 | return true; |
| 200 | } |
| 201 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 202 | static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum) |
| 203 | { |
| 204 | struct iommu_dev_data *dev_data; |
| 205 | |
| 206 | dev_data = get_dev_data(&pdev->dev); |
| 207 | |
| 208 | return dev_data->errata & (1 << erratum) ? true : false; |
| 209 | } |
| 210 | |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 211 | /* |
| 212 | * In this function the list of preallocated protection domains is traversed to |
| 213 | * find the domain for a specific device |
| 214 | */ |
| 215 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 216 | { |
| 217 | struct dma_ops_domain *entry, *ret = NULL; |
| 218 | unsigned long flags; |
| 219 | u16 alias = amd_iommu_alias_table[devid]; |
| 220 | |
| 221 | if (list_empty(&iommu_pd_list)) |
| 222 | return NULL; |
| 223 | |
| 224 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 225 | |
| 226 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 227 | if (entry->target_dev == devid || |
| 228 | entry->target_dev == alias) { |
| 229 | ret = entry; |
| 230 | break; |
| 231 | } |
| 232 | } |
| 233 | |
| 234 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 235 | |
| 236 | return ret; |
| 237 | } |
| 238 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 239 | /* |
| 240 | * This function checks if the driver got a valid device from the caller to |
| 241 | * avoid dereferencing invalid pointers. |
| 242 | */ |
| 243 | static bool check_device(struct device *dev) |
| 244 | { |
| 245 | u16 devid; |
| 246 | |
| 247 | if (!dev || !dev->dma_mask) |
| 248 | return false; |
| 249 | |
| 250 | /* No device or no PCI device */ |
Julia Lawall | 339d326 | 2010-02-06 09:42:39 +0100 | [diff] [blame] | 251 | if (dev->bus != &pci_bus_type) |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 252 | return false; |
| 253 | |
| 254 | devid = get_device_id(dev); |
| 255 | |
| 256 | /* Out of our scope? */ |
| 257 | if (devid > amd_iommu_last_bdf) |
| 258 | return false; |
| 259 | |
| 260 | if (amd_iommu_rlookup_table[devid] == NULL) |
| 261 | return false; |
| 262 | |
| 263 | return true; |
| 264 | } |
| 265 | |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 266 | static void swap_pci_ref(struct pci_dev **from, struct pci_dev *to) |
| 267 | { |
| 268 | pci_dev_put(*from); |
| 269 | *from = to; |
| 270 | } |
| 271 | |
Alex Williamson | 2bff6a5 | 2012-10-08 22:49:48 -0600 | [diff] [blame] | 272 | static struct pci_bus *find_hosted_bus(struct pci_bus *bus) |
| 273 | { |
| 274 | while (!bus->self) { |
| 275 | if (!pci_is_root_bus(bus)) |
| 276 | bus = bus->parent; |
| 277 | else |
| 278 | return ERR_PTR(-ENODEV); |
| 279 | } |
| 280 | |
| 281 | return bus; |
| 282 | } |
| 283 | |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 284 | #define REQ_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF) |
| 285 | |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 286 | static struct pci_dev *get_isolation_root(struct pci_dev *pdev) |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 287 | { |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 288 | struct pci_dev *dma_pdev = pdev; |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 289 | |
Alex Williamson | 31fe943 | 2012-08-04 12:09:03 -0600 | [diff] [blame] | 290 | /* Account for quirked devices */ |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 291 | swap_pci_ref(&dma_pdev, pci_get_dma_source(dma_pdev)); |
| 292 | |
Alex Williamson | 31fe943 | 2012-08-04 12:09:03 -0600 | [diff] [blame] | 293 | /* |
| 294 | * If it's a multifunction device that does not support our |
| 295 | * required ACS flags, add to the same group as function 0. |
| 296 | */ |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 297 | if (dma_pdev->multifunction && |
| 298 | !pci_acs_enabled(dma_pdev, REQ_ACS_FLAGS)) |
| 299 | swap_pci_ref(&dma_pdev, |
| 300 | pci_get_slot(dma_pdev->bus, |
| 301 | PCI_DEVFN(PCI_SLOT(dma_pdev->devfn), |
| 302 | 0))); |
| 303 | |
Alex Williamson | 31fe943 | 2012-08-04 12:09:03 -0600 | [diff] [blame] | 304 | /* |
| 305 | * Devices on the root bus go through the iommu. If that's not us, |
| 306 | * find the next upstream device and test ACS up to the root bus. |
| 307 | * Finding the next device may require skipping virtual buses. |
| 308 | */ |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 309 | while (!pci_is_root_bus(dma_pdev->bus)) { |
Alex Williamson | 2bff6a5 | 2012-10-08 22:49:48 -0600 | [diff] [blame] | 310 | struct pci_bus *bus = find_hosted_bus(dma_pdev->bus); |
| 311 | if (IS_ERR(bus)) |
| 312 | break; |
Alex Williamson | 31fe943 | 2012-08-04 12:09:03 -0600 | [diff] [blame] | 313 | |
| 314 | if (pci_acs_path_enabled(bus->self, NULL, REQ_ACS_FLAGS)) |
Alex Williamson | 664b600 | 2012-05-30 14:19:31 -0600 | [diff] [blame] | 315 | break; |
| 316 | |
Alex Williamson | 31fe943 | 2012-08-04 12:09:03 -0600 | [diff] [blame] | 317 | swap_pci_ref(&dma_pdev, pci_dev_get(bus->self)); |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 318 | } |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 319 | |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 320 | return dma_pdev; |
| 321 | } |
| 322 | |
Alex Williamson | ce7ac4a | 2012-10-08 22:49:54 -0600 | [diff] [blame] | 323 | static int use_pdev_iommu_group(struct pci_dev *pdev, struct device *dev) |
| 324 | { |
| 325 | struct iommu_group *group = iommu_group_get(&pdev->dev); |
| 326 | int ret; |
| 327 | |
| 328 | if (!group) { |
| 329 | group = iommu_group_alloc(); |
| 330 | if (IS_ERR(group)) |
| 331 | return PTR_ERR(group); |
| 332 | |
| 333 | WARN_ON(&pdev->dev != dev); |
| 334 | } |
| 335 | |
| 336 | ret = iommu_group_add_device(group, dev); |
| 337 | iommu_group_put(group); |
| 338 | return ret; |
| 339 | } |
| 340 | |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 341 | static int use_dev_data_iommu_group(struct iommu_dev_data *dev_data, |
| 342 | struct device *dev) |
| 343 | { |
| 344 | if (!dev_data->group) { |
| 345 | struct iommu_group *group = iommu_group_alloc(); |
| 346 | if (IS_ERR(group)) |
| 347 | return PTR_ERR(group); |
| 348 | |
| 349 | dev_data->group = group; |
| 350 | } |
| 351 | |
| 352 | return iommu_group_add_device(dev_data->group, dev); |
| 353 | } |
| 354 | |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 355 | static int init_iommu_group(struct device *dev) |
| 356 | { |
| 357 | struct iommu_dev_data *dev_data; |
| 358 | struct iommu_group *group; |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 359 | struct pci_dev *dma_pdev; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 360 | int ret; |
| 361 | |
| 362 | group = iommu_group_get(dev); |
| 363 | if (group) { |
| 364 | iommu_group_put(group); |
| 365 | return 0; |
| 366 | } |
| 367 | |
| 368 | dev_data = find_dev_data(get_device_id(dev)); |
| 369 | if (!dev_data) |
| 370 | return -ENOMEM; |
| 371 | |
| 372 | if (dev_data->alias_data) { |
| 373 | u16 alias; |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 374 | struct pci_bus *bus; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 375 | |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 376 | if (dev_data->alias_data->group) |
| 377 | goto use_group; |
| 378 | |
| 379 | /* |
| 380 | * If the alias device exists, it's effectively just a first |
| 381 | * level quirk for finding the DMA source. |
| 382 | */ |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 383 | alias = amd_iommu_alias_table[dev_data->devid]; |
| 384 | dma_pdev = pci_get_bus_and_slot(alias >> 8, alias & 0xff); |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 385 | if (dma_pdev) { |
| 386 | dma_pdev = get_isolation_root(dma_pdev); |
| 387 | goto use_pdev; |
| 388 | } |
| 389 | |
| 390 | /* |
| 391 | * If the alias is virtual, try to find a parent device |
| 392 | * and test whether the IOMMU group is actualy rooted above |
| 393 | * the alias. Be careful to also test the parent device if |
| 394 | * we think the alias is the root of the group. |
| 395 | */ |
| 396 | bus = pci_find_bus(0, alias >> 8); |
| 397 | if (!bus) |
| 398 | goto use_group; |
| 399 | |
| 400 | bus = find_hosted_bus(bus); |
| 401 | if (IS_ERR(bus) || !bus->self) |
| 402 | goto use_group; |
| 403 | |
| 404 | dma_pdev = get_isolation_root(pci_dev_get(bus->self)); |
| 405 | if (dma_pdev != bus->self || (dma_pdev->multifunction && |
| 406 | !pci_acs_enabled(dma_pdev, REQ_ACS_FLAGS))) |
| 407 | goto use_pdev; |
| 408 | |
| 409 | pci_dev_put(dma_pdev); |
| 410 | goto use_group; |
Alex Williamson | 2851db2 | 2012-10-08 22:49:41 -0600 | [diff] [blame] | 411 | } |
| 412 | |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 413 | dma_pdev = get_isolation_root(pci_dev_get(to_pci_dev(dev))); |
| 414 | use_pdev: |
Alex Williamson | ce7ac4a | 2012-10-08 22:49:54 -0600 | [diff] [blame] | 415 | ret = use_pdev_iommu_group(dma_pdev, dev); |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 416 | pci_dev_put(dma_pdev); |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 417 | return ret; |
Alex Williamson | 78bfa9f | 2012-10-08 22:50:00 -0600 | [diff] [blame] | 418 | use_group: |
| 419 | return use_dev_data_iommu_group(dev_data->alias_data, dev); |
Alex Williamson | eb9c952 | 2012-10-08 22:49:35 -0600 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | static int iommu_init_device(struct device *dev) |
| 423 | { |
| 424 | struct pci_dev *pdev = to_pci_dev(dev); |
| 425 | struct iommu_dev_data *dev_data; |
| 426 | u16 alias; |
| 427 | int ret; |
| 428 | |
| 429 | if (dev->archdata.iommu) |
| 430 | return 0; |
| 431 | |
| 432 | dev_data = find_dev_data(get_device_id(dev)); |
| 433 | if (!dev_data) |
| 434 | return -ENOMEM; |
| 435 | |
| 436 | alias = amd_iommu_alias_table[dev_data->devid]; |
| 437 | if (alias != dev_data->devid) { |
| 438 | struct iommu_dev_data *alias_data; |
| 439 | |
| 440 | alias_data = find_dev_data(alias); |
| 441 | if (alias_data == NULL) { |
| 442 | pr_err("AMD-Vi: Warning: Unhandled device %s\n", |
| 443 | dev_name(dev)); |
| 444 | free_dev_data(dev_data); |
| 445 | return -ENOTSUPP; |
| 446 | } |
| 447 | dev_data->alias_data = alias_data; |
| 448 | } |
| 449 | |
| 450 | ret = init_iommu_group(dev); |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 451 | if (ret) |
| 452 | return ret; |
| 453 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 454 | if (pci_iommuv2_capable(pdev)) { |
| 455 | struct amd_iommu *iommu; |
| 456 | |
| 457 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 458 | dev_data->iommu_v2 = iommu->is_iommu_v2; |
| 459 | } |
| 460 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 461 | dev->archdata.iommu = dev_data; |
| 462 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 463 | return 0; |
| 464 | } |
| 465 | |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 466 | static void iommu_ignore_device(struct device *dev) |
| 467 | { |
| 468 | u16 devid, alias; |
| 469 | |
| 470 | devid = get_device_id(dev); |
| 471 | alias = amd_iommu_alias_table[devid]; |
| 472 | |
| 473 | memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry)); |
| 474 | memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry)); |
| 475 | |
| 476 | amd_iommu_rlookup_table[devid] = NULL; |
| 477 | amd_iommu_rlookup_table[alias] = NULL; |
| 478 | } |
| 479 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 480 | static void iommu_uninit_device(struct device *dev) |
| 481 | { |
Alex Williamson | 9dcd613 | 2012-05-30 14:19:07 -0600 | [diff] [blame] | 482 | iommu_group_remove_device(dev); |
| 483 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 484 | /* |
| 485 | * Nothing to do here - we keep dev_data around for unplugged devices |
| 486 | * and reuse it when the device is re-plugged - not doing so would |
| 487 | * introduce a ton of races. |
| 488 | */ |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 489 | } |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 490 | |
| 491 | void __init amd_iommu_uninit_devices(void) |
| 492 | { |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 493 | struct iommu_dev_data *dev_data, *n; |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 494 | struct pci_dev *pdev = NULL; |
| 495 | |
| 496 | for_each_pci_dev(pdev) { |
| 497 | |
| 498 | if (!check_device(&pdev->dev)) |
| 499 | continue; |
| 500 | |
| 501 | iommu_uninit_device(&pdev->dev); |
| 502 | } |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 503 | |
| 504 | /* Free all of our dev_data structures */ |
| 505 | list_for_each_entry_safe(dev_data, n, &dev_data_list, dev_data_list) |
| 506 | free_dev_data(dev_data); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 507 | } |
| 508 | |
| 509 | int __init amd_iommu_init_devices(void) |
| 510 | { |
| 511 | struct pci_dev *pdev = NULL; |
| 512 | int ret = 0; |
| 513 | |
| 514 | for_each_pci_dev(pdev) { |
| 515 | |
| 516 | if (!check_device(&pdev->dev)) |
| 517 | continue; |
| 518 | |
| 519 | ret = iommu_init_device(&pdev->dev); |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 520 | if (ret == -ENOTSUPP) |
| 521 | iommu_ignore_device(&pdev->dev); |
| 522 | else if (ret) |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 523 | goto out_free; |
| 524 | } |
| 525 | |
| 526 | return 0; |
| 527 | |
| 528 | out_free: |
| 529 | |
| 530 | amd_iommu_uninit_devices(); |
| 531 | |
| 532 | return ret; |
| 533 | } |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 534 | #ifdef CONFIG_AMD_IOMMU_STATS |
| 535 | |
| 536 | /* |
| 537 | * Initialization code for statistics collection |
| 538 | */ |
| 539 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 540 | DECLARE_STATS_COUNTER(compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 541 | DECLARE_STATS_COUNTER(cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 542 | DECLARE_STATS_COUNTER(cnt_unmap_single); |
Joerg Roedel | d03f067 | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 543 | DECLARE_STATS_COUNTER(cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 544 | DECLARE_STATS_COUNTER(cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 545 | DECLARE_STATS_COUNTER(cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 546 | DECLARE_STATS_COUNTER(cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 547 | DECLARE_STATS_COUNTER(cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 548 | DECLARE_STATS_COUNTER(domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 549 | DECLARE_STATS_COUNTER(domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 550 | DECLARE_STATS_COUNTER(alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 551 | DECLARE_STATS_COUNTER(total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 552 | DECLARE_STATS_COUNTER(complete_ppr); |
| 553 | DECLARE_STATS_COUNTER(invalidate_iotlb); |
| 554 | DECLARE_STATS_COUNTER(invalidate_iotlb_all); |
| 555 | DECLARE_STATS_COUNTER(pri_requests); |
| 556 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 557 | static struct dentry *stats_dir; |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 558 | static struct dentry *de_fflush; |
| 559 | |
| 560 | static void amd_iommu_stats_add(struct __iommu_counter *cnt) |
| 561 | { |
| 562 | if (stats_dir == NULL) |
| 563 | return; |
| 564 | |
| 565 | cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir, |
| 566 | &cnt->value); |
| 567 | } |
| 568 | |
| 569 | static void amd_iommu_stats_init(void) |
| 570 | { |
| 571 | stats_dir = debugfs_create_dir("amd-iommu", NULL); |
| 572 | if (stats_dir == NULL) |
| 573 | return; |
| 574 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 575 | de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir, |
Dan Carpenter | 3775d48 | 2012-06-27 12:09:18 +0300 | [diff] [blame] | 576 | &amd_iommu_unmap_flush); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 577 | |
| 578 | amd_iommu_stats_add(&compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 579 | amd_iommu_stats_add(&cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 580 | amd_iommu_stats_add(&cnt_unmap_single); |
Joerg Roedel | d03f067 | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 581 | amd_iommu_stats_add(&cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 582 | amd_iommu_stats_add(&cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 583 | amd_iommu_stats_add(&cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 584 | amd_iommu_stats_add(&cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 585 | amd_iommu_stats_add(&cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 586 | amd_iommu_stats_add(&domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 587 | amd_iommu_stats_add(&domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 588 | amd_iommu_stats_add(&alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 589 | amd_iommu_stats_add(&total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 590 | amd_iommu_stats_add(&complete_ppr); |
| 591 | amd_iommu_stats_add(&invalidate_iotlb); |
| 592 | amd_iommu_stats_add(&invalidate_iotlb_all); |
| 593 | amd_iommu_stats_add(&pri_requests); |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 594 | } |
| 595 | |
| 596 | #endif |
| 597 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 598 | /**************************************************************************** |
| 599 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 600 | * Interrupt handling functions |
| 601 | * |
| 602 | ****************************************************************************/ |
| 603 | |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 604 | static void dump_dte_entry(u16 devid) |
| 605 | { |
| 606 | int i; |
| 607 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 608 | for (i = 0; i < 4; ++i) |
| 609 | pr_err("AMD-Vi: DTE[%d]: %016llx\n", i, |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 610 | amd_iommu_dev_table[devid].data[i]); |
| 611 | } |
| 612 | |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 613 | static void dump_command(unsigned long phys_addr) |
| 614 | { |
| 615 | struct iommu_cmd *cmd = phys_to_virt(phys_addr); |
| 616 | int i; |
| 617 | |
| 618 | for (i = 0; i < 4; ++i) |
| 619 | pr_err("AMD-Vi: CMD[%d]: %08x\n", i, cmd->data[i]); |
| 620 | } |
| 621 | |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 622 | static void iommu_print_event(struct amd_iommu *iommu, void *__evt) |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 623 | { |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 624 | int type, devid, domid, flags; |
| 625 | volatile u32 *event = __evt; |
| 626 | int count = 0; |
| 627 | u64 address; |
| 628 | |
| 629 | retry: |
| 630 | type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 631 | devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 632 | domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 633 | flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 634 | address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 635 | |
| 636 | if (type == 0) { |
| 637 | /* Did we hit the erratum? */ |
| 638 | if (++count == LOOP_TIMEOUT) { |
| 639 | pr_err("AMD-Vi: No event written to event log\n"); |
| 640 | return; |
| 641 | } |
| 642 | udelay(1); |
| 643 | goto retry; |
| 644 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 645 | |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 646 | printk(KERN_ERR "AMD-Vi: Event logged ["); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 647 | |
| 648 | switch (type) { |
| 649 | case EVENT_TYPE_ILL_DEV: |
| 650 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 651 | "address=0x%016llx flags=0x%04x]\n", |
| 652 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 653 | address, flags); |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 654 | dump_dte_entry(devid); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 655 | break; |
| 656 | case EVENT_TYPE_IO_FAULT: |
| 657 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 658 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 659 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 660 | domid, address, flags); |
| 661 | break; |
| 662 | case EVENT_TYPE_DEV_TAB_ERR: |
| 663 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 664 | "address=0x%016llx flags=0x%04x]\n", |
| 665 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 666 | address, flags); |
| 667 | break; |
| 668 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 669 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 670 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 671 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 672 | domid, address, flags); |
| 673 | break; |
| 674 | case EVENT_TYPE_ILL_CMD: |
| 675 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 676 | dump_command(address); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 677 | break; |
| 678 | case EVENT_TYPE_CMD_HARD_ERR: |
| 679 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 680 | "flags=0x%04x]\n", address, flags); |
| 681 | break; |
| 682 | case EVENT_TYPE_IOTLB_INV_TO: |
| 683 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 684 | "address=0x%016llx]\n", |
| 685 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 686 | address); |
| 687 | break; |
| 688 | case EVENT_TYPE_INV_DEV_REQ: |
| 689 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 690 | "address=0x%016llx flags=0x%04x]\n", |
| 691 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 692 | address, flags); |
| 693 | break; |
| 694 | default: |
| 695 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 696 | } |
Joerg Roedel | 3d06fca | 2012-04-12 14:12:00 +0200 | [diff] [blame] | 697 | |
| 698 | memset(__evt, 0, 4 * sizeof(u32)); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 699 | } |
| 700 | |
| 701 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 702 | { |
Joerg Roedel | d3263bc | 2013-04-18 17:55:04 +0200 | [diff] [blame^] | 703 | u32 head, tail, status; |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 704 | unsigned long flags; |
| 705 | |
| 706 | spin_lock_irqsave(&iommu->lock, flags); |
| 707 | |
Joerg Roedel | d3263bc | 2013-04-18 17:55:04 +0200 | [diff] [blame^] | 708 | /* enable event interrupts again */ |
| 709 | do { |
| 710 | /* |
| 711 | * Workaround for Erratum ERBT1312 |
| 712 | * Clearing the EVT_INT bit may race in the hardware, so read |
| 713 | * it again and make sure it was really cleared |
| 714 | */ |
| 715 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 716 | writel(MMIO_STATUS_EVT_INT_MASK, |
| 717 | iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 718 | } while (status & MMIO_STATUS_EVT_INT_MASK); |
| 719 | |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 720 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 721 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 722 | |
| 723 | while (head != tail) { |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 724 | iommu_print_event(iommu, iommu->evt_buf + head); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 725 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 726 | } |
| 727 | |
| 728 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 729 | |
| 730 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 731 | } |
| 732 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 733 | static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw) |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 734 | { |
| 735 | struct amd_iommu_fault fault; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 736 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 737 | INC_STATS_COUNTER(pri_requests); |
| 738 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 739 | if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) { |
| 740 | pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n"); |
| 741 | return; |
| 742 | } |
| 743 | |
| 744 | fault.address = raw[1]; |
| 745 | fault.pasid = PPR_PASID(raw[0]); |
| 746 | fault.device_id = PPR_DEVID(raw[0]); |
| 747 | fault.tag = PPR_TAG(raw[0]); |
| 748 | fault.flags = PPR_FLAGS(raw[0]); |
| 749 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 750 | atomic_notifier_call_chain(&ppr_notifier, 0, &fault); |
| 751 | } |
| 752 | |
| 753 | static void iommu_poll_ppr_log(struct amd_iommu *iommu) |
| 754 | { |
| 755 | unsigned long flags; |
Joerg Roedel | d3263bc | 2013-04-18 17:55:04 +0200 | [diff] [blame^] | 756 | u32 head, tail, status; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 757 | |
| 758 | if (iommu->ppr_log == NULL) |
| 759 | return; |
| 760 | |
| 761 | spin_lock_irqsave(&iommu->lock, flags); |
| 762 | |
Joerg Roedel | d3263bc | 2013-04-18 17:55:04 +0200 | [diff] [blame^] | 763 | /* enable ppr interrupts again */ |
| 764 | do { |
| 765 | /* |
| 766 | * Workaround for Erratum ERBT1312 |
| 767 | * Clearing the PPR_INT bit may race in the hardware, so read |
| 768 | * it again and make sure it was really cleared |
| 769 | */ |
| 770 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 771 | writel(MMIO_STATUS_PPR_INT_MASK, |
| 772 | iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 773 | } while (status & MMIO_STATUS_PPR_INT_MASK); |
| 774 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 775 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 776 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 777 | |
| 778 | while (head != tail) { |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 779 | volatile u64 *raw; |
| 780 | u64 entry[2]; |
| 781 | int i; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 782 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 783 | raw = (u64 *)(iommu->ppr_log + head); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 784 | |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 785 | /* |
| 786 | * Hardware bug: Interrupt may arrive before the entry is |
| 787 | * written to memory. If this happens we need to wait for the |
| 788 | * entry to arrive. |
| 789 | */ |
| 790 | for (i = 0; i < LOOP_TIMEOUT; ++i) { |
| 791 | if (PPR_REQ_TYPE(raw[0]) != 0) |
| 792 | break; |
| 793 | udelay(1); |
| 794 | } |
| 795 | |
| 796 | /* Avoid memcpy function-call overhead */ |
| 797 | entry[0] = raw[0]; |
| 798 | entry[1] = raw[1]; |
| 799 | |
| 800 | /* |
| 801 | * To detect the hardware bug we need to clear the entry |
| 802 | * back to zero. |
| 803 | */ |
| 804 | raw[0] = raw[1] = 0UL; |
| 805 | |
| 806 | /* Update head pointer of hardware ring-buffer */ |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 807 | head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE; |
| 808 | writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 809 | |
| 810 | /* |
| 811 | * Release iommu->lock because ppr-handling might need to |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 812 | * re-acquire it |
Joerg Roedel | eee5353 | 2012-06-01 15:20:23 +0200 | [diff] [blame] | 813 | */ |
| 814 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 815 | |
| 816 | /* Handle PPR entry */ |
| 817 | iommu_handle_ppr_entry(iommu, entry); |
| 818 | |
| 819 | spin_lock_irqsave(&iommu->lock, flags); |
| 820 | |
| 821 | /* Refresh ring-buffer information */ |
| 822 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 823 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 824 | } |
| 825 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 826 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 827 | } |
| 828 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 829 | irqreturn_t amd_iommu_int_thread(int irq, void *data) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 830 | { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 831 | struct amd_iommu *iommu; |
| 832 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 833 | for_each_iommu(iommu) { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 834 | iommu_poll_events(iommu); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 835 | iommu_poll_ppr_log(iommu); |
| 836 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 837 | |
| 838 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 839 | } |
| 840 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 841 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 842 | { |
| 843 | return IRQ_WAKE_THREAD; |
| 844 | } |
| 845 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 846 | /**************************************************************************** |
| 847 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 848 | * IOMMU command queuing functions |
| 849 | * |
| 850 | ****************************************************************************/ |
| 851 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 852 | static int wait_on_sem(volatile u64 *sem) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 853 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 854 | int i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 855 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 856 | while (*sem == 0 && i < LOOP_TIMEOUT) { |
| 857 | udelay(1); |
| 858 | i += 1; |
| 859 | } |
| 860 | |
| 861 | if (i == LOOP_TIMEOUT) { |
| 862 | pr_alert("AMD-Vi: Completion-Wait loop timed out\n"); |
| 863 | return -EIO; |
| 864 | } |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 865 | |
| 866 | return 0; |
| 867 | } |
| 868 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 869 | static void copy_cmd_to_buffer(struct amd_iommu *iommu, |
| 870 | struct iommu_cmd *cmd, |
| 871 | u32 tail) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 872 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 873 | u8 *target; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 874 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 875 | target = iommu->cmd_buf + tail; |
| 876 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 877 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 878 | /* Copy command to buffer */ |
| 879 | memcpy(target, cmd, sizeof(*cmd)); |
| 880 | |
| 881 | /* Tell the IOMMU about it */ |
| 882 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 883 | } |
| 884 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 885 | static void build_completion_wait(struct iommu_cmd *cmd, u64 address) |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 886 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 887 | WARN_ON(address & 0x7ULL); |
| 888 | |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 889 | memset(cmd, 0, sizeof(*cmd)); |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 890 | cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK; |
| 891 | cmd->data[1] = upper_32_bits(__pa(address)); |
| 892 | cmd->data[2] = 1; |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 893 | CMD_SET_TYPE(cmd, CMD_COMPL_WAIT); |
| 894 | } |
| 895 | |
Joerg Roedel | 94fe79e | 2011-04-06 11:07:21 +0200 | [diff] [blame] | 896 | static void build_inv_dte(struct iommu_cmd *cmd, u16 devid) |
| 897 | { |
| 898 | memset(cmd, 0, sizeof(*cmd)); |
| 899 | cmd->data[0] = devid; |
| 900 | CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY); |
| 901 | } |
| 902 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 903 | static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 904 | size_t size, u16 domid, int pde) |
| 905 | { |
| 906 | u64 pages; |
| 907 | int s; |
| 908 | |
| 909 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 910 | s = 0; |
| 911 | |
| 912 | if (pages > 1) { |
| 913 | /* |
| 914 | * If we have to flush more than one page, flush all |
| 915 | * TLB entries for this domain |
| 916 | */ |
| 917 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 918 | s = 1; |
| 919 | } |
| 920 | |
| 921 | address &= PAGE_MASK; |
| 922 | |
| 923 | memset(cmd, 0, sizeof(*cmd)); |
| 924 | cmd->data[1] |= domid; |
| 925 | cmd->data[2] = lower_32_bits(address); |
| 926 | cmd->data[3] = upper_32_bits(address); |
| 927 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 928 | if (s) /* size bit - we flush more than one 4kb page */ |
| 929 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 930 | if (pde) /* PDE bit - we want to flush everything, not only the PTEs */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 931 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 932 | } |
| 933 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 934 | static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep, |
| 935 | u64 address, size_t size) |
| 936 | { |
| 937 | u64 pages; |
| 938 | int s; |
| 939 | |
| 940 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 941 | s = 0; |
| 942 | |
| 943 | if (pages > 1) { |
| 944 | /* |
| 945 | * If we have to flush more than one page, flush all |
| 946 | * TLB entries for this domain |
| 947 | */ |
| 948 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 949 | s = 1; |
| 950 | } |
| 951 | |
| 952 | address &= PAGE_MASK; |
| 953 | |
| 954 | memset(cmd, 0, sizeof(*cmd)); |
| 955 | cmd->data[0] = devid; |
| 956 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 957 | cmd->data[1] = devid; |
| 958 | cmd->data[2] = lower_32_bits(address); |
| 959 | cmd->data[3] = upper_32_bits(address); |
| 960 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 961 | if (s) |
| 962 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 963 | } |
| 964 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 965 | static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, int pasid, |
| 966 | u64 address, bool size) |
| 967 | { |
| 968 | memset(cmd, 0, sizeof(*cmd)); |
| 969 | |
| 970 | address &= ~(0xfffULL); |
| 971 | |
| 972 | cmd->data[0] = pasid & PASID_MASK; |
| 973 | cmd->data[1] = domid; |
| 974 | cmd->data[2] = lower_32_bits(address); |
| 975 | cmd->data[3] = upper_32_bits(address); |
| 976 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 977 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 978 | if (size) |
| 979 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 980 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 981 | } |
| 982 | |
| 983 | static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 984 | int qdep, u64 address, bool size) |
| 985 | { |
| 986 | memset(cmd, 0, sizeof(*cmd)); |
| 987 | |
| 988 | address &= ~(0xfffULL); |
| 989 | |
| 990 | cmd->data[0] = devid; |
| 991 | cmd->data[0] |= (pasid & 0xff) << 16; |
| 992 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 993 | cmd->data[1] = devid; |
| 994 | cmd->data[1] |= ((pasid >> 8) & 0xfff) << 16; |
| 995 | cmd->data[2] = lower_32_bits(address); |
| 996 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 997 | cmd->data[3] = upper_32_bits(address); |
| 998 | if (size) |
| 999 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 1000 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 1001 | } |
| 1002 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 1003 | static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 1004 | int status, int tag, bool gn) |
| 1005 | { |
| 1006 | memset(cmd, 0, sizeof(*cmd)); |
| 1007 | |
| 1008 | cmd->data[0] = devid; |
| 1009 | if (gn) { |
| 1010 | cmd->data[1] = pasid & PASID_MASK; |
| 1011 | cmd->data[2] = CMD_INV_IOMMU_PAGES_GN_MASK; |
| 1012 | } |
| 1013 | cmd->data[3] = tag & 0x1ff; |
| 1014 | cmd->data[3] |= (status & PPR_STATUS_MASK) << PPR_STATUS_SHIFT; |
| 1015 | |
| 1016 | CMD_SET_TYPE(cmd, CMD_COMPLETE_PPR); |
| 1017 | } |
| 1018 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1019 | static void build_inv_all(struct iommu_cmd *cmd) |
| 1020 | { |
| 1021 | memset(cmd, 0, sizeof(*cmd)); |
| 1022 | CMD_SET_TYPE(cmd, CMD_INV_ALL); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1023 | } |
| 1024 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1025 | static void build_inv_irt(struct iommu_cmd *cmd, u16 devid) |
| 1026 | { |
| 1027 | memset(cmd, 0, sizeof(*cmd)); |
| 1028 | cmd->data[0] = devid; |
| 1029 | CMD_SET_TYPE(cmd, CMD_INV_IRT); |
| 1030 | } |
| 1031 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1032 | /* |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1033 | * Writes the command to the IOMMUs command buffer and informs the |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1034 | * hardware about the new command. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1035 | */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 1036 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
| 1037 | struct iommu_cmd *cmd, |
| 1038 | bool sync) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1039 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1040 | u32 left, tail, head, next_tail; |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1041 | unsigned long flags; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1042 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1043 | WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 1044 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1045 | again: |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1046 | spin_lock_irqsave(&iommu->lock, flags); |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1047 | |
| 1048 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 1049 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 1050 | next_tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 1051 | left = (head - next_tail) % iommu->cmd_buf_size; |
| 1052 | |
| 1053 | if (left <= 2) { |
| 1054 | struct iommu_cmd sync_cmd; |
| 1055 | volatile u64 sem = 0; |
| 1056 | int ret; |
| 1057 | |
| 1058 | build_completion_wait(&sync_cmd, (u64)&sem); |
| 1059 | copy_cmd_to_buffer(iommu, &sync_cmd, tail); |
| 1060 | |
| 1061 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 1062 | |
| 1063 | if ((ret = wait_on_sem(&sem)) != 0) |
| 1064 | return ret; |
| 1065 | |
| 1066 | goto again; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 1067 | } |
| 1068 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1069 | copy_cmd_to_buffer(iommu, cmd, tail); |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 1070 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1071 | /* We need to sync now to make sure all commands are processed */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 1072 | iommu->need_sync = sync; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1073 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1074 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 1075 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1076 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1077 | } |
| 1078 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 1079 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
| 1080 | { |
| 1081 | return iommu_queue_command_sync(iommu, cmd, true); |
| 1082 | } |
| 1083 | |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1084 | /* |
| 1085 | * This function queues a completion wait command into the command |
| 1086 | * buffer of an IOMMU |
| 1087 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1088 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 1089 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1090 | struct iommu_cmd cmd; |
| 1091 | volatile u64 sem = 0; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1092 | int ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1093 | |
| 1094 | if (!iommu->need_sync) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1095 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1096 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1097 | build_completion_wait(&cmd, (u64)&sem); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1098 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 1099 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1100 | if (ret) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 1101 | return ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 1102 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 1103 | return wait_on_sem(&sem); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1104 | } |
| 1105 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1106 | static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1107 | { |
| 1108 | struct iommu_cmd cmd; |
| 1109 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1110 | build_inv_dte(&cmd, devid); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1111 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 1112 | return iommu_queue_command(iommu, &cmd); |
| 1113 | } |
| 1114 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1115 | static void iommu_flush_dte_all(struct amd_iommu *iommu) |
| 1116 | { |
| 1117 | u32 devid; |
| 1118 | |
| 1119 | for (devid = 0; devid <= 0xffff; ++devid) |
| 1120 | iommu_flush_dte(iommu, devid); |
| 1121 | |
| 1122 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1123 | } |
| 1124 | |
| 1125 | /* |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1126 | * This function uses heavy locking and may disable irqs for some time. But |
| 1127 | * this is no issue because it is only called during resume. |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1128 | */ |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1129 | static void iommu_flush_tlb_all(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1130 | { |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1131 | u32 dom_id; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1132 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1133 | for (dom_id = 0; dom_id <= 0xffff; ++dom_id) { |
| 1134 | struct iommu_cmd cmd; |
| 1135 | build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 1136 | dom_id, 1); |
| 1137 | iommu_queue_command(iommu, &cmd); |
| 1138 | } |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1139 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1140 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1141 | } |
| 1142 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1143 | static void iommu_flush_all(struct amd_iommu *iommu) |
| 1144 | { |
| 1145 | struct iommu_cmd cmd; |
| 1146 | |
| 1147 | build_inv_all(&cmd); |
| 1148 | |
| 1149 | iommu_queue_command(iommu, &cmd); |
| 1150 | iommu_completion_wait(iommu); |
| 1151 | } |
| 1152 | |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1153 | static void iommu_flush_irt(struct amd_iommu *iommu, u16 devid) |
| 1154 | { |
| 1155 | struct iommu_cmd cmd; |
| 1156 | |
| 1157 | build_inv_irt(&cmd, devid); |
| 1158 | |
| 1159 | iommu_queue_command(iommu, &cmd); |
| 1160 | } |
| 1161 | |
| 1162 | static void iommu_flush_irt_all(struct amd_iommu *iommu) |
| 1163 | { |
| 1164 | u32 devid; |
| 1165 | |
| 1166 | for (devid = 0; devid <= MAX_DEV_TABLE_ENTRIES; devid++) |
| 1167 | iommu_flush_irt(iommu, devid); |
| 1168 | |
| 1169 | iommu_completion_wait(iommu); |
| 1170 | } |
| 1171 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1172 | void iommu_flush_all_caches(struct amd_iommu *iommu) |
| 1173 | { |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1174 | if (iommu_feature(iommu, FEATURE_IA)) { |
| 1175 | iommu_flush_all(iommu); |
| 1176 | } else { |
| 1177 | iommu_flush_dte_all(iommu); |
Joerg Roedel | 7ef2798 | 2012-06-21 16:46:04 +0200 | [diff] [blame] | 1178 | iommu_flush_irt_all(iommu); |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 1179 | iommu_flush_tlb_all(iommu); |
| 1180 | } |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 1181 | } |
| 1182 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1183 | /* |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1184 | * Command send function for flushing on-device TLB |
| 1185 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1186 | static int device_flush_iotlb(struct iommu_dev_data *dev_data, |
| 1187 | u64 address, size_t size) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1188 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1189 | struct amd_iommu *iommu; |
| 1190 | struct iommu_cmd cmd; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1191 | int qdep; |
| 1192 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1193 | qdep = dev_data->ats.qdep; |
| 1194 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1195 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1196 | build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1197 | |
| 1198 | return iommu_queue_command(iommu, &cmd); |
| 1199 | } |
| 1200 | |
| 1201 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1202 | * Command send function for invalidating a device table entry |
| 1203 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1204 | static int device_flush_dte(struct iommu_dev_data *dev_data) |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1205 | { |
| 1206 | struct amd_iommu *iommu; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1207 | int ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1208 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1209 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1210 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 1211 | ret = iommu_flush_dte(iommu, dev_data->devid); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1212 | if (ret) |
| 1213 | return ret; |
| 1214 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1215 | if (dev_data->ats.enabled) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1216 | ret = device_flush_iotlb(dev_data, 0, ~0UL); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1217 | |
| 1218 | return ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 1219 | } |
| 1220 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1221 | /* |
| 1222 | * TLB invalidation function which is called from the mapping functions. |
| 1223 | * It invalidates a single PTE if the range to flush is within a single |
| 1224 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 1225 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1226 | static void __domain_flush_pages(struct protection_domain *domain, |
| 1227 | u64 address, size_t size, int pde) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1228 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1229 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1230 | struct iommu_cmd cmd; |
| 1231 | int ret = 0, i; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1232 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1233 | build_inv_iommu_pages(&cmd, address, size, domain->id, pde); |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 1234 | |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1235 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1236 | if (!domain->dev_iommu[i]) |
| 1237 | continue; |
| 1238 | |
| 1239 | /* |
| 1240 | * Devices of this domain are behind this IOMMU |
| 1241 | * We need a TLB flush |
| 1242 | */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1243 | ret |= iommu_queue_command(amd_iommus[i], &cmd); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1244 | } |
| 1245 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1246 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1247 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 1248 | if (!dev_data->ats.enabled) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1249 | continue; |
| 1250 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1251 | ret |= device_flush_iotlb(dev_data, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 1252 | } |
| 1253 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1254 | WARN_ON(ret); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1255 | } |
| 1256 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1257 | static void domain_flush_pages(struct protection_domain *domain, |
| 1258 | u64 address, size_t size) |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1259 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1260 | __domain_flush_pages(domain, address, size, 0); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1261 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1262 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1263 | /* Flush the whole IO/TLB for a given protection domain */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1264 | static void domain_flush_tlb(struct protection_domain *domain) |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1265 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1266 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1267 | } |
| 1268 | |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1269 | /* Flush the whole IO/TLB for a given protection domain - including PDE */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1270 | static void domain_flush_tlb_pde(struct protection_domain *domain) |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1271 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1272 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1); |
| 1273 | } |
| 1274 | |
| 1275 | static void domain_flush_complete(struct protection_domain *domain) |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1276 | { |
| 1277 | int i; |
| 1278 | |
| 1279 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1280 | if (!domain->dev_iommu[i]) |
| 1281 | continue; |
| 1282 | |
| 1283 | /* |
| 1284 | * Devices of this domain are behind this IOMMU |
| 1285 | * We need to wait for completion of all commands. |
| 1286 | */ |
| 1287 | iommu_completion_wait(amd_iommus[i]); |
| 1288 | } |
| 1289 | } |
| 1290 | |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1291 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1292 | /* |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1293 | * This function flushes the DTEs for all devices in domain |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1294 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1295 | static void domain_flush_devices(struct protection_domain *domain) |
Joerg Roedel | bfd1be1 | 2009-05-05 15:33:57 +0200 | [diff] [blame] | 1296 | { |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1297 | struct iommu_dev_data *dev_data; |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1298 | |
| 1299 | list_for_each_entry(dev_data, &domain->dev_list, list) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1300 | device_flush_dte(dev_data); |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1301 | } |
| 1302 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1303 | /**************************************************************************** |
| 1304 | * |
| 1305 | * The functions below are used the create the page table mappings for |
| 1306 | * unity mapped regions. |
| 1307 | * |
| 1308 | ****************************************************************************/ |
| 1309 | |
| 1310 | /* |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1311 | * This function is used to add another level to an IO page table. Adding |
| 1312 | * another level increases the size of the address space by 9 bits to a size up |
| 1313 | * to 64 bits. |
| 1314 | */ |
| 1315 | static bool increase_address_space(struct protection_domain *domain, |
| 1316 | gfp_t gfp) |
| 1317 | { |
| 1318 | u64 *pte; |
| 1319 | |
| 1320 | if (domain->mode == PAGE_MODE_6_LEVEL) |
| 1321 | /* address space already 64 bit large */ |
| 1322 | return false; |
| 1323 | |
| 1324 | pte = (void *)get_zeroed_page(gfp); |
| 1325 | if (!pte) |
| 1326 | return false; |
| 1327 | |
| 1328 | *pte = PM_LEVEL_PDE(domain->mode, |
| 1329 | virt_to_phys(domain->pt_root)); |
| 1330 | domain->pt_root = pte; |
| 1331 | domain->mode += 1; |
| 1332 | domain->updated = true; |
| 1333 | |
| 1334 | return true; |
| 1335 | } |
| 1336 | |
| 1337 | static u64 *alloc_pte(struct protection_domain *domain, |
| 1338 | unsigned long address, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1339 | unsigned long page_size, |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1340 | u64 **pte_page, |
| 1341 | gfp_t gfp) |
| 1342 | { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1343 | int level, end_lvl; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1344 | u64 *pte, *page; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1345 | |
| 1346 | BUG_ON(!is_power_of_2(page_size)); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1347 | |
| 1348 | while (address > PM_LEVEL_SIZE(domain->mode)) |
| 1349 | increase_address_space(domain, gfp); |
| 1350 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1351 | level = domain->mode - 1; |
| 1352 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1353 | address = PAGE_SIZE_ALIGN(address, page_size); |
| 1354 | end_lvl = PAGE_SIZE_LEVEL(page_size); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1355 | |
| 1356 | while (level > end_lvl) { |
| 1357 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 1358 | page = (u64 *)get_zeroed_page(gfp); |
| 1359 | if (!page) |
| 1360 | return NULL; |
| 1361 | *pte = PM_LEVEL_PDE(level, virt_to_phys(page)); |
| 1362 | } |
| 1363 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1364 | /* No level skipping support yet */ |
| 1365 | if (PM_PTE_LEVEL(*pte) != level) |
| 1366 | return NULL; |
| 1367 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1368 | level -= 1; |
| 1369 | |
| 1370 | pte = IOMMU_PTE_PAGE(*pte); |
| 1371 | |
| 1372 | if (pte_page && level == end_lvl) |
| 1373 | *pte_page = pte; |
| 1374 | |
| 1375 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
| 1376 | } |
| 1377 | |
| 1378 | return pte; |
| 1379 | } |
| 1380 | |
| 1381 | /* |
| 1382 | * This function checks if there is a PTE for a given dma address. If |
| 1383 | * there is one, it returns the pointer to it. |
| 1384 | */ |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1385 | static u64 *fetch_pte(struct protection_domain *domain, unsigned long address) |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1386 | { |
| 1387 | int level; |
| 1388 | u64 *pte; |
| 1389 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1390 | if (address > PM_LEVEL_SIZE(domain->mode)) |
| 1391 | return NULL; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1392 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1393 | level = domain->mode - 1; |
| 1394 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1395 | |
| 1396 | while (level > 0) { |
| 1397 | |
| 1398 | /* Not Present */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1399 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1400 | return NULL; |
| 1401 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1402 | /* Large PTE */ |
| 1403 | if (PM_PTE_LEVEL(*pte) == 0x07) { |
| 1404 | unsigned long pte_mask, __pte; |
| 1405 | |
| 1406 | /* |
| 1407 | * If we have a series of large PTEs, make |
| 1408 | * sure to return a pointer to the first one. |
| 1409 | */ |
| 1410 | pte_mask = PTE_PAGE_SIZE(*pte); |
| 1411 | pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1); |
| 1412 | __pte = ((unsigned long)pte) & pte_mask; |
| 1413 | |
| 1414 | return (u64 *)__pte; |
| 1415 | } |
| 1416 | |
| 1417 | /* No level skipping support yet */ |
| 1418 | if (PM_PTE_LEVEL(*pte) != level) |
| 1419 | return NULL; |
| 1420 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1421 | level -= 1; |
| 1422 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1423 | /* Walk to the next level */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1424 | pte = IOMMU_PTE_PAGE(*pte); |
| 1425 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1426 | } |
| 1427 | |
| 1428 | return pte; |
| 1429 | } |
| 1430 | |
| 1431 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1432 | * Generic mapping functions. It maps a physical address into a DMA |
| 1433 | * address space. It allocates the page table pages if necessary. |
| 1434 | * In the future it can be extended to a generic mapping function |
| 1435 | * supporting all features of AMD IOMMU page tables like level skipping |
| 1436 | * and full 64 bit address spaces. |
| 1437 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 1438 | static int iommu_map_page(struct protection_domain *dom, |
| 1439 | unsigned long bus_addr, |
| 1440 | unsigned long phys_addr, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1441 | int prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1442 | unsigned long page_size) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1443 | { |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 1444 | u64 __pte, *pte; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1445 | int i, count; |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1446 | |
Joerg Roedel | bad1cac | 2009-09-02 16:52:23 +0200 | [diff] [blame] | 1447 | if (!(prot & IOMMU_PROT_MASK)) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1448 | return -EINVAL; |
| 1449 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1450 | bus_addr = PAGE_ALIGN(bus_addr); |
| 1451 | phys_addr = PAGE_ALIGN(phys_addr); |
| 1452 | count = PAGE_SIZE_PTE_COUNT(page_size); |
| 1453 | pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1454 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1455 | for (i = 0; i < count; ++i) |
| 1456 | if (IOMMU_PTE_PRESENT(pte[i])) |
| 1457 | return -EBUSY; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1458 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1459 | if (page_size > PAGE_SIZE) { |
| 1460 | __pte = PAGE_SIZE_PTE(phys_addr, page_size); |
| 1461 | __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1462 | } else |
| 1463 | __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1464 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1465 | if (prot & IOMMU_PROT_IR) |
| 1466 | __pte |= IOMMU_PTE_IR; |
| 1467 | if (prot & IOMMU_PROT_IW) |
| 1468 | __pte |= IOMMU_PTE_IW; |
| 1469 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1470 | for (i = 0; i < count; ++i) |
| 1471 | pte[i] = __pte; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1472 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1473 | update_domain(dom); |
| 1474 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1475 | return 0; |
| 1476 | } |
| 1477 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1478 | static unsigned long iommu_unmap_page(struct protection_domain *dom, |
| 1479 | unsigned long bus_addr, |
| 1480 | unsigned long page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1481 | { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1482 | unsigned long long unmap_size, unmapped; |
| 1483 | u64 *pte; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1484 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1485 | BUG_ON(!is_power_of_2(page_size)); |
| 1486 | |
| 1487 | unmapped = 0; |
| 1488 | |
| 1489 | while (unmapped < page_size) { |
| 1490 | |
| 1491 | pte = fetch_pte(dom, bus_addr); |
| 1492 | |
| 1493 | if (!pte) { |
| 1494 | /* |
| 1495 | * No PTE for this address |
| 1496 | * move forward in 4kb steps |
| 1497 | */ |
| 1498 | unmap_size = PAGE_SIZE; |
| 1499 | } else if (PM_PTE_LEVEL(*pte) == 0) { |
| 1500 | /* 4kb PTE found for this address */ |
| 1501 | unmap_size = PAGE_SIZE; |
| 1502 | *pte = 0ULL; |
| 1503 | } else { |
| 1504 | int count, i; |
| 1505 | |
| 1506 | /* Large PTE found which maps this address */ |
| 1507 | unmap_size = PTE_PAGE_SIZE(*pte); |
| 1508 | count = PAGE_SIZE_PTE_COUNT(unmap_size); |
| 1509 | for (i = 0; i < count; i++) |
| 1510 | pte[i] = 0ULL; |
| 1511 | } |
| 1512 | |
| 1513 | bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size; |
| 1514 | unmapped += unmap_size; |
| 1515 | } |
| 1516 | |
| 1517 | BUG_ON(!is_power_of_2(unmapped)); |
| 1518 | |
| 1519 | return unmapped; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1520 | } |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1521 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1522 | /* |
| 1523 | * This function checks if a specific unity mapping entry is needed for |
| 1524 | * this specific IOMMU. |
| 1525 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1526 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 1527 | struct unity_map_entry *entry) |
| 1528 | { |
| 1529 | u16 bdf, i; |
| 1530 | |
| 1531 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 1532 | bdf = amd_iommu_alias_table[i]; |
| 1533 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 1534 | return 1; |
| 1535 | } |
| 1536 | |
| 1537 | return 0; |
| 1538 | } |
| 1539 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1540 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1541 | * This function actually applies the mapping to the page table of the |
| 1542 | * dma_ops domain. |
| 1543 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1544 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 1545 | struct unity_map_entry *e) |
| 1546 | { |
| 1547 | u64 addr; |
| 1548 | int ret; |
| 1549 | |
| 1550 | for (addr = e->address_start; addr < e->address_end; |
| 1551 | addr += PAGE_SIZE) { |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1552 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1553 | PAGE_SIZE); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1554 | if (ret) |
| 1555 | return ret; |
| 1556 | /* |
| 1557 | * if unity mapping is in aperture range mark the page |
| 1558 | * as allocated in the aperture |
| 1559 | */ |
| 1560 | if (addr < dma_dom->aperture_size) |
Joerg Roedel | c323956 | 2009-05-12 10:56:44 +0200 | [diff] [blame] | 1561 | __set_bit(addr >> PAGE_SHIFT, |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1562 | dma_dom->aperture[0]->bitmap); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1563 | } |
| 1564 | |
| 1565 | return 0; |
| 1566 | } |
| 1567 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1568 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1569 | * Init the unity mappings for a specific IOMMU in the system |
| 1570 | * |
| 1571 | * Basically iterates over all unity mapping entries and applies them to |
| 1572 | * the default domain DMA of that IOMMU if necessary. |
| 1573 | */ |
| 1574 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 1575 | { |
| 1576 | struct unity_map_entry *entry; |
| 1577 | int ret; |
| 1578 | |
| 1579 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 1580 | if (!iommu_for_unity_map(iommu, entry)) |
| 1581 | continue; |
| 1582 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 1583 | if (ret) |
| 1584 | return ret; |
| 1585 | } |
| 1586 | |
| 1587 | return 0; |
| 1588 | } |
| 1589 | |
| 1590 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1591 | * Inits the unity mappings required for a specific device |
| 1592 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1593 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 1594 | u16 devid) |
| 1595 | { |
| 1596 | struct unity_map_entry *e; |
| 1597 | int ret; |
| 1598 | |
| 1599 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 1600 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 1601 | continue; |
| 1602 | ret = dma_ops_unity_map(dma_dom, e); |
| 1603 | if (ret) |
| 1604 | return ret; |
| 1605 | } |
| 1606 | |
| 1607 | return 0; |
| 1608 | } |
| 1609 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1610 | /**************************************************************************** |
| 1611 | * |
| 1612 | * The next functions belong to the address allocator for the dma_ops |
| 1613 | * interface functions. They work like the allocators in the other IOMMU |
| 1614 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 1615 | * the aperture. Maybe it could be enhanced in the future to a more |
| 1616 | * efficient allocator. |
| 1617 | * |
| 1618 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1619 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1620 | /* |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1621 | * The address allocator core functions. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1622 | * |
| 1623 | * called with domain->lock held |
| 1624 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1625 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1626 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1627 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 1628 | * ranges. |
| 1629 | */ |
| 1630 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 1631 | unsigned long start_page, |
| 1632 | unsigned int pages) |
| 1633 | { |
| 1634 | unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT; |
| 1635 | |
| 1636 | if (start_page + pages > last_page) |
| 1637 | pages = last_page - start_page; |
| 1638 | |
| 1639 | for (i = start_page; i < start_page + pages; ++i) { |
| 1640 | int index = i / APERTURE_RANGE_PAGES; |
| 1641 | int page = i % APERTURE_RANGE_PAGES; |
| 1642 | __set_bit(page, dom->aperture[index]->bitmap); |
| 1643 | } |
| 1644 | } |
| 1645 | |
| 1646 | /* |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1647 | * This function is used to add a new aperture range to an existing |
| 1648 | * aperture in case of dma_ops domain allocation or address allocation |
| 1649 | * failure. |
| 1650 | */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1651 | static int alloc_new_range(struct dma_ops_domain *dma_dom, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1652 | bool populate, gfp_t gfp) |
| 1653 | { |
| 1654 | int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1655 | struct amd_iommu *iommu; |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1656 | unsigned long i, old_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1657 | |
Joerg Roedel | f5e9705 | 2009-05-22 12:31:53 +0200 | [diff] [blame] | 1658 | #ifdef CONFIG_IOMMU_STRESS |
| 1659 | populate = false; |
| 1660 | #endif |
| 1661 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1662 | if (index >= APERTURE_MAX_RANGES) |
| 1663 | return -ENOMEM; |
| 1664 | |
| 1665 | dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp); |
| 1666 | if (!dma_dom->aperture[index]) |
| 1667 | return -ENOMEM; |
| 1668 | |
| 1669 | dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp); |
| 1670 | if (!dma_dom->aperture[index]->bitmap) |
| 1671 | goto out_free; |
| 1672 | |
| 1673 | dma_dom->aperture[index]->offset = dma_dom->aperture_size; |
| 1674 | |
| 1675 | if (populate) { |
| 1676 | unsigned long address = dma_dom->aperture_size; |
| 1677 | int i, num_ptes = APERTURE_RANGE_PAGES / 512; |
| 1678 | u64 *pte, *pte_page; |
| 1679 | |
| 1680 | for (i = 0; i < num_ptes; ++i) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1681 | pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1682 | &pte_page, gfp); |
| 1683 | if (!pte) |
| 1684 | goto out_free; |
| 1685 | |
| 1686 | dma_dom->aperture[index]->pte_pages[i] = pte_page; |
| 1687 | |
| 1688 | address += APERTURE_RANGE_SIZE / 64; |
| 1689 | } |
| 1690 | } |
| 1691 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1692 | old_size = dma_dom->aperture_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1693 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; |
| 1694 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1695 | /* Reserve address range used for MSI messages */ |
| 1696 | if (old_size < MSI_ADDR_BASE_LO && |
| 1697 | dma_dom->aperture_size > MSI_ADDR_BASE_LO) { |
| 1698 | unsigned long spage; |
| 1699 | int pages; |
| 1700 | |
| 1701 | pages = iommu_num_pages(MSI_ADDR_BASE_LO, 0x10000, PAGE_SIZE); |
| 1702 | spage = MSI_ADDR_BASE_LO >> PAGE_SHIFT; |
| 1703 | |
| 1704 | dma_ops_reserve_addresses(dma_dom, spage, pages); |
| 1705 | } |
| 1706 | |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1707 | /* Initialize the exclusion range if necessary */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1708 | for_each_iommu(iommu) { |
| 1709 | if (iommu->exclusion_start && |
| 1710 | iommu->exclusion_start >= dma_dom->aperture[index]->offset |
| 1711 | && iommu->exclusion_start < dma_dom->aperture_size) { |
| 1712 | unsigned long startpage; |
| 1713 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 1714 | iommu->exclusion_length, |
| 1715 | PAGE_SIZE); |
| 1716 | startpage = iommu->exclusion_start >> PAGE_SHIFT; |
| 1717 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 1718 | } |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1719 | } |
| 1720 | |
| 1721 | /* |
| 1722 | * Check for areas already mapped as present in the new aperture |
| 1723 | * range and mark those pages as reserved in the allocator. Such |
| 1724 | * mappings may already exist as a result of requested unity |
| 1725 | * mappings for devices. |
| 1726 | */ |
| 1727 | for (i = dma_dom->aperture[index]->offset; |
| 1728 | i < dma_dom->aperture_size; |
| 1729 | i += PAGE_SIZE) { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1730 | u64 *pte = fetch_pte(&dma_dom->domain, i); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1731 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
| 1732 | continue; |
| 1733 | |
Joerg Roedel | fcd0861 | 2011-10-11 17:41:32 +0200 | [diff] [blame] | 1734 | dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, 1); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1735 | } |
| 1736 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1737 | update_domain(&dma_dom->domain); |
| 1738 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1739 | return 0; |
| 1740 | |
| 1741 | out_free: |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1742 | update_domain(&dma_dom->domain); |
| 1743 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1744 | free_page((unsigned long)dma_dom->aperture[index]->bitmap); |
| 1745 | |
| 1746 | kfree(dma_dom->aperture[index]); |
| 1747 | dma_dom->aperture[index] = NULL; |
| 1748 | |
| 1749 | return -ENOMEM; |
| 1750 | } |
| 1751 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1752 | static unsigned long dma_ops_area_alloc(struct device *dev, |
| 1753 | struct dma_ops_domain *dom, |
| 1754 | unsigned int pages, |
| 1755 | unsigned long align_mask, |
| 1756 | u64 dma_mask, |
| 1757 | unsigned long start) |
| 1758 | { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1759 | unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1760 | int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT; |
| 1761 | int i = start >> APERTURE_RANGE_SHIFT; |
| 1762 | unsigned long boundary_size; |
| 1763 | unsigned long address = -1; |
| 1764 | unsigned long limit; |
| 1765 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1766 | next_bit >>= PAGE_SHIFT; |
| 1767 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1768 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 1769 | PAGE_SIZE) >> PAGE_SHIFT; |
| 1770 | |
| 1771 | for (;i < max_index; ++i) { |
| 1772 | unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT; |
| 1773 | |
| 1774 | if (dom->aperture[i]->offset >= dma_mask) |
| 1775 | break; |
| 1776 | |
| 1777 | limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset, |
| 1778 | dma_mask >> PAGE_SHIFT); |
| 1779 | |
| 1780 | address = iommu_area_alloc(dom->aperture[i]->bitmap, |
| 1781 | limit, next_bit, pages, 0, |
| 1782 | boundary_size, align_mask); |
| 1783 | if (address != -1) { |
| 1784 | address = dom->aperture[i]->offset + |
| 1785 | (address << PAGE_SHIFT); |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1786 | dom->next_address = address + (pages << PAGE_SHIFT); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1787 | break; |
| 1788 | } |
| 1789 | |
| 1790 | next_bit = 0; |
| 1791 | } |
| 1792 | |
| 1793 | return address; |
| 1794 | } |
| 1795 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1796 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 1797 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1798 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1799 | unsigned long align_mask, |
| 1800 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1801 | { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1802 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1803 | |
Joerg Roedel | fe16f08 | 2009-05-22 12:27:53 +0200 | [diff] [blame] | 1804 | #ifdef CONFIG_IOMMU_STRESS |
| 1805 | dom->next_address = 0; |
| 1806 | dom->need_flush = true; |
| 1807 | #endif |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1808 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1809 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1810 | dma_mask, dom->next_address); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1811 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1812 | if (address == -1) { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1813 | dom->next_address = 0; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1814 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
| 1815 | dma_mask, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1816 | dom->need_flush = true; |
| 1817 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1818 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1819 | if (unlikely(address == -1)) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 1820 | address = DMA_ERROR_CODE; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1821 | |
| 1822 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 1823 | |
| 1824 | return address; |
| 1825 | } |
| 1826 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1827 | /* |
| 1828 | * The address free function. |
| 1829 | * |
| 1830 | * called with domain->lock held |
| 1831 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1832 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 1833 | unsigned long address, |
| 1834 | unsigned int pages) |
| 1835 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1836 | unsigned i = address >> APERTURE_RANGE_SHIFT; |
| 1837 | struct aperture_range *range = dom->aperture[i]; |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1838 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1839 | BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL); |
| 1840 | |
Joerg Roedel | 47bccd6 | 2009-05-22 12:40:54 +0200 | [diff] [blame] | 1841 | #ifdef CONFIG_IOMMU_STRESS |
| 1842 | if (i < 4) |
| 1843 | return; |
| 1844 | #endif |
| 1845 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1846 | if (address >= dom->next_address) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1847 | dom->need_flush = true; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1848 | |
| 1849 | address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1850 | |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 1851 | bitmap_clear(range->bitmap, address, pages); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1852 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1853 | } |
| 1854 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1855 | /**************************************************************************** |
| 1856 | * |
| 1857 | * The next functions belong to the domain allocation. A domain is |
| 1858 | * allocated for every IOMMU as the default domain. If device isolation |
| 1859 | * is enabled, every device get its own domain. The most important thing |
| 1860 | * about domains is the page table mapping the DMA address space they |
| 1861 | * contain. |
| 1862 | * |
| 1863 | ****************************************************************************/ |
| 1864 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1865 | /* |
| 1866 | * This function adds a protection domain to the global protection domain list |
| 1867 | */ |
| 1868 | static void add_domain_to_list(struct protection_domain *domain) |
| 1869 | { |
| 1870 | unsigned long flags; |
| 1871 | |
| 1872 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1873 | list_add(&domain->list, &amd_iommu_pd_list); |
| 1874 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1875 | } |
| 1876 | |
| 1877 | /* |
| 1878 | * This function removes a protection domain to the global |
| 1879 | * protection domain list |
| 1880 | */ |
| 1881 | static void del_domain_from_list(struct protection_domain *domain) |
| 1882 | { |
| 1883 | unsigned long flags; |
| 1884 | |
| 1885 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1886 | list_del(&domain->list); |
| 1887 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1888 | } |
| 1889 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1890 | static u16 domain_id_alloc(void) |
| 1891 | { |
| 1892 | unsigned long flags; |
| 1893 | int id; |
| 1894 | |
| 1895 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1896 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 1897 | BUG_ON(id == 0); |
| 1898 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1899 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1900 | else |
| 1901 | id = 0; |
| 1902 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1903 | |
| 1904 | return id; |
| 1905 | } |
| 1906 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1907 | static void domain_id_free(int id) |
| 1908 | { |
| 1909 | unsigned long flags; |
| 1910 | |
| 1911 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1912 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1913 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1914 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1915 | } |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1916 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1917 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1918 | { |
| 1919 | int i, j; |
| 1920 | u64 *p1, *p2, *p3; |
| 1921 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1922 | p1 = domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1923 | |
| 1924 | if (!p1) |
| 1925 | return; |
| 1926 | |
| 1927 | for (i = 0; i < 512; ++i) { |
| 1928 | if (!IOMMU_PTE_PRESENT(p1[i])) |
| 1929 | continue; |
| 1930 | |
| 1931 | p2 = IOMMU_PTE_PAGE(p1[i]); |
Joerg Roedel | 3cc3d84 | 2008-12-04 16:44:31 +0100 | [diff] [blame] | 1932 | for (j = 0; j < 512; ++j) { |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1933 | if (!IOMMU_PTE_PRESENT(p2[j])) |
| 1934 | continue; |
| 1935 | p3 = IOMMU_PTE_PAGE(p2[j]); |
| 1936 | free_page((unsigned long)p3); |
| 1937 | } |
| 1938 | |
| 1939 | free_page((unsigned long)p2); |
| 1940 | } |
| 1941 | |
| 1942 | free_page((unsigned long)p1); |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1943 | |
| 1944 | domain->pt_root = NULL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1945 | } |
| 1946 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1947 | static void free_gcr3_tbl_level1(u64 *tbl) |
| 1948 | { |
| 1949 | u64 *ptr; |
| 1950 | int i; |
| 1951 | |
| 1952 | for (i = 0; i < 512; ++i) { |
| 1953 | if (!(tbl[i] & GCR3_VALID)) |
| 1954 | continue; |
| 1955 | |
| 1956 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1957 | |
| 1958 | free_page((unsigned long)ptr); |
| 1959 | } |
| 1960 | } |
| 1961 | |
| 1962 | static void free_gcr3_tbl_level2(u64 *tbl) |
| 1963 | { |
| 1964 | u64 *ptr; |
| 1965 | int i; |
| 1966 | |
| 1967 | for (i = 0; i < 512; ++i) { |
| 1968 | if (!(tbl[i] & GCR3_VALID)) |
| 1969 | continue; |
| 1970 | |
| 1971 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1972 | |
| 1973 | free_gcr3_tbl_level1(ptr); |
| 1974 | } |
| 1975 | } |
| 1976 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1977 | static void free_gcr3_table(struct protection_domain *domain) |
| 1978 | { |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1979 | if (domain->glx == 2) |
| 1980 | free_gcr3_tbl_level2(domain->gcr3_tbl); |
| 1981 | else if (domain->glx == 1) |
| 1982 | free_gcr3_tbl_level1(domain->gcr3_tbl); |
| 1983 | else if (domain->glx != 0) |
| 1984 | BUG(); |
| 1985 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1986 | free_page((unsigned long)domain->gcr3_tbl); |
| 1987 | } |
| 1988 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1989 | /* |
| 1990 | * Free a domain, only used if something went wrong in the |
| 1991 | * allocation path and we need to free an already allocated page table |
| 1992 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1993 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 1994 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1995 | int i; |
| 1996 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1997 | if (!dom) |
| 1998 | return; |
| 1999 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2000 | del_domain_from_list(&dom->domain); |
| 2001 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 2002 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2003 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2004 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
| 2005 | if (!dom->aperture[i]) |
| 2006 | continue; |
| 2007 | free_page((unsigned long)dom->aperture[i]->bitmap); |
| 2008 | kfree(dom->aperture[i]); |
| 2009 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2010 | |
| 2011 | kfree(dom); |
| 2012 | } |
| 2013 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2014 | /* |
| 2015 | * Allocates a new protection domain usable for the dma_ops functions. |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 2016 | * It also initializes the page table and the address allocator data |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2017 | * structures required for the dma_ops interface |
| 2018 | */ |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 2019 | static struct dma_ops_domain *dma_ops_domain_alloc(void) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2020 | { |
| 2021 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2022 | |
| 2023 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 2024 | if (!dma_dom) |
| 2025 | return NULL; |
| 2026 | |
| 2027 | spin_lock_init(&dma_dom->domain.lock); |
| 2028 | |
| 2029 | dma_dom->domain.id = domain_id_alloc(); |
| 2030 | if (dma_dom->domain.id == 0) |
| 2031 | goto free_dma_dom; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 2032 | INIT_LIST_HEAD(&dma_dom->domain.dev_list); |
Joerg Roedel | 8f7a017 | 2009-09-02 16:55:24 +0200 | [diff] [blame] | 2033 | dma_dom->domain.mode = PAGE_MODE_2_LEVEL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2034 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 2035 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2036 | dma_dom->domain.priv = dma_dom; |
| 2037 | if (!dma_dom->domain.pt_root) |
| 2038 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2039 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 2040 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 2041 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 2042 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2043 | add_domain_to_list(&dma_dom->domain); |
| 2044 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 2045 | if (alloc_new_range(dma_dom, true, GFP_KERNEL)) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2046 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2047 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2048 | /* |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2049 | * mark the first page as allocated so we never return 0 as |
| 2050 | * a valid dma-address. So we can use 0 as error value |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2051 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2052 | dma_dom->aperture[0]->bitmap[0] = 1; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 2053 | dma_dom->next_address = 0; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2054 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 2055 | |
| 2056 | return dma_dom; |
| 2057 | |
| 2058 | free_dma_dom: |
| 2059 | dma_ops_domain_free(dma_dom); |
| 2060 | |
| 2061 | return NULL; |
| 2062 | } |
| 2063 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2064 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2065 | * little helper function to check whether a given protection domain is a |
| 2066 | * dma_ops domain |
| 2067 | */ |
| 2068 | static bool dma_ops_domain(struct protection_domain *domain) |
| 2069 | { |
| 2070 | return domain->flags & PD_DMA_OPS_MASK; |
| 2071 | } |
| 2072 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2073 | static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2074 | { |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 2075 | u64 pte_root = 0; |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2076 | u64 flags = 0; |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 2077 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 2078 | if (domain->mode != PAGE_MODE_NONE) |
| 2079 | pte_root = virt_to_phys(domain->pt_root); |
| 2080 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 2081 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 2082 | << DEV_ENTRY_MODE_SHIFT; |
| 2083 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2084 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2085 | flags = amd_iommu_dev_table[devid].data[1]; |
| 2086 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2087 | if (ats) |
| 2088 | flags |= DTE_FLAG_IOTLB; |
| 2089 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2090 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2091 | u64 gcr3 = __pa(domain->gcr3_tbl); |
| 2092 | u64 glx = domain->glx; |
| 2093 | u64 tmp; |
| 2094 | |
| 2095 | pte_root |= DTE_FLAG_GV; |
| 2096 | pte_root |= (glx & DTE_GLX_MASK) << DTE_GLX_SHIFT; |
| 2097 | |
| 2098 | /* First mask out possible old values for GCR3 table */ |
| 2099 | tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B; |
| 2100 | flags &= ~tmp; |
| 2101 | |
| 2102 | tmp = DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C; |
| 2103 | flags &= ~tmp; |
| 2104 | |
| 2105 | /* Encode GCR3 table into DTE */ |
| 2106 | tmp = DTE_GCR3_VAL_A(gcr3) << DTE_GCR3_SHIFT_A; |
| 2107 | pte_root |= tmp; |
| 2108 | |
| 2109 | tmp = DTE_GCR3_VAL_B(gcr3) << DTE_GCR3_SHIFT_B; |
| 2110 | flags |= tmp; |
| 2111 | |
| 2112 | tmp = DTE_GCR3_VAL_C(gcr3) << DTE_GCR3_SHIFT_C; |
| 2113 | flags |= tmp; |
| 2114 | } |
| 2115 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 2116 | flags &= ~(0xffffUL); |
| 2117 | flags |= domain->id; |
| 2118 | |
| 2119 | amd_iommu_dev_table[devid].data[1] = flags; |
| 2120 | amd_iommu_dev_table[devid].data[0] = pte_root; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2121 | } |
| 2122 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2123 | static void clear_dte_entry(u16 devid) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2124 | { |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2125 | /* remove entry from the device table seen by the hardware */ |
| 2126 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 2127 | amd_iommu_dev_table[devid].data[1] = 0; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2128 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2129 | amd_iommu_apply_erratum_63(devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2130 | } |
| 2131 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2132 | static void do_attach(struct iommu_dev_data *dev_data, |
| 2133 | struct protection_domain *domain) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2134 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2135 | struct amd_iommu *iommu; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2136 | bool ats; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2137 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2138 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 2139 | ats = dev_data->ats.enabled; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2140 | |
| 2141 | /* Update data structures */ |
| 2142 | dev_data->domain = domain; |
| 2143 | list_add(&dev_data->list, &domain->dev_list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 2144 | set_dte_entry(dev_data->devid, domain, ats); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2145 | |
| 2146 | /* Do reference counting */ |
| 2147 | domain->dev_iommu[iommu->index] += 1; |
| 2148 | domain->dev_cnt += 1; |
| 2149 | |
| 2150 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2151 | device_flush_dte(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2152 | } |
| 2153 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2154 | static void do_detach(struct iommu_dev_data *dev_data) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2155 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2156 | struct amd_iommu *iommu; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2157 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2158 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 2159 | |
Joerg Roedel | c459611 | 2009-11-20 14:57:32 +0100 | [diff] [blame] | 2160 | /* decrease reference counters */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2161 | dev_data->domain->dev_iommu[iommu->index] -= 1; |
| 2162 | dev_data->domain->dev_cnt -= 1; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2163 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2164 | /* Update data structures */ |
| 2165 | dev_data->domain = NULL; |
| 2166 | list_del(&dev_data->list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 2167 | clear_dte_entry(dev_data->devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2168 | |
| 2169 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 2170 | device_flush_dte(dev_data); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2171 | } |
| 2172 | |
| 2173 | /* |
| 2174 | * If a device is not yet associated with a domain, this function does |
| 2175 | * assigns it visible for the hardware |
| 2176 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2177 | static int __attach_device(struct iommu_dev_data *dev_data, |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2178 | struct protection_domain *domain) |
| 2179 | { |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2180 | int ret; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2181 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2182 | /* lock domain */ |
| 2183 | spin_lock(&domain->lock); |
| 2184 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2185 | if (dev_data->alias_data != NULL) { |
| 2186 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2187 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2188 | /* Some sanity checks */ |
| 2189 | ret = -EBUSY; |
| 2190 | if (alias_data->domain != NULL && |
| 2191 | alias_data->domain != domain) |
| 2192 | goto out_unlock; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2193 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2194 | if (dev_data->domain != NULL && |
| 2195 | dev_data->domain != domain) |
| 2196 | goto out_unlock; |
| 2197 | |
| 2198 | /* Do real assignment */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2199 | if (alias_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2200 | do_attach(alias_data, domain); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2201 | |
| 2202 | atomic_inc(&alias_data->bind); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2203 | } |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2204 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2205 | if (dev_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2206 | do_attach(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2207 | |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2208 | atomic_inc(&dev_data->bind); |
| 2209 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2210 | ret = 0; |
| 2211 | |
| 2212 | out_unlock: |
| 2213 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2214 | /* ready */ |
| 2215 | spin_unlock(&domain->lock); |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2216 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 2217 | return ret; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2218 | } |
| 2219 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2220 | |
| 2221 | static void pdev_iommuv2_disable(struct pci_dev *pdev) |
| 2222 | { |
| 2223 | pci_disable_ats(pdev); |
| 2224 | pci_disable_pri(pdev); |
| 2225 | pci_disable_pasid(pdev); |
| 2226 | } |
| 2227 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2228 | /* FIXME: Change generic reset-function to do the same */ |
| 2229 | static int pri_reset_while_enabled(struct pci_dev *pdev) |
| 2230 | { |
| 2231 | u16 control; |
| 2232 | int pos; |
| 2233 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2234 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2235 | if (!pos) |
| 2236 | return -EINVAL; |
| 2237 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2238 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 2239 | control |= PCI_PRI_CTRL_RESET; |
| 2240 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2241 | |
| 2242 | return 0; |
| 2243 | } |
| 2244 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2245 | static int pdev_iommuv2_enable(struct pci_dev *pdev) |
| 2246 | { |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2247 | bool reset_enable; |
| 2248 | int reqs, ret; |
| 2249 | |
| 2250 | /* FIXME: Hardcode number of outstanding requests for now */ |
| 2251 | reqs = 32; |
| 2252 | if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE)) |
| 2253 | reqs = 1; |
| 2254 | reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2255 | |
| 2256 | /* Only allow access to user-accessible pages */ |
| 2257 | ret = pci_enable_pasid(pdev, 0); |
| 2258 | if (ret) |
| 2259 | goto out_err; |
| 2260 | |
| 2261 | /* First reset the PRI state of the device */ |
| 2262 | ret = pci_reset_pri(pdev); |
| 2263 | if (ret) |
| 2264 | goto out_err; |
| 2265 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2266 | /* Enable PRI */ |
| 2267 | ret = pci_enable_pri(pdev, reqs); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2268 | if (ret) |
| 2269 | goto out_err; |
| 2270 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2271 | if (reset_enable) { |
| 2272 | ret = pri_reset_while_enabled(pdev); |
| 2273 | if (ret) |
| 2274 | goto out_err; |
| 2275 | } |
| 2276 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2277 | ret = pci_enable_ats(pdev, PAGE_SHIFT); |
| 2278 | if (ret) |
| 2279 | goto out_err; |
| 2280 | |
| 2281 | return 0; |
| 2282 | |
| 2283 | out_err: |
| 2284 | pci_disable_pri(pdev); |
| 2285 | pci_disable_pasid(pdev); |
| 2286 | |
| 2287 | return ret; |
| 2288 | } |
| 2289 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2290 | /* FIXME: Move this to PCI code */ |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2291 | #define PCI_PRI_TLP_OFF (1 << 15) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2292 | |
Joerg Roedel | 98f1ad2 | 2012-07-06 13:28:37 +0200 | [diff] [blame] | 2293 | static bool pci_pri_tlp_required(struct pci_dev *pdev) |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2294 | { |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2295 | u16 status; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2296 | int pos; |
| 2297 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2298 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2299 | if (!pos) |
| 2300 | return false; |
| 2301 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2302 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2303 | |
Joerg Roedel | a3b9312 | 2012-04-12 12:49:26 +0200 | [diff] [blame] | 2304 | return (status & PCI_PRI_TLP_OFF) ? true : false; |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2305 | } |
| 2306 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2307 | /* |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 2308 | * If a device is not yet associated with a domain, this function |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2309 | * assigns it visible for the hardware |
| 2310 | */ |
| 2311 | static int attach_device(struct device *dev, |
| 2312 | struct protection_domain *domain) |
| 2313 | { |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2314 | struct pci_dev *pdev = to_pci_dev(dev); |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2315 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2316 | unsigned long flags; |
| 2317 | int ret; |
| 2318 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2319 | dev_data = get_dev_data(dev); |
| 2320 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2321 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2322 | if (!dev_data->iommu_v2 || !dev_data->passthrough) |
| 2323 | return -EINVAL; |
| 2324 | |
| 2325 | if (pdev_iommuv2_enable(pdev) != 0) |
| 2326 | return -EINVAL; |
| 2327 | |
| 2328 | dev_data->ats.enabled = true; |
| 2329 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2330 | dev_data->pri_tlp = pci_pri_tlp_required(pdev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2331 | } else if (amd_iommu_iotlb_sup && |
| 2332 | pci_enable_ats(pdev, PAGE_SHIFT) == 0) { |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2333 | dev_data->ats.enabled = true; |
| 2334 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
| 2335 | } |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2336 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2337 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2338 | ret = __attach_device(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2339 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2340 | |
| 2341 | /* |
| 2342 | * We might boot into a crash-kernel here. The crashed kernel |
| 2343 | * left the caches in the IOMMU dirty. So we have to flush |
| 2344 | * here to evict all dirty stuff. |
| 2345 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2346 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2347 | |
| 2348 | return ret; |
| 2349 | } |
| 2350 | |
| 2351 | /* |
| 2352 | * Removes a device from a protection domain (unlocked) |
| 2353 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2354 | static void __detach_device(struct iommu_dev_data *dev_data) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2355 | { |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2356 | struct protection_domain *domain; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 2357 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2358 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2359 | BUG_ON(!dev_data->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2360 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2361 | domain = dev_data->domain; |
| 2362 | |
| 2363 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2364 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2365 | if (dev_data->alias_data != NULL) { |
| 2366 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
| 2367 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2368 | if (atomic_dec_and_test(&alias_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2369 | do_detach(alias_data); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2370 | } |
| 2371 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2372 | if (atomic_dec_and_test(&dev_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2373 | do_detach(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2374 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2375 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2376 | |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2377 | /* |
| 2378 | * If we run in passthrough mode the device must be assigned to the |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2379 | * passthrough domain if it is detached from any other domain. |
| 2380 | * Make sure we can deassign from the pt_domain itself. |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2381 | */ |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2382 | if (dev_data->passthrough && |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2383 | (dev_data->domain == NULL && domain != pt_domain)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2384 | __attach_device(dev_data, pt_domain); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2385 | } |
| 2386 | |
| 2387 | /* |
| 2388 | * Removes a device from a protection domain (with devtable_lock held) |
| 2389 | */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2390 | static void detach_device(struct device *dev) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2391 | { |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2392 | struct protection_domain *domain; |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2393 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2394 | unsigned long flags; |
| 2395 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2396 | dev_data = get_dev_data(dev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2397 | domain = dev_data->domain; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2398 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2399 | /* lock device table */ |
| 2400 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2401 | __detach_device(dev_data); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2402 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2403 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2404 | if (domain->flags & PD_IOMMUV2_MASK) |
| 2405 | pdev_iommuv2_disable(to_pci_dev(dev)); |
| 2406 | else if (dev_data->ats.enabled) |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2407 | pci_disable_ats(to_pci_dev(dev)); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2408 | |
| 2409 | dev_data->ats.enabled = false; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2410 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2411 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2412 | /* |
| 2413 | * Find out the protection domain structure for a given PCI device. This |
| 2414 | * will give us the pointer to the page table root for example. |
| 2415 | */ |
| 2416 | static struct protection_domain *domain_for_device(struct device *dev) |
| 2417 | { |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2418 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2419 | struct protection_domain *dom = NULL; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2420 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2421 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2422 | dev_data = get_dev_data(dev); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2423 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2424 | if (dev_data->domain) |
| 2425 | return dev_data->domain; |
| 2426 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2427 | if (dev_data->alias_data != NULL) { |
| 2428 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2429 | |
| 2430 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 2431 | if (alias_data->domain != NULL) { |
| 2432 | __attach_device(dev_data, alias_data->domain); |
| 2433 | dom = alias_data->domain; |
| 2434 | } |
| 2435 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2436 | } |
| 2437 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2438 | return dom; |
| 2439 | } |
| 2440 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2441 | static int device_change_notifier(struct notifier_block *nb, |
| 2442 | unsigned long action, void *data) |
| 2443 | { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2444 | struct dma_ops_domain *dma_domain; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2445 | struct protection_domain *domain; |
| 2446 | struct iommu_dev_data *dev_data; |
| 2447 | struct device *dev = data; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2448 | struct amd_iommu *iommu; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2449 | unsigned long flags; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2450 | u16 devid; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2451 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2452 | if (!check_device(dev)) |
| 2453 | return 0; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2454 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2455 | devid = get_device_id(dev); |
| 2456 | iommu = amd_iommu_rlookup_table[devid]; |
| 2457 | dev_data = get_dev_data(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2458 | |
| 2459 | switch (action) { |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 2460 | case BUS_NOTIFY_UNBOUND_DRIVER: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2461 | |
| 2462 | domain = domain_for_device(dev); |
| 2463 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2464 | if (!domain) |
| 2465 | goto out; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2466 | if (dev_data->passthrough) |
Joerg Roedel | a1ca331 | 2009-09-01 12:22:22 +0200 | [diff] [blame] | 2467 | break; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2468 | detach_device(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2469 | break; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2470 | case BUS_NOTIFY_ADD_DEVICE: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2471 | |
| 2472 | iommu_init_device(dev); |
| 2473 | |
Joerg Roedel | 2c9195e | 2012-07-19 13:42:54 +0200 | [diff] [blame] | 2474 | /* |
| 2475 | * dev_data is still NULL and |
| 2476 | * got initialized in iommu_init_device |
| 2477 | */ |
| 2478 | dev_data = get_dev_data(dev); |
| 2479 | |
| 2480 | if (iommu_pass_through || dev_data->iommu_v2) { |
| 2481 | dev_data->passthrough = true; |
| 2482 | attach_device(dev, pt_domain); |
| 2483 | break; |
| 2484 | } |
| 2485 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2486 | domain = domain_for_device(dev); |
| 2487 | |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2488 | /* allocate a protection domain if a device is added */ |
| 2489 | dma_domain = find_protection_domain(devid); |
Joerg Roedel | c2a2876 | 2013-03-26 22:48:23 +0100 | [diff] [blame] | 2490 | if (!dma_domain) { |
| 2491 | dma_domain = dma_ops_domain_alloc(); |
| 2492 | if (!dma_domain) |
| 2493 | goto out; |
| 2494 | dma_domain->target_dev = devid; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2495 | |
Joerg Roedel | c2a2876 | 2013-03-26 22:48:23 +0100 | [diff] [blame] | 2496 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 2497 | list_add_tail(&dma_domain->list, &iommu_pd_list); |
| 2498 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 2499 | } |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 2500 | |
Joerg Roedel | 2c9195e | 2012-07-19 13:42:54 +0200 | [diff] [blame] | 2501 | dev->archdata.dma_ops = &amd_iommu_dma_ops; |
Joerg Roedel | ac1534a | 2012-06-21 14:52:40 +0200 | [diff] [blame] | 2502 | |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2503 | break; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2504 | case BUS_NOTIFY_DEL_DEVICE: |
| 2505 | |
| 2506 | iommu_uninit_device(dev); |
| 2507 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2508 | default: |
| 2509 | goto out; |
| 2510 | } |
| 2511 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2512 | iommu_completion_wait(iommu); |
| 2513 | |
| 2514 | out: |
| 2515 | return 0; |
| 2516 | } |
| 2517 | |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2518 | static struct notifier_block device_nb = { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2519 | .notifier_call = device_change_notifier, |
| 2520 | }; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2521 | |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 2522 | void amd_iommu_init_notifier(void) |
| 2523 | { |
| 2524 | bus_register_notifier(&pci_bus_type, &device_nb); |
| 2525 | } |
| 2526 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2527 | /***************************************************************************** |
| 2528 | * |
| 2529 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 2530 | * |
| 2531 | *****************************************************************************/ |
| 2532 | |
| 2533 | /* |
| 2534 | * In the dma_ops path we only have the struct device. This function |
| 2535 | * finds the corresponding IOMMU, the protection domain and the |
| 2536 | * requestor id for a given device. |
| 2537 | * If the device is not yet associated with a domain this is also done |
| 2538 | * in this function. |
| 2539 | */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2540 | static struct protection_domain *get_domain(struct device *dev) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2541 | { |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2542 | struct protection_domain *domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2543 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2544 | u16 devid = get_device_id(dev); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2545 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2546 | if (!check_device(dev)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2547 | return ERR_PTR(-EINVAL); |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2548 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2549 | domain = domain_for_device(dev); |
| 2550 | if (domain != NULL && !dma_ops_domain(domain)) |
| 2551 | return ERR_PTR(-EBUSY); |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2552 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2553 | if (domain != NULL) |
| 2554 | return domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2555 | |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 2556 | /* Device not bound yet - bind it */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2557 | dma_dom = find_protection_domain(devid); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2558 | if (!dma_dom) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2559 | dma_dom = amd_iommu_rlookup_table[devid]->default_dom; |
| 2560 | attach_device(dev, &dma_dom->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2561 | DUMP_printk("Using protection domain %d for device %s\n", |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2562 | dma_dom->domain.id, dev_name(dev)); |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 2563 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2564 | return &dma_dom->domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2565 | } |
| 2566 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2567 | static void update_device_table(struct protection_domain *domain) |
| 2568 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2569 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2570 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2571 | list_for_each_entry(dev_data, &domain->dev_list, list) |
| 2572 | set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2573 | } |
| 2574 | |
| 2575 | static void update_domain(struct protection_domain *domain) |
| 2576 | { |
| 2577 | if (!domain->updated) |
| 2578 | return; |
| 2579 | |
| 2580 | update_device_table(domain); |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2581 | |
| 2582 | domain_flush_devices(domain); |
| 2583 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2584 | |
| 2585 | domain->updated = false; |
| 2586 | } |
| 2587 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2588 | /* |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2589 | * This function fetches the PTE for a given address in the aperture |
| 2590 | */ |
| 2591 | static u64* dma_ops_get_pte(struct dma_ops_domain *dom, |
| 2592 | unsigned long address) |
| 2593 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2594 | struct aperture_range *aperture; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2595 | u64 *pte, *pte_page; |
| 2596 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2597 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2598 | if (!aperture) |
| 2599 | return NULL; |
| 2600 | |
| 2601 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2602 | if (!pte) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 2603 | pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 2604 | GFP_ATOMIC); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2605 | aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; |
| 2606 | } else |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2607 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2608 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2609 | update_domain(&dom->domain); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2610 | |
| 2611 | return pte; |
| 2612 | } |
| 2613 | |
| 2614 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2615 | * This is the generic map function. It maps one 4kb page at paddr to |
| 2616 | * the given address in the DMA address space for the domain. |
| 2617 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2618 | static dma_addr_t dma_ops_domain_map(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2619 | unsigned long address, |
| 2620 | phys_addr_t paddr, |
| 2621 | int direction) |
| 2622 | { |
| 2623 | u64 *pte, __pte; |
| 2624 | |
| 2625 | WARN_ON(address > dom->aperture_size); |
| 2626 | |
| 2627 | paddr &= PAGE_MASK; |
| 2628 | |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2629 | pte = dma_ops_get_pte(dom, address); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2630 | if (!pte) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2631 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2632 | |
| 2633 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 2634 | |
| 2635 | if (direction == DMA_TO_DEVICE) |
| 2636 | __pte |= IOMMU_PTE_IR; |
| 2637 | else if (direction == DMA_FROM_DEVICE) |
| 2638 | __pte |= IOMMU_PTE_IW; |
| 2639 | else if (direction == DMA_BIDIRECTIONAL) |
| 2640 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 2641 | |
| 2642 | WARN_ON(*pte); |
| 2643 | |
| 2644 | *pte = __pte; |
| 2645 | |
| 2646 | return (dma_addr_t)address; |
| 2647 | } |
| 2648 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2649 | /* |
| 2650 | * The generic unmapping function for on page in the DMA address space. |
| 2651 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2652 | static void dma_ops_domain_unmap(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2653 | unsigned long address) |
| 2654 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2655 | struct aperture_range *aperture; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2656 | u64 *pte; |
| 2657 | |
| 2658 | if (address >= dom->aperture_size) |
| 2659 | return; |
| 2660 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2661 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2662 | if (!aperture) |
| 2663 | return; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2664 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2665 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
| 2666 | if (!pte) |
| 2667 | return; |
| 2668 | |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2669 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2670 | |
| 2671 | WARN_ON(!*pte); |
| 2672 | |
| 2673 | *pte = 0ULL; |
| 2674 | } |
| 2675 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2676 | /* |
| 2677 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 2678 | * contiguous memory region into DMA address space. It is used by all |
| 2679 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2680 | * Must be called with the domain lock held. |
| 2681 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2682 | static dma_addr_t __map_single(struct device *dev, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2683 | struct dma_ops_domain *dma_dom, |
| 2684 | phys_addr_t paddr, |
| 2685 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2686 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2687 | bool align, |
| 2688 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2689 | { |
| 2690 | dma_addr_t offset = paddr & ~PAGE_MASK; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2691 | dma_addr_t address, start, ret; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2692 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2693 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2694 | int i; |
| 2695 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2696 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2697 | paddr &= PAGE_MASK; |
| 2698 | |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 2699 | INC_STATS_COUNTER(total_map_requests); |
| 2700 | |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 2701 | if (pages > 1) |
| 2702 | INC_STATS_COUNTER(cross_page); |
| 2703 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2704 | if (align) |
| 2705 | align_mask = (1UL << get_order(size)) - 1; |
| 2706 | |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2707 | retry: |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2708 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 2709 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2710 | if (unlikely(address == DMA_ERROR_CODE)) { |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2711 | /* |
| 2712 | * setting next_address here will let the address |
| 2713 | * allocator only scan the new allocated range in the |
| 2714 | * first run. This is a small optimization. |
| 2715 | */ |
| 2716 | dma_dom->next_address = dma_dom->aperture_size; |
| 2717 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 2718 | if (alloc_new_range(dma_dom, false, GFP_ATOMIC)) |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2719 | goto out; |
| 2720 | |
| 2721 | /* |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 2722 | * aperture was successfully enlarged by 128 MB, try |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2723 | * allocation again |
| 2724 | */ |
| 2725 | goto retry; |
| 2726 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2727 | |
| 2728 | start = address; |
| 2729 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2730 | ret = dma_ops_domain_map(dma_dom, start, paddr, dir); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2731 | if (ret == DMA_ERROR_CODE) |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2732 | goto out_unmap; |
| 2733 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2734 | paddr += PAGE_SIZE; |
| 2735 | start += PAGE_SIZE; |
| 2736 | } |
| 2737 | address += offset; |
| 2738 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2739 | ADD_STATS_COUNTER(alloced_io_mem, size); |
| 2740 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 2741 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2742 | domain_flush_tlb(&dma_dom->domain); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 2743 | dma_dom->need_flush = false; |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 2744 | } else if (unlikely(amd_iommu_np_cache)) |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2745 | domain_flush_pages(&dma_dom->domain, address, size); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2746 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2747 | out: |
| 2748 | return address; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2749 | |
| 2750 | out_unmap: |
| 2751 | |
| 2752 | for (--i; i >= 0; --i) { |
| 2753 | start -= PAGE_SIZE; |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2754 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2755 | } |
| 2756 | |
| 2757 | dma_ops_free_addresses(dma_dom, address, pages); |
| 2758 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2759 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2760 | } |
| 2761 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2762 | /* |
| 2763 | * Does the reverse of the __map_single function. Must be called with |
| 2764 | * the domain lock held too |
| 2765 | */ |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2766 | static void __unmap_single(struct dma_ops_domain *dma_dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2767 | dma_addr_t dma_addr, |
| 2768 | size_t size, |
| 2769 | int dir) |
| 2770 | { |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2771 | dma_addr_t flush_addr; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2772 | dma_addr_t i, start; |
| 2773 | unsigned int pages; |
| 2774 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2775 | if ((dma_addr == DMA_ERROR_CODE) || |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 2776 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2777 | return; |
| 2778 | |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2779 | flush_addr = dma_addr; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2780 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2781 | dma_addr &= PAGE_MASK; |
| 2782 | start = dma_addr; |
| 2783 | |
| 2784 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2785 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2786 | start += PAGE_SIZE; |
| 2787 | } |
| 2788 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2789 | SUB_STATS_COUNTER(alloced_io_mem, size); |
| 2790 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2791 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2792 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2793 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2794 | domain_flush_pages(&dma_dom->domain, flush_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2795 | dma_dom->need_flush = false; |
| 2796 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2797 | } |
| 2798 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2799 | /* |
| 2800 | * The exported map_single function for dma_ops. |
| 2801 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2802 | static dma_addr_t map_page(struct device *dev, struct page *page, |
| 2803 | unsigned long offset, size_t size, |
| 2804 | enum dma_data_direction dir, |
| 2805 | struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2806 | { |
| 2807 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2808 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2809 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2810 | u64 dma_mask; |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2811 | phys_addr_t paddr = page_to_phys(page) + offset; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2812 | |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 2813 | INC_STATS_COUNTER(cnt_map_single); |
| 2814 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2815 | domain = get_domain(dev); |
| 2816 | if (PTR_ERR(domain) == -EINVAL) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2817 | return (dma_addr_t)paddr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2818 | else if (IS_ERR(domain)) |
| 2819 | return DMA_ERROR_CODE; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2820 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2821 | dma_mask = *dev->dma_mask; |
| 2822 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2823 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2824 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2825 | addr = __map_single(dev, domain->priv, paddr, size, dir, false, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2826 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2827 | if (addr == DMA_ERROR_CODE) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2828 | goto out; |
| 2829 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2830 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2831 | |
| 2832 | out: |
| 2833 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2834 | |
| 2835 | return addr; |
| 2836 | } |
| 2837 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2838 | /* |
| 2839 | * The exported unmap_single function for dma_ops. |
| 2840 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2841 | static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
| 2842 | enum dma_data_direction dir, struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2843 | { |
| 2844 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2845 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2846 | |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 2847 | INC_STATS_COUNTER(cnt_unmap_single); |
| 2848 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2849 | domain = get_domain(dev); |
| 2850 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2851 | return; |
| 2852 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2853 | spin_lock_irqsave(&domain->lock, flags); |
| 2854 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2855 | __unmap_single(domain->priv, dma_addr, size, dir); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2856 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2857 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2858 | |
| 2859 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2860 | } |
| 2861 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2862 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2863 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2864 | * lists). |
| 2865 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2866 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2867 | int nelems, enum dma_data_direction dir, |
| 2868 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2869 | { |
| 2870 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2871 | struct protection_domain *domain; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2872 | int i; |
| 2873 | struct scatterlist *s; |
| 2874 | phys_addr_t paddr; |
| 2875 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2876 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2877 | |
Joerg Roedel | d03f067 | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 2878 | INC_STATS_COUNTER(cnt_map_sg); |
| 2879 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2880 | domain = get_domain(dev); |
Joerg Roedel | a0e191b | 2013-04-09 15:04:36 +0200 | [diff] [blame] | 2881 | if (IS_ERR(domain)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2882 | return 0; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2883 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2884 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2885 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2886 | spin_lock_irqsave(&domain->lock, flags); |
| 2887 | |
| 2888 | for_each_sg(sglist, s, nelems, i) { |
| 2889 | paddr = sg_phys(s); |
| 2890 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2891 | s->dma_address = __map_single(dev, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2892 | paddr, s->length, dir, false, |
| 2893 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2894 | |
| 2895 | if (s->dma_address) { |
| 2896 | s->dma_length = s->length; |
| 2897 | mapped_elems++; |
| 2898 | } else |
| 2899 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2900 | } |
| 2901 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2902 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2903 | |
| 2904 | out: |
| 2905 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2906 | |
| 2907 | return mapped_elems; |
| 2908 | unmap: |
| 2909 | for_each_sg(sglist, s, mapped_elems, i) { |
| 2910 | if (s->dma_address) |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2911 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2912 | s->dma_length, dir); |
| 2913 | s->dma_address = s->dma_length = 0; |
| 2914 | } |
| 2915 | |
| 2916 | mapped_elems = 0; |
| 2917 | |
| 2918 | goto out; |
| 2919 | } |
| 2920 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2921 | /* |
| 2922 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2923 | * lists). |
| 2924 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2925 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2926 | int nelems, enum dma_data_direction dir, |
| 2927 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2928 | { |
| 2929 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2930 | struct protection_domain *domain; |
| 2931 | struct scatterlist *s; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2932 | int i; |
| 2933 | |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 2934 | INC_STATS_COUNTER(cnt_unmap_sg); |
| 2935 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2936 | domain = get_domain(dev); |
| 2937 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2938 | return; |
| 2939 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2940 | spin_lock_irqsave(&domain->lock, flags); |
| 2941 | |
| 2942 | for_each_sg(sglist, s, nelems, i) { |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2943 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2944 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2945 | s->dma_address = s->dma_length = 0; |
| 2946 | } |
| 2947 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2948 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2949 | |
| 2950 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2951 | } |
| 2952 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2953 | /* |
| 2954 | * The exported alloc_coherent function for dma_ops. |
| 2955 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2956 | static void *alloc_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 2957 | dma_addr_t *dma_addr, gfp_t flag, |
| 2958 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2959 | { |
| 2960 | unsigned long flags; |
| 2961 | void *virt_addr; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2962 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2963 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2964 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2965 | |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 2966 | INC_STATS_COUNTER(cnt_alloc_coherent); |
| 2967 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2968 | domain = get_domain(dev); |
| 2969 | if (PTR_ERR(domain) == -EINVAL) { |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2970 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2971 | *dma_addr = __pa(virt_addr); |
| 2972 | return virt_addr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2973 | } else if (IS_ERR(domain)) |
| 2974 | return NULL; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2975 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2976 | dma_mask = dev->coherent_dma_mask; |
| 2977 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 2978 | flag |= __GFP_ZERO; |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 2979 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2980 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2981 | if (!virt_addr) |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2982 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2983 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2984 | paddr = virt_to_phys(virt_addr); |
| 2985 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2986 | if (!dma_mask) |
| 2987 | dma_mask = *dev->dma_mask; |
| 2988 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2989 | spin_lock_irqsave(&domain->lock, flags); |
| 2990 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2991 | *dma_addr = __map_single(dev, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2992 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2993 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2994 | if (*dma_addr == DMA_ERROR_CODE) { |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2995 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2996 | goto out_free; |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2997 | } |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2998 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2999 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3000 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3001 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3002 | |
| 3003 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 3004 | |
| 3005 | out_free: |
| 3006 | |
| 3007 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 3008 | |
| 3009 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3010 | } |
| 3011 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3012 | /* |
| 3013 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3014 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3015 | static void free_coherent(struct device *dev, size_t size, |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 3016 | void *virt_addr, dma_addr_t dma_addr, |
| 3017 | struct dma_attrs *attrs) |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3018 | { |
| 3019 | unsigned long flags; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3020 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3021 | |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 3022 | INC_STATS_COUNTER(cnt_free_coherent); |
| 3023 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 3024 | domain = get_domain(dev); |
| 3025 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 3026 | goto free_mem; |
| 3027 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3028 | spin_lock_irqsave(&domain->lock, flags); |
| 3029 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 3030 | __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3031 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 3032 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 3033 | |
| 3034 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3035 | |
| 3036 | free_mem: |
| 3037 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 3038 | } |
| 3039 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3040 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 3041 | * This function is called by the DMA layer to find out if we can handle a |
| 3042 | * particular device. It is part of the dma_ops. |
| 3043 | */ |
| 3044 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 3045 | { |
Joerg Roedel | 420aef8 | 2009-11-23 16:14:57 +0100 | [diff] [blame] | 3046 | return check_device(dev); |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 3047 | } |
| 3048 | |
| 3049 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3050 | * The function for pre-allocating protection domains. |
| 3051 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3052 | * If the driver core informs the DMA layer if a driver grabs a device |
| 3053 | * we don't need to preallocate the protection domains anymore. |
| 3054 | * For now we have to. |
| 3055 | */ |
Steffen Persvold | 943bc7e | 2012-03-15 12:16:28 +0100 | [diff] [blame] | 3056 | static void __init prealloc_protection_domains(void) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3057 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3058 | struct iommu_dev_data *dev_data; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3059 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3060 | struct pci_dev *dev = NULL; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3061 | u16 devid; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3062 | |
Chris Wright | d18c69d | 2010-04-02 18:27:55 -0700 | [diff] [blame] | 3063 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3064 | |
| 3065 | /* Do we handle this device? */ |
| 3066 | if (!check_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3067 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3068 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3069 | dev_data = get_dev_data(&dev->dev); |
| 3070 | if (!amd_iommu_force_isolation && dev_data->iommu_v2) { |
| 3071 | /* Make sure passthrough domain is allocated */ |
| 3072 | alloc_passthrough_domain(); |
| 3073 | dev_data->passthrough = true; |
| 3074 | attach_device(&dev->dev, pt_domain); |
Frank Arnold | df805ab | 2012-08-27 19:21:04 +0200 | [diff] [blame] | 3075 | pr_info("AMD-Vi: Using passthrough domain for device %s\n", |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3076 | dev_name(&dev->dev)); |
| 3077 | } |
| 3078 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3079 | /* Is there already any domain for it? */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3080 | if (domain_for_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3081 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3082 | |
| 3083 | devid = get_device_id(&dev->dev); |
| 3084 | |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 3085 | dma_dom = dma_ops_domain_alloc(); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3086 | if (!dma_dom) |
| 3087 | continue; |
| 3088 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 3089 | dma_dom->target_dev = devid; |
| 3090 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3091 | attach_device(&dev->dev, &dma_dom->domain); |
Joerg Roedel | be83129 | 2009-11-23 12:50:00 +0100 | [diff] [blame] | 3092 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 3093 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 3094 | } |
| 3095 | } |
| 3096 | |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 3097 | static struct dma_map_ops amd_iommu_dma_ops = { |
Andrzej Pietrasiewicz | baa676f | 2012-03-27 14:28:18 +0200 | [diff] [blame] | 3098 | .alloc = alloc_coherent, |
| 3099 | .free = free_coherent, |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 3100 | .map_page = map_page, |
| 3101 | .unmap_page = unmap_page, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3102 | .map_sg = map_sg, |
| 3103 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 3104 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3105 | }; |
| 3106 | |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3107 | static unsigned device_dma_ops_init(void) |
| 3108 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3109 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3110 | struct pci_dev *pdev = NULL; |
| 3111 | unsigned unhandled = 0; |
| 3112 | |
| 3113 | for_each_pci_dev(pdev) { |
| 3114 | if (!check_device(&pdev->dev)) { |
Joerg Roedel | af1be04 | 2012-01-18 14:03:11 +0100 | [diff] [blame] | 3115 | |
| 3116 | iommu_ignore_device(&pdev->dev); |
| 3117 | |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3118 | unhandled += 1; |
| 3119 | continue; |
| 3120 | } |
| 3121 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3122 | dev_data = get_dev_data(&pdev->dev); |
| 3123 | |
| 3124 | if (!dev_data->passthrough) |
| 3125 | pdev->dev.archdata.dma_ops = &amd_iommu_dma_ops; |
| 3126 | else |
| 3127 | pdev->dev.archdata.dma_ops = &nommu_dma_ops; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3128 | } |
| 3129 | |
| 3130 | return unhandled; |
| 3131 | } |
| 3132 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3133 | /* |
| 3134 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 3135 | */ |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 3136 | |
| 3137 | void __init amd_iommu_init_api(void) |
| 3138 | { |
Joerg Roedel | 2cc21c4 | 2011-09-06 17:56:07 +0200 | [diff] [blame] | 3139 | bus_set_iommu(&pci_bus_type, &amd_iommu_ops); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 3140 | } |
| 3141 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3142 | int __init amd_iommu_init_dma_ops(void) |
| 3143 | { |
| 3144 | struct amd_iommu *iommu; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3145 | int ret, unhandled; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3146 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3147 | /* |
| 3148 | * first allocate a default protection domain for every IOMMU we |
| 3149 | * found in the system. Devices not assigned to any other |
| 3150 | * protection domain will be assigned to the default one. |
| 3151 | */ |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 3152 | for_each_iommu(iommu) { |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 3153 | iommu->default_dom = dma_ops_domain_alloc(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3154 | if (iommu->default_dom == NULL) |
| 3155 | return -ENOMEM; |
Joerg Roedel | e2dc14a | 2008-12-10 18:48:59 +0100 | [diff] [blame] | 3156 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3157 | ret = iommu_init_unity_mappings(iommu); |
| 3158 | if (ret) |
| 3159 | goto free_domains; |
| 3160 | } |
| 3161 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3162 | /* |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 3163 | * Pre-allocate the protection domains for each device. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3164 | */ |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 3165 | prealloc_protection_domains(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3166 | |
| 3167 | iommu_detected = 1; |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 3168 | swiotlb = 0; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3169 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 3170 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 3171 | unhandled = device_dma_ops_init(); |
| 3172 | if (unhandled && max_pfn > MAX_DMA32_PFN) { |
| 3173 | /* There are unhandled devices - initialize swiotlb for them */ |
| 3174 | swiotlb = 1; |
| 3175 | } |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3176 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 3177 | amd_iommu_stats_init(); |
| 3178 | |
Joerg Roedel | 62410ee | 2012-06-12 16:42:43 +0200 | [diff] [blame] | 3179 | if (amd_iommu_unmap_flush) |
| 3180 | pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n"); |
| 3181 | else |
| 3182 | pr_info("AMD-Vi: Lazy IO/TLB flushing enabled\n"); |
| 3183 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3184 | return 0; |
| 3185 | |
| 3186 | free_domains: |
| 3187 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 3188 | for_each_iommu(iommu) { |
Cyril Roelandt | 91457df | 2013-02-12 05:01:50 +0100 | [diff] [blame] | 3189 | dma_ops_domain_free(iommu->default_dom); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 3190 | } |
| 3191 | |
| 3192 | return ret; |
| 3193 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3194 | |
| 3195 | /***************************************************************************** |
| 3196 | * |
| 3197 | * The following functions belong to the exported interface of AMD IOMMU |
| 3198 | * |
| 3199 | * This interface allows access to lower level functions of the IOMMU |
| 3200 | * like protection domain handling and assignement of devices to domains |
| 3201 | * which is not possible with the dma_ops interface. |
| 3202 | * |
| 3203 | *****************************************************************************/ |
| 3204 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3205 | static void cleanup_domain(struct protection_domain *domain) |
| 3206 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 3207 | struct iommu_dev_data *dev_data, *next; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3208 | unsigned long flags; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3209 | |
| 3210 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 3211 | |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 3212 | list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) { |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 3213 | __detach_device(dev_data); |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 3214 | atomic_set(&dev_data->bind, 0); |
| 3215 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 3216 | |
| 3217 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 3218 | } |
| 3219 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3220 | static void protection_domain_free(struct protection_domain *domain) |
| 3221 | { |
| 3222 | if (!domain) |
| 3223 | return; |
| 3224 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 3225 | del_domain_from_list(domain); |
| 3226 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3227 | if (domain->id) |
| 3228 | domain_id_free(domain->id); |
| 3229 | |
| 3230 | kfree(domain); |
| 3231 | } |
| 3232 | |
| 3233 | static struct protection_domain *protection_domain_alloc(void) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3234 | { |
| 3235 | struct protection_domain *domain; |
| 3236 | |
| 3237 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 3238 | if (!domain) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3239 | return NULL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3240 | |
| 3241 | spin_lock_init(&domain->lock); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3242 | mutex_init(&domain->api_lock); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3243 | domain->id = domain_id_alloc(); |
| 3244 | if (!domain->id) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3245 | goto out_err; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 3246 | INIT_LIST_HEAD(&domain->dev_list); |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3247 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 3248 | add_domain_to_list(domain); |
| 3249 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3250 | return domain; |
| 3251 | |
| 3252 | out_err: |
| 3253 | kfree(domain); |
| 3254 | |
| 3255 | return NULL; |
| 3256 | } |
| 3257 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3258 | static int __init alloc_passthrough_domain(void) |
| 3259 | { |
| 3260 | if (pt_domain != NULL) |
| 3261 | return 0; |
| 3262 | |
| 3263 | /* allocate passthrough domain */ |
| 3264 | pt_domain = protection_domain_alloc(); |
| 3265 | if (!pt_domain) |
| 3266 | return -ENOMEM; |
| 3267 | |
| 3268 | pt_domain->mode = PAGE_MODE_NONE; |
| 3269 | |
| 3270 | return 0; |
| 3271 | } |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3272 | static int amd_iommu_domain_init(struct iommu_domain *dom) |
| 3273 | { |
| 3274 | struct protection_domain *domain; |
| 3275 | |
| 3276 | domain = protection_domain_alloc(); |
| 3277 | if (!domain) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3278 | goto out_free; |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3279 | |
| 3280 | domain->mode = PAGE_MODE_3_LEVEL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3281 | domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 3282 | if (!domain->pt_root) |
| 3283 | goto out_free; |
| 3284 | |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3285 | domain->iommu_domain = dom; |
| 3286 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3287 | dom->priv = domain; |
| 3288 | |
Joerg Roedel | 0ff64f8 | 2012-01-26 19:40:53 +0100 | [diff] [blame] | 3289 | dom->geometry.aperture_start = 0; |
| 3290 | dom->geometry.aperture_end = ~0ULL; |
| 3291 | dom->geometry.force_aperture = true; |
| 3292 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3293 | return 0; |
| 3294 | |
| 3295 | out_free: |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3296 | protection_domain_free(domain); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3297 | |
| 3298 | return -ENOMEM; |
| 3299 | } |
| 3300 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3301 | static void amd_iommu_domain_destroy(struct iommu_domain *dom) |
| 3302 | { |
| 3303 | struct protection_domain *domain = dom->priv; |
| 3304 | |
| 3305 | if (!domain) |
| 3306 | return; |
| 3307 | |
| 3308 | if (domain->dev_cnt > 0) |
| 3309 | cleanup_domain(domain); |
| 3310 | |
| 3311 | BUG_ON(domain->dev_cnt != 0); |
| 3312 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3313 | if (domain->mode != PAGE_MODE_NONE) |
| 3314 | free_pagetable(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3315 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3316 | if (domain->flags & PD_IOMMUV2_MASK) |
| 3317 | free_gcr3_table(domain); |
| 3318 | |
Joerg Roedel | 8b408fe | 2010-03-08 14:20:07 +0100 | [diff] [blame] | 3319 | protection_domain_free(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3320 | |
| 3321 | dom->priv = NULL; |
| 3322 | } |
| 3323 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3324 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 3325 | struct device *dev) |
| 3326 | { |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3327 | struct iommu_dev_data *dev_data = dev->archdata.iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3328 | struct amd_iommu *iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3329 | u16 devid; |
| 3330 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3331 | if (!check_device(dev)) |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3332 | return; |
| 3333 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3334 | devid = get_device_id(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3335 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3336 | if (dev_data->domain != NULL) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3337 | detach_device(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3338 | |
| 3339 | iommu = amd_iommu_rlookup_table[devid]; |
| 3340 | if (!iommu) |
| 3341 | return; |
| 3342 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3343 | iommu_completion_wait(iommu); |
| 3344 | } |
| 3345 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3346 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 3347 | struct device *dev) |
| 3348 | { |
| 3349 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3350 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3351 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3352 | int ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3353 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3354 | if (!check_device(dev)) |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3355 | return -EINVAL; |
| 3356 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3357 | dev_data = dev->archdata.iommu; |
| 3358 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 3359 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3360 | if (!iommu) |
| 3361 | return -EINVAL; |
| 3362 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3363 | if (dev_data->domain) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3364 | detach_device(dev); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3365 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3366 | ret = attach_device(dev, domain); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3367 | |
| 3368 | iommu_completion_wait(iommu); |
| 3369 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3370 | return ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3371 | } |
| 3372 | |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3373 | static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3374 | phys_addr_t paddr, size_t page_size, int iommu_prot) |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3375 | { |
| 3376 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3377 | int prot = 0; |
| 3378 | int ret; |
| 3379 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3380 | if (domain->mode == PAGE_MODE_NONE) |
| 3381 | return -EINVAL; |
| 3382 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3383 | if (iommu_prot & IOMMU_READ) |
| 3384 | prot |= IOMMU_PROT_IR; |
| 3385 | if (iommu_prot & IOMMU_WRITE) |
| 3386 | prot |= IOMMU_PROT_IW; |
| 3387 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3388 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3389 | ret = iommu_map_page(domain, iova, paddr, prot, page_size); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3390 | mutex_unlock(&domain->api_lock); |
| 3391 | |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3392 | return ret; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3393 | } |
| 3394 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3395 | static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, |
| 3396 | size_t page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3397 | { |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3398 | struct protection_domain *domain = dom->priv; |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3399 | size_t unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3400 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3401 | if (domain->mode == PAGE_MODE_NONE) |
| 3402 | return -EINVAL; |
| 3403 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3404 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3405 | unmap_size = iommu_unmap_page(domain, iova, page_size); |
Joerg Roedel | 795e74f7 | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3406 | mutex_unlock(&domain->api_lock); |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3407 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 3408 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3409 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3410 | return unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3411 | } |
| 3412 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3413 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
| 3414 | unsigned long iova) |
| 3415 | { |
| 3416 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3417 | unsigned long offset_mask; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3418 | phys_addr_t paddr; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3419 | u64 *pte, __pte; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3420 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3421 | if (domain->mode == PAGE_MODE_NONE) |
| 3422 | return iova; |
| 3423 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 3424 | pte = fetch_pte(domain, iova); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3425 | |
Joerg Roedel | a6d41a4 | 2009-09-02 17:08:55 +0200 | [diff] [blame] | 3426 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3427 | return 0; |
| 3428 | |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3429 | if (PM_PTE_LEVEL(*pte) == 0) |
| 3430 | offset_mask = PAGE_SIZE - 1; |
| 3431 | else |
| 3432 | offset_mask = PTE_PAGE_SIZE(*pte) - 1; |
| 3433 | |
| 3434 | __pte = *pte & PM_ADDR_MASK; |
| 3435 | paddr = (__pte & ~offset_mask) | (iova & offset_mask); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3436 | |
| 3437 | return paddr; |
| 3438 | } |
| 3439 | |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3440 | static int amd_iommu_domain_has_cap(struct iommu_domain *domain, |
| 3441 | unsigned long cap) |
| 3442 | { |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3443 | switch (cap) { |
| 3444 | case IOMMU_CAP_CACHE_COHERENCY: |
| 3445 | return 1; |
Joerg Roedel | bdddadc | 2012-07-02 18:38:13 +0200 | [diff] [blame] | 3446 | case IOMMU_CAP_INTR_REMAP: |
| 3447 | return irq_remapping_enabled; |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3448 | } |
| 3449 | |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3450 | return 0; |
| 3451 | } |
| 3452 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3453 | static struct iommu_ops amd_iommu_ops = { |
| 3454 | .domain_init = amd_iommu_domain_init, |
| 3455 | .domain_destroy = amd_iommu_domain_destroy, |
| 3456 | .attach_dev = amd_iommu_attach_device, |
| 3457 | .detach_dev = amd_iommu_detach_device, |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3458 | .map = amd_iommu_map, |
| 3459 | .unmap = amd_iommu_unmap, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3460 | .iova_to_phys = amd_iommu_iova_to_phys, |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3461 | .domain_has_cap = amd_iommu_domain_has_cap, |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 3462 | .pgsize_bitmap = AMD_IOMMU_PGSIZES, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3463 | }; |
| 3464 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3465 | /***************************************************************************** |
| 3466 | * |
| 3467 | * The next functions do a basic initialization of IOMMU for pass through |
| 3468 | * mode |
| 3469 | * |
| 3470 | * In passthrough mode the IOMMU is initialized and enabled but not used for |
| 3471 | * DMA-API translation. |
| 3472 | * |
| 3473 | *****************************************************************************/ |
| 3474 | |
| 3475 | int __init amd_iommu_init_passthrough(void) |
| 3476 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3477 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3478 | struct pci_dev *dev = NULL; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3479 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3480 | u16 devid; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3481 | int ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3482 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3483 | ret = alloc_passthrough_domain(); |
| 3484 | if (ret) |
| 3485 | return ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3486 | |
Kulikov Vasiliy | 6c54aab | 2010-07-03 12:03:51 -0400 | [diff] [blame] | 3487 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3488 | if (!check_device(&dev->dev)) |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3489 | continue; |
| 3490 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3491 | dev_data = get_dev_data(&dev->dev); |
| 3492 | dev_data->passthrough = true; |
| 3493 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3494 | devid = get_device_id(&dev->dev); |
| 3495 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3496 | iommu = amd_iommu_rlookup_table[devid]; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3497 | if (!iommu) |
| 3498 | continue; |
| 3499 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3500 | attach_device(&dev->dev, pt_domain); |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3501 | } |
| 3502 | |
Joerg Roedel | 2655d7a | 2011-12-22 12:35:38 +0100 | [diff] [blame] | 3503 | amd_iommu_stats_init(); |
| 3504 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3505 | pr_info("AMD-Vi: Initialized for Passthrough Mode\n"); |
| 3506 | |
| 3507 | return 0; |
| 3508 | } |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 3509 | |
| 3510 | /* IOMMUv2 specific functions */ |
| 3511 | int amd_iommu_register_ppr_notifier(struct notifier_block *nb) |
| 3512 | { |
| 3513 | return atomic_notifier_chain_register(&ppr_notifier, nb); |
| 3514 | } |
| 3515 | EXPORT_SYMBOL(amd_iommu_register_ppr_notifier); |
| 3516 | |
| 3517 | int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb) |
| 3518 | { |
| 3519 | return atomic_notifier_chain_unregister(&ppr_notifier, nb); |
| 3520 | } |
| 3521 | EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3522 | |
| 3523 | void amd_iommu_domain_direct_map(struct iommu_domain *dom) |
| 3524 | { |
| 3525 | struct protection_domain *domain = dom->priv; |
| 3526 | unsigned long flags; |
| 3527 | |
| 3528 | spin_lock_irqsave(&domain->lock, flags); |
| 3529 | |
| 3530 | /* Update data structure */ |
| 3531 | domain->mode = PAGE_MODE_NONE; |
| 3532 | domain->updated = true; |
| 3533 | |
| 3534 | /* Make changes visible to IOMMUs */ |
| 3535 | update_domain(domain); |
| 3536 | |
| 3537 | /* Page-table is not visible to IOMMU anymore, so free it */ |
| 3538 | free_pagetable(domain); |
| 3539 | |
| 3540 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3541 | } |
| 3542 | EXPORT_SYMBOL(amd_iommu_domain_direct_map); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3543 | |
| 3544 | int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids) |
| 3545 | { |
| 3546 | struct protection_domain *domain = dom->priv; |
| 3547 | unsigned long flags; |
| 3548 | int levels, ret; |
| 3549 | |
| 3550 | if (pasids <= 0 || pasids > (PASID_MASK + 1)) |
| 3551 | return -EINVAL; |
| 3552 | |
| 3553 | /* Number of GCR3 table levels required */ |
| 3554 | for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9) |
| 3555 | levels += 1; |
| 3556 | |
| 3557 | if (levels > amd_iommu_max_glx_val) |
| 3558 | return -EINVAL; |
| 3559 | |
| 3560 | spin_lock_irqsave(&domain->lock, flags); |
| 3561 | |
| 3562 | /* |
| 3563 | * Save us all sanity checks whether devices already in the |
| 3564 | * domain support IOMMUv2. Just force that the domain has no |
| 3565 | * devices attached when it is switched into IOMMUv2 mode. |
| 3566 | */ |
| 3567 | ret = -EBUSY; |
| 3568 | if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK) |
| 3569 | goto out; |
| 3570 | |
| 3571 | ret = -ENOMEM; |
| 3572 | domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3573 | if (domain->gcr3_tbl == NULL) |
| 3574 | goto out; |
| 3575 | |
| 3576 | domain->glx = levels; |
| 3577 | domain->flags |= PD_IOMMUV2_MASK; |
| 3578 | domain->updated = true; |
| 3579 | |
| 3580 | update_domain(domain); |
| 3581 | |
| 3582 | ret = 0; |
| 3583 | |
| 3584 | out: |
| 3585 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3586 | |
| 3587 | return ret; |
| 3588 | } |
| 3589 | EXPORT_SYMBOL(amd_iommu_domain_enable_v2); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3590 | |
| 3591 | static int __flush_pasid(struct protection_domain *domain, int pasid, |
| 3592 | u64 address, bool size) |
| 3593 | { |
| 3594 | struct iommu_dev_data *dev_data; |
| 3595 | struct iommu_cmd cmd; |
| 3596 | int i, ret; |
| 3597 | |
| 3598 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3599 | return -EINVAL; |
| 3600 | |
| 3601 | build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size); |
| 3602 | |
| 3603 | /* |
| 3604 | * IOMMU TLB needs to be flushed before Device TLB to |
| 3605 | * prevent device TLB refill from IOMMU TLB |
| 3606 | */ |
| 3607 | for (i = 0; i < amd_iommus_present; ++i) { |
| 3608 | if (domain->dev_iommu[i] == 0) |
| 3609 | continue; |
| 3610 | |
| 3611 | ret = iommu_queue_command(amd_iommus[i], &cmd); |
| 3612 | if (ret != 0) |
| 3613 | goto out; |
| 3614 | } |
| 3615 | |
| 3616 | /* Wait until IOMMU TLB flushes are complete */ |
| 3617 | domain_flush_complete(domain); |
| 3618 | |
| 3619 | /* Now flush device TLBs */ |
| 3620 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
| 3621 | struct amd_iommu *iommu; |
| 3622 | int qdep; |
| 3623 | |
| 3624 | BUG_ON(!dev_data->ats.enabled); |
| 3625 | |
| 3626 | qdep = dev_data->ats.qdep; |
| 3627 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3628 | |
| 3629 | build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid, |
| 3630 | qdep, address, size); |
| 3631 | |
| 3632 | ret = iommu_queue_command(iommu, &cmd); |
| 3633 | if (ret != 0) |
| 3634 | goto out; |
| 3635 | } |
| 3636 | |
| 3637 | /* Wait until all device TLBs are flushed */ |
| 3638 | domain_flush_complete(domain); |
| 3639 | |
| 3640 | ret = 0; |
| 3641 | |
| 3642 | out: |
| 3643 | |
| 3644 | return ret; |
| 3645 | } |
| 3646 | |
| 3647 | static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid, |
| 3648 | u64 address) |
| 3649 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3650 | INC_STATS_COUNTER(invalidate_iotlb); |
| 3651 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3652 | return __flush_pasid(domain, pasid, address, false); |
| 3653 | } |
| 3654 | |
| 3655 | int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 3656 | u64 address) |
| 3657 | { |
| 3658 | struct protection_domain *domain = dom->priv; |
| 3659 | unsigned long flags; |
| 3660 | int ret; |
| 3661 | |
| 3662 | spin_lock_irqsave(&domain->lock, flags); |
| 3663 | ret = __amd_iommu_flush_page(domain, pasid, address); |
| 3664 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3665 | |
| 3666 | return ret; |
| 3667 | } |
| 3668 | EXPORT_SYMBOL(amd_iommu_flush_page); |
| 3669 | |
| 3670 | static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid) |
| 3671 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3672 | INC_STATS_COUNTER(invalidate_iotlb_all); |
| 3673 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3674 | return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 3675 | true); |
| 3676 | } |
| 3677 | |
| 3678 | int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid) |
| 3679 | { |
| 3680 | struct protection_domain *domain = dom->priv; |
| 3681 | unsigned long flags; |
| 3682 | int ret; |
| 3683 | |
| 3684 | spin_lock_irqsave(&domain->lock, flags); |
| 3685 | ret = __amd_iommu_flush_tlb(domain, pasid); |
| 3686 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3687 | |
| 3688 | return ret; |
| 3689 | } |
| 3690 | EXPORT_SYMBOL(amd_iommu_flush_tlb); |
| 3691 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3692 | static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc) |
| 3693 | { |
| 3694 | int index; |
| 3695 | u64 *pte; |
| 3696 | |
| 3697 | while (true) { |
| 3698 | |
| 3699 | index = (pasid >> (9 * level)) & 0x1ff; |
| 3700 | pte = &root[index]; |
| 3701 | |
| 3702 | if (level == 0) |
| 3703 | break; |
| 3704 | |
| 3705 | if (!(*pte & GCR3_VALID)) { |
| 3706 | if (!alloc) |
| 3707 | return NULL; |
| 3708 | |
| 3709 | root = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3710 | if (root == NULL) |
| 3711 | return NULL; |
| 3712 | |
| 3713 | *pte = __pa(root) | GCR3_VALID; |
| 3714 | } |
| 3715 | |
| 3716 | root = __va(*pte & PAGE_MASK); |
| 3717 | |
| 3718 | level -= 1; |
| 3719 | } |
| 3720 | |
| 3721 | return pte; |
| 3722 | } |
| 3723 | |
| 3724 | static int __set_gcr3(struct protection_domain *domain, int pasid, |
| 3725 | unsigned long cr3) |
| 3726 | { |
| 3727 | u64 *pte; |
| 3728 | |
| 3729 | if (domain->mode != PAGE_MODE_NONE) |
| 3730 | return -EINVAL; |
| 3731 | |
| 3732 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); |
| 3733 | if (pte == NULL) |
| 3734 | return -ENOMEM; |
| 3735 | |
| 3736 | *pte = (cr3 & PAGE_MASK) | GCR3_VALID; |
| 3737 | |
| 3738 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3739 | } |
| 3740 | |
| 3741 | static int __clear_gcr3(struct protection_domain *domain, int pasid) |
| 3742 | { |
| 3743 | u64 *pte; |
| 3744 | |
| 3745 | if (domain->mode != PAGE_MODE_NONE) |
| 3746 | return -EINVAL; |
| 3747 | |
| 3748 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); |
| 3749 | if (pte == NULL) |
| 3750 | return 0; |
| 3751 | |
| 3752 | *pte = 0; |
| 3753 | |
| 3754 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3755 | } |
| 3756 | |
| 3757 | int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 3758 | unsigned long cr3) |
| 3759 | { |
| 3760 | struct protection_domain *domain = dom->priv; |
| 3761 | unsigned long flags; |
| 3762 | int ret; |
| 3763 | |
| 3764 | spin_lock_irqsave(&domain->lock, flags); |
| 3765 | ret = __set_gcr3(domain, pasid, cr3); |
| 3766 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3767 | |
| 3768 | return ret; |
| 3769 | } |
| 3770 | EXPORT_SYMBOL(amd_iommu_domain_set_gcr3); |
| 3771 | |
| 3772 | int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid) |
| 3773 | { |
| 3774 | struct protection_domain *domain = dom->priv; |
| 3775 | unsigned long flags; |
| 3776 | int ret; |
| 3777 | |
| 3778 | spin_lock_irqsave(&domain->lock, flags); |
| 3779 | ret = __clear_gcr3(domain, pasid); |
| 3780 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3781 | |
| 3782 | return ret; |
| 3783 | } |
| 3784 | EXPORT_SYMBOL(amd_iommu_domain_clear_gcr3); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3785 | |
| 3786 | int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, |
| 3787 | int status, int tag) |
| 3788 | { |
| 3789 | struct iommu_dev_data *dev_data; |
| 3790 | struct amd_iommu *iommu; |
| 3791 | struct iommu_cmd cmd; |
| 3792 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3793 | INC_STATS_COUNTER(complete_ppr); |
| 3794 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3795 | dev_data = get_dev_data(&pdev->dev); |
| 3796 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3797 | |
| 3798 | build_complete_ppr(&cmd, dev_data->devid, pasid, status, |
| 3799 | tag, dev_data->pri_tlp); |
| 3800 | |
| 3801 | return iommu_queue_command(iommu, &cmd); |
| 3802 | } |
| 3803 | EXPORT_SYMBOL(amd_iommu_complete_ppr); |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3804 | |
| 3805 | struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev) |
| 3806 | { |
| 3807 | struct protection_domain *domain; |
| 3808 | |
| 3809 | domain = get_domain(&pdev->dev); |
| 3810 | if (IS_ERR(domain)) |
| 3811 | return NULL; |
| 3812 | |
| 3813 | /* Only return IOMMUv2 domains */ |
| 3814 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3815 | return NULL; |
| 3816 | |
| 3817 | return domain->iommu_domain; |
| 3818 | } |
| 3819 | EXPORT_SYMBOL(amd_iommu_get_v2_domain); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 3820 | |
| 3821 | void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum) |
| 3822 | { |
| 3823 | struct iommu_dev_data *dev_data; |
| 3824 | |
| 3825 | if (!amd_iommu_v2_supported()) |
| 3826 | return; |
| 3827 | |
| 3828 | dev_data = get_dev_data(&pdev->dev); |
| 3829 | dev_data->errata |= (1 << erratum); |
| 3830 | } |
| 3831 | EXPORT_SYMBOL(amd_iommu_enable_device_erratum); |
Joerg Roedel | 52efdb8 | 2011-12-07 12:01:36 +0100 | [diff] [blame] | 3832 | |
| 3833 | int amd_iommu_device_info(struct pci_dev *pdev, |
| 3834 | struct amd_iommu_device_info *info) |
| 3835 | { |
| 3836 | int max_pasids; |
| 3837 | int pos; |
| 3838 | |
| 3839 | if (pdev == NULL || info == NULL) |
| 3840 | return -EINVAL; |
| 3841 | |
| 3842 | if (!amd_iommu_v2_supported()) |
| 3843 | return -EINVAL; |
| 3844 | |
| 3845 | memset(info, 0, sizeof(*info)); |
| 3846 | |
| 3847 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS); |
| 3848 | if (pos) |
| 3849 | info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; |
| 3850 | |
| 3851 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
| 3852 | if (pos) |
| 3853 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP; |
| 3854 | |
| 3855 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
| 3856 | if (pos) { |
| 3857 | int features; |
| 3858 | |
| 3859 | max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1)); |
| 3860 | max_pasids = min(max_pasids, (1 << 20)); |
| 3861 | |
| 3862 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP; |
| 3863 | info->max_pasids = min(pci_max_pasids(pdev), max_pasids); |
| 3864 | |
| 3865 | features = pci_pasid_features(pdev); |
| 3866 | if (features & PCI_PASID_CAP_EXEC) |
| 3867 | info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP; |
| 3868 | if (features & PCI_PASID_CAP_PRIV) |
| 3869 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP; |
| 3870 | } |
| 3871 | |
| 3872 | return 0; |
| 3873 | } |
| 3874 | EXPORT_SYMBOL(amd_iommu_device_info); |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3875 | |
| 3876 | #ifdef CONFIG_IRQ_REMAP |
| 3877 | |
| 3878 | /***************************************************************************** |
| 3879 | * |
| 3880 | * Interrupt Remapping Implementation |
| 3881 | * |
| 3882 | *****************************************************************************/ |
| 3883 | |
| 3884 | union irte { |
| 3885 | u32 val; |
| 3886 | struct { |
| 3887 | u32 valid : 1, |
| 3888 | no_fault : 1, |
| 3889 | int_type : 3, |
| 3890 | rq_eoi : 1, |
| 3891 | dm : 1, |
| 3892 | rsvd_1 : 1, |
| 3893 | destination : 8, |
| 3894 | vector : 8, |
| 3895 | rsvd_2 : 8; |
| 3896 | } fields; |
| 3897 | }; |
| 3898 | |
| 3899 | #define DTE_IRQ_PHYS_ADDR_MASK (((1ULL << 45)-1) << 6) |
| 3900 | #define DTE_IRQ_REMAP_INTCTL (2ULL << 60) |
| 3901 | #define DTE_IRQ_TABLE_LEN (8ULL << 1) |
| 3902 | #define DTE_IRQ_REMAP_ENABLE 1ULL |
| 3903 | |
| 3904 | static void set_dte_irq_entry(u16 devid, struct irq_remap_table *table) |
| 3905 | { |
| 3906 | u64 dte; |
| 3907 | |
| 3908 | dte = amd_iommu_dev_table[devid].data[2]; |
| 3909 | dte &= ~DTE_IRQ_PHYS_ADDR_MASK; |
| 3910 | dte |= virt_to_phys(table->table); |
| 3911 | dte |= DTE_IRQ_REMAP_INTCTL; |
| 3912 | dte |= DTE_IRQ_TABLE_LEN; |
| 3913 | dte |= DTE_IRQ_REMAP_ENABLE; |
| 3914 | |
| 3915 | amd_iommu_dev_table[devid].data[2] = dte; |
| 3916 | } |
| 3917 | |
| 3918 | #define IRTE_ALLOCATED (~1U) |
| 3919 | |
| 3920 | static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic) |
| 3921 | { |
| 3922 | struct irq_remap_table *table = NULL; |
| 3923 | struct amd_iommu *iommu; |
| 3924 | unsigned long flags; |
| 3925 | u16 alias; |
| 3926 | |
| 3927 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 3928 | |
| 3929 | iommu = amd_iommu_rlookup_table[devid]; |
| 3930 | if (!iommu) |
| 3931 | goto out_unlock; |
| 3932 | |
| 3933 | table = irq_lookup_table[devid]; |
| 3934 | if (table) |
| 3935 | goto out; |
| 3936 | |
| 3937 | alias = amd_iommu_alias_table[devid]; |
| 3938 | table = irq_lookup_table[alias]; |
| 3939 | if (table) { |
| 3940 | irq_lookup_table[devid] = table; |
| 3941 | set_dte_irq_entry(devid, table); |
| 3942 | iommu_flush_dte(iommu, devid); |
| 3943 | goto out; |
| 3944 | } |
| 3945 | |
| 3946 | /* Nothing there yet, allocate new irq remapping table */ |
| 3947 | table = kzalloc(sizeof(*table), GFP_ATOMIC); |
| 3948 | if (!table) |
| 3949 | goto out; |
| 3950 | |
Joerg Roedel | 197887f | 2013-04-09 21:14:08 +0200 | [diff] [blame] | 3951 | /* Initialize table spin-lock */ |
| 3952 | spin_lock_init(&table->lock); |
| 3953 | |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3954 | if (ioapic) |
| 3955 | /* Keep the first 32 indexes free for IOAPIC interrupts */ |
| 3956 | table->min_index = 32; |
| 3957 | |
| 3958 | table->table = kmem_cache_alloc(amd_iommu_irq_cache, GFP_ATOMIC); |
| 3959 | if (!table->table) { |
| 3960 | kfree(table); |
Dan Carpenter | 821f0f6 | 2012-10-02 11:34:40 +0300 | [diff] [blame] | 3961 | table = NULL; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 3962 | goto out; |
| 3963 | } |
| 3964 | |
| 3965 | memset(table->table, 0, MAX_IRQS_PER_TABLE * sizeof(u32)); |
| 3966 | |
| 3967 | if (ioapic) { |
| 3968 | int i; |
| 3969 | |
| 3970 | for (i = 0; i < 32; ++i) |
| 3971 | table->table[i] = IRTE_ALLOCATED; |
| 3972 | } |
| 3973 | |
| 3974 | irq_lookup_table[devid] = table; |
| 3975 | set_dte_irq_entry(devid, table); |
| 3976 | iommu_flush_dte(iommu, devid); |
| 3977 | if (devid != alias) { |
| 3978 | irq_lookup_table[alias] = table; |
| 3979 | set_dte_irq_entry(devid, table); |
| 3980 | iommu_flush_dte(iommu, alias); |
| 3981 | } |
| 3982 | |
| 3983 | out: |
| 3984 | iommu_completion_wait(iommu); |
| 3985 | |
| 3986 | out_unlock: |
| 3987 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 3988 | |
| 3989 | return table; |
| 3990 | } |
| 3991 | |
| 3992 | static int alloc_irq_index(struct irq_cfg *cfg, u16 devid, int count) |
| 3993 | { |
| 3994 | struct irq_remap_table *table; |
| 3995 | unsigned long flags; |
| 3996 | int index, c; |
| 3997 | |
| 3998 | table = get_irq_table(devid, false); |
| 3999 | if (!table) |
| 4000 | return -ENODEV; |
| 4001 | |
| 4002 | spin_lock_irqsave(&table->lock, flags); |
| 4003 | |
| 4004 | /* Scan table for free entries */ |
| 4005 | for (c = 0, index = table->min_index; |
| 4006 | index < MAX_IRQS_PER_TABLE; |
| 4007 | ++index) { |
| 4008 | if (table->table[index] == 0) |
| 4009 | c += 1; |
| 4010 | else |
| 4011 | c = 0; |
| 4012 | |
| 4013 | if (c == count) { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4014 | struct irq_2_irte *irte_info; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 4015 | |
| 4016 | for (; c != 0; --c) |
| 4017 | table->table[index - c + 1] = IRTE_ALLOCATED; |
| 4018 | |
| 4019 | index -= count - 1; |
| 4020 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4021 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4022 | irte_info = &cfg->irq_2_irte; |
| 4023 | irte_info->devid = devid; |
| 4024 | irte_info->index = index; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 4025 | |
| 4026 | goto out; |
| 4027 | } |
| 4028 | } |
| 4029 | |
| 4030 | index = -ENOSPC; |
| 4031 | |
| 4032 | out: |
| 4033 | spin_unlock_irqrestore(&table->lock, flags); |
| 4034 | |
| 4035 | return index; |
| 4036 | } |
| 4037 | |
| 4038 | static int get_irte(u16 devid, int index, union irte *irte) |
| 4039 | { |
| 4040 | struct irq_remap_table *table; |
| 4041 | unsigned long flags; |
| 4042 | |
| 4043 | table = get_irq_table(devid, false); |
| 4044 | if (!table) |
| 4045 | return -ENOMEM; |
| 4046 | |
| 4047 | spin_lock_irqsave(&table->lock, flags); |
| 4048 | irte->val = table->table[index]; |
| 4049 | spin_unlock_irqrestore(&table->lock, flags); |
| 4050 | |
| 4051 | return 0; |
| 4052 | } |
| 4053 | |
| 4054 | static int modify_irte(u16 devid, int index, union irte irte) |
| 4055 | { |
| 4056 | struct irq_remap_table *table; |
| 4057 | struct amd_iommu *iommu; |
| 4058 | unsigned long flags; |
| 4059 | |
| 4060 | iommu = amd_iommu_rlookup_table[devid]; |
| 4061 | if (iommu == NULL) |
| 4062 | return -EINVAL; |
| 4063 | |
| 4064 | table = get_irq_table(devid, false); |
| 4065 | if (!table) |
| 4066 | return -ENOMEM; |
| 4067 | |
| 4068 | spin_lock_irqsave(&table->lock, flags); |
| 4069 | table->table[index] = irte.val; |
| 4070 | spin_unlock_irqrestore(&table->lock, flags); |
| 4071 | |
| 4072 | iommu_flush_irt(iommu, devid); |
| 4073 | iommu_completion_wait(iommu); |
| 4074 | |
| 4075 | return 0; |
| 4076 | } |
| 4077 | |
| 4078 | static void free_irte(u16 devid, int index) |
| 4079 | { |
| 4080 | struct irq_remap_table *table; |
| 4081 | struct amd_iommu *iommu; |
| 4082 | unsigned long flags; |
| 4083 | |
| 4084 | iommu = amd_iommu_rlookup_table[devid]; |
| 4085 | if (iommu == NULL) |
| 4086 | return; |
| 4087 | |
| 4088 | table = get_irq_table(devid, false); |
| 4089 | if (!table) |
| 4090 | return; |
| 4091 | |
| 4092 | spin_lock_irqsave(&table->lock, flags); |
| 4093 | table->table[index] = 0; |
| 4094 | spin_unlock_irqrestore(&table->lock, flags); |
| 4095 | |
| 4096 | iommu_flush_irt(iommu, devid); |
| 4097 | iommu_completion_wait(iommu); |
| 4098 | } |
| 4099 | |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4100 | static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry, |
| 4101 | unsigned int destination, int vector, |
| 4102 | struct io_apic_irq_attr *attr) |
| 4103 | { |
| 4104 | struct irq_remap_table *table; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4105 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4106 | struct irq_cfg *cfg; |
| 4107 | union irte irte; |
| 4108 | int ioapic_id; |
| 4109 | int index; |
| 4110 | int devid; |
| 4111 | int ret; |
| 4112 | |
| 4113 | cfg = irq_get_chip_data(irq); |
| 4114 | if (!cfg) |
| 4115 | return -EINVAL; |
| 4116 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4117 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4118 | ioapic_id = mpc_ioapic_id(attr->ioapic); |
| 4119 | devid = get_ioapic_devid(ioapic_id); |
| 4120 | |
| 4121 | if (devid < 0) |
| 4122 | return devid; |
| 4123 | |
| 4124 | table = get_irq_table(devid, true); |
| 4125 | if (table == NULL) |
| 4126 | return -ENOMEM; |
| 4127 | |
| 4128 | index = attr->ioapic_pin; |
| 4129 | |
| 4130 | /* Setup IRQ remapping info */ |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4131 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4132 | irte_info->devid = devid; |
| 4133 | irte_info->index = index; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4134 | |
| 4135 | /* Setup IRTE for IOMMU */ |
| 4136 | irte.val = 0; |
| 4137 | irte.fields.vector = vector; |
| 4138 | irte.fields.int_type = apic->irq_delivery_mode; |
| 4139 | irte.fields.destination = destination; |
| 4140 | irte.fields.dm = apic->irq_dest_mode; |
| 4141 | irte.fields.valid = 1; |
| 4142 | |
| 4143 | ret = modify_irte(devid, index, irte); |
| 4144 | if (ret) |
| 4145 | return ret; |
| 4146 | |
| 4147 | /* Setup IOAPIC entry */ |
| 4148 | memset(entry, 0, sizeof(*entry)); |
| 4149 | |
| 4150 | entry->vector = index; |
| 4151 | entry->mask = 0; |
| 4152 | entry->trigger = attr->trigger; |
| 4153 | entry->polarity = attr->polarity; |
| 4154 | |
| 4155 | /* |
| 4156 | * Mask level triggered irqs. |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4157 | */ |
| 4158 | if (attr->trigger) |
| 4159 | entry->mask = 1; |
| 4160 | |
| 4161 | return 0; |
| 4162 | } |
| 4163 | |
| 4164 | static int set_affinity(struct irq_data *data, const struct cpumask *mask, |
| 4165 | bool force) |
| 4166 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4167 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4168 | unsigned int dest, irq; |
| 4169 | struct irq_cfg *cfg; |
| 4170 | union irte irte; |
| 4171 | int err; |
| 4172 | |
| 4173 | if (!config_enabled(CONFIG_SMP)) |
| 4174 | return -1; |
| 4175 | |
| 4176 | cfg = data->chip_data; |
| 4177 | irq = data->irq; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4178 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4179 | |
| 4180 | if (!cpumask_intersects(mask, cpu_online_mask)) |
| 4181 | return -EINVAL; |
| 4182 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4183 | if (get_irte(irte_info->devid, irte_info->index, &irte)) |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4184 | return -EBUSY; |
| 4185 | |
| 4186 | if (assign_irq_vector(irq, cfg, mask)) |
| 4187 | return -EBUSY; |
| 4188 | |
| 4189 | err = apic->cpu_mask_to_apicid_and(cfg->domain, mask, &dest); |
| 4190 | if (err) { |
| 4191 | if (assign_irq_vector(irq, cfg, data->affinity)) |
| 4192 | pr_err("AMD-Vi: Failed to recover vector for irq %d\n", irq); |
| 4193 | return err; |
| 4194 | } |
| 4195 | |
| 4196 | irte.fields.vector = cfg->vector; |
| 4197 | irte.fields.destination = dest; |
| 4198 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4199 | modify_irte(irte_info->devid, irte_info->index, irte); |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4200 | |
| 4201 | if (cfg->move_in_progress) |
| 4202 | send_cleanup_vector(cfg); |
| 4203 | |
| 4204 | cpumask_copy(data->affinity, mask); |
| 4205 | |
| 4206 | return 0; |
| 4207 | } |
| 4208 | |
| 4209 | static int free_irq(int irq) |
| 4210 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4211 | struct irq_2_irte *irte_info; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4212 | struct irq_cfg *cfg; |
| 4213 | |
| 4214 | cfg = irq_get_chip_data(irq); |
| 4215 | if (!cfg) |
| 4216 | return -EINVAL; |
| 4217 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4218 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4219 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4220 | free_irte(irte_info->devid, irte_info->index); |
Joerg Roedel | 5527de7 | 2012-06-26 11:17:32 +0200 | [diff] [blame] | 4221 | |
| 4222 | return 0; |
| 4223 | } |
| 4224 | |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4225 | static void compose_msi_msg(struct pci_dev *pdev, |
| 4226 | unsigned int irq, unsigned int dest, |
| 4227 | struct msi_msg *msg, u8 hpet_id) |
| 4228 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4229 | struct irq_2_irte *irte_info; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4230 | struct irq_cfg *cfg; |
| 4231 | union irte irte; |
| 4232 | |
| 4233 | cfg = irq_get_chip_data(irq); |
| 4234 | if (!cfg) |
| 4235 | return; |
| 4236 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4237 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4238 | |
| 4239 | irte.val = 0; |
| 4240 | irte.fields.vector = cfg->vector; |
| 4241 | irte.fields.int_type = apic->irq_delivery_mode; |
| 4242 | irte.fields.destination = dest; |
| 4243 | irte.fields.dm = apic->irq_dest_mode; |
| 4244 | irte.fields.valid = 1; |
| 4245 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4246 | modify_irte(irte_info->devid, irte_info->index, irte); |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4247 | |
| 4248 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 4249 | msg->address_lo = MSI_ADDR_BASE_LO; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4250 | msg->data = irte_info->index; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4251 | } |
| 4252 | |
| 4253 | static int msi_alloc_irq(struct pci_dev *pdev, int irq, int nvec) |
| 4254 | { |
| 4255 | struct irq_cfg *cfg; |
| 4256 | int index; |
| 4257 | u16 devid; |
| 4258 | |
| 4259 | if (!pdev) |
| 4260 | return -EINVAL; |
| 4261 | |
| 4262 | cfg = irq_get_chip_data(irq); |
| 4263 | if (!cfg) |
| 4264 | return -EINVAL; |
| 4265 | |
| 4266 | devid = get_device_id(&pdev->dev); |
| 4267 | index = alloc_irq_index(cfg, devid, nvec); |
| 4268 | |
| 4269 | return index < 0 ? MAX_IRQS_PER_TABLE : index; |
| 4270 | } |
| 4271 | |
| 4272 | static int msi_setup_irq(struct pci_dev *pdev, unsigned int irq, |
| 4273 | int index, int offset) |
| 4274 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4275 | struct irq_2_irte *irte_info; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4276 | struct irq_cfg *cfg; |
| 4277 | u16 devid; |
| 4278 | |
| 4279 | if (!pdev) |
| 4280 | return -EINVAL; |
| 4281 | |
| 4282 | cfg = irq_get_chip_data(irq); |
| 4283 | if (!cfg) |
| 4284 | return -EINVAL; |
| 4285 | |
| 4286 | if (index >= MAX_IRQS_PER_TABLE) |
| 4287 | return 0; |
| 4288 | |
| 4289 | devid = get_device_id(&pdev->dev); |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4290 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4291 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4292 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4293 | irte_info->devid = devid; |
| 4294 | irte_info->index = index + offset; |
Joerg Roedel | 0b4d48c | 2012-06-26 14:54:17 +0200 | [diff] [blame] | 4295 | |
| 4296 | return 0; |
| 4297 | } |
| 4298 | |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4299 | static int setup_hpet_msi(unsigned int irq, unsigned int id) |
| 4300 | { |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4301 | struct irq_2_irte *irte_info; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4302 | struct irq_cfg *cfg; |
| 4303 | int index, devid; |
| 4304 | |
| 4305 | cfg = irq_get_chip_data(irq); |
| 4306 | if (!cfg) |
| 4307 | return -EINVAL; |
| 4308 | |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4309 | irte_info = &cfg->irq_2_irte; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4310 | devid = get_hpet_devid(id); |
| 4311 | if (devid < 0) |
| 4312 | return devid; |
| 4313 | |
| 4314 | index = alloc_irq_index(cfg, devid, 1); |
| 4315 | if (index < 0) |
| 4316 | return index; |
| 4317 | |
Joerg Roedel | 9b1b0e4 | 2012-09-26 12:44:45 +0200 | [diff] [blame] | 4318 | cfg->remapped = 1; |
Joerg Roedel | 0dfedd6 | 2013-04-09 15:39:16 +0200 | [diff] [blame] | 4319 | irte_info->devid = devid; |
| 4320 | irte_info->index = index; |
Joerg Roedel | d976195 | 2012-06-26 16:00:08 +0200 | [diff] [blame] | 4321 | |
| 4322 | return 0; |
| 4323 | } |
| 4324 | |
Joerg Roedel | 6b474b8 | 2012-06-26 16:46:04 +0200 | [diff] [blame] | 4325 | struct irq_remap_ops amd_iommu_irq_ops = { |
| 4326 | .supported = amd_iommu_supported, |
| 4327 | .prepare = amd_iommu_prepare, |
| 4328 | .enable = amd_iommu_enable, |
| 4329 | .disable = amd_iommu_disable, |
| 4330 | .reenable = amd_iommu_reenable, |
| 4331 | .enable_faulting = amd_iommu_enable_faulting, |
| 4332 | .setup_ioapic_entry = setup_ioapic_entry, |
| 4333 | .set_affinity = set_affinity, |
| 4334 | .free_irq = free_irq, |
| 4335 | .compose_msi_msg = compose_msi_msg, |
| 4336 | .msi_alloc_irq = msi_alloc_irq, |
| 4337 | .msi_setup_irq = msi_setup_irq, |
| 4338 | .setup_hpet_msi = setup_hpet_msi, |
| 4339 | }; |
Joerg Roedel | 2b32450 | 2012-06-21 16:29:10 +0200 | [diff] [blame] | 4340 | #endif |