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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mm/flush.c
3 *
4 * Copyright (C) 1995-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/mm.h>
12#include <linux/pagemap.h>
13
14#include <asm/cacheflush.h>
Russell King46097c72008-08-10 18:10:19 +010015#include <asm/cachetype.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <asm/system.h>
Russell King8d802d22005-05-10 17:31:43 +010017#include <asm/tlbflush.h>
18
Russell King1b2e2b72006-08-21 17:06:38 +010019#include "mm.h"
20
Russell King8d802d22005-05-10 17:31:43 +010021#ifdef CONFIG_CPU_CACHE_VIPT
Russell Kingd7b6b352005-09-08 15:32:23 +010022
Catalin Marinas481467d2005-09-30 16:07:04 +010023#define ALIAS_FLUSH_START 0xffff4000
24
Catalin Marinas481467d2005-09-30 16:07:04 +010025static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
26{
27 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
Catalin Marinas141fa402006-03-10 22:26:47 +000028 const int zero = 0;
Catalin Marinas481467d2005-09-30 16:07:04 +010029
Russell Kingad1ae2f2006-12-13 14:34:43 +000030 set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
Catalin Marinas481467d2005-09-30 16:07:04 +010031 flush_tlb_kernel_page(to);
32
33 asm( "mcrr p15, 0, %1, %0, c14\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010034 " mcr p15, 0, %2, c7, c10, 4"
Catalin Marinas481467d2005-09-30 16:07:04 +010035 :
Catalin Marinas141fa402006-03-10 22:26:47 +000036 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
Catalin Marinas481467d2005-09-30 16:07:04 +010037 : "cc");
38}
39
Russell Kingd7b6b352005-09-08 15:32:23 +010040void flush_cache_mm(struct mm_struct *mm)
41{
42 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000043 vivt_flush_cache_mm(mm);
Russell Kingd7b6b352005-09-08 15:32:23 +010044 return;
45 }
46
47 if (cache_is_vipt_aliasing()) {
48 asm( "mcr p15, 0, %0, c7, c14, 0\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010049 " mcr p15, 0, %0, c7, c10, 4"
Russell Kingd7b6b352005-09-08 15:32:23 +010050 :
51 : "r" (0)
52 : "cc");
Russell Kingdf71dfd2009-10-24 22:36:36 +010053 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010054 }
55}
56
57void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
58{
59 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000060 vivt_flush_cache_range(vma, start, end);
Russell Kingd7b6b352005-09-08 15:32:23 +010061 return;
62 }
63
64 if (cache_is_vipt_aliasing()) {
65 asm( "mcr p15, 0, %0, c7, c14, 0\n"
Russell Kingdf71dfd2009-10-24 22:36:36 +010066 " mcr p15, 0, %0, c7, c10, 4"
Russell Kingd7b6b352005-09-08 15:32:23 +010067 :
68 : "r" (0)
69 : "cc");
Russell Kingdf71dfd2009-10-24 22:36:36 +010070 __flush_icache_all();
Russell Kingd7b6b352005-09-08 15:32:23 +010071 }
72}
73
74void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
75{
76 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000077 vivt_flush_cache_page(vma, user_addr, pfn);
Russell Kingd7b6b352005-09-08 15:32:23 +010078 return;
79 }
80
Russell King2df341e2009-10-24 22:58:40 +010081 if (cache_is_vipt_aliasing()) {
Russell Kingd7b6b352005-09-08 15:32:23 +010082 flush_pfn_alias(pfn, user_addr);
Russell King2df341e2009-10-24 22:58:40 +010083 __flush_icache_all();
84 }
Russell Kingd7b6b352005-09-08 15:32:23 +010085}
George G. Davisa188ad22006-09-02 18:43:20 +010086
87void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
88 unsigned long uaddr, void *kaddr,
89 unsigned long len, int write)
90{
91 if (cache_is_vivt()) {
Russell King2f0b1922009-10-25 10:40:02 +000092 vivt_flush_ptrace_access(vma, page, uaddr, kaddr, len, write);
George G. Davisa188ad22006-09-02 18:43:20 +010093 return;
94 }
95
96 if (cache_is_vipt_aliasing()) {
97 flush_pfn_alias(page_to_pfn(page), uaddr);
Russell King2df341e2009-10-24 22:58:40 +010098 __flush_icache_all();
George G. Davisa188ad22006-09-02 18:43:20 +010099 return;
100 }
101
102 /* VIPT non-aliasing cache */
Rusty Russell56f8ba82009-09-24 09:34:49 -0600103 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)) &&
George G. Davisa71ebdf2006-09-21 03:57:04 +0100104 vma->vm_flags & VM_EXEC) {
George G. Davisa188ad22006-09-02 18:43:20 +0100105 unsigned long addr = (unsigned long)kaddr;
106 /* only flushing the kernel mapping on non-aliasing VIPT */
107 __cpuc_coherent_kern_range(addr, addr + len);
108 }
109}
Russell King8d802d22005-05-10 17:31:43 +0100110#else
111#define flush_pfn_alias(pfn,vaddr) do { } while (0)
112#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
Russell King8830f042005-06-20 09:51:03 +0100114void __flush_dcache_page(struct address_space *mapping, struct page *page)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115{
Russell Kingb7dc0b22009-10-25 11:25:50 +0000116 void *addr = page_address(page);
117
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 /*
119 * Writeback any data associated with the kernel mapping of this
120 * page. This ensures that data in the physical page is mutually
121 * coherent with the kernels mapping.
122 */
Nicolas Pitre13f96d82009-09-01 22:01:27 +0100123#ifdef CONFIG_HIGHMEM
124 /*
125 * kmap_atomic() doesn't set the page virtual address, and
126 * kunmap_atomic() takes care of cache flushing already.
127 */
Russell Kingb7dc0b22009-10-25 11:25:50 +0000128 if (addr)
Nicolas Pitre13f96d82009-09-01 22:01:27 +0100129#endif
Russell Kingb7dc0b22009-10-25 11:25:50 +0000130 __cpuc_flush_dcache_page(addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
132 /*
Russell King8830f042005-06-20 09:51:03 +0100133 * If this is a page cache page, and we have an aliasing VIPT cache,
134 * we only need to do one flush - which would be at the relevant
Russell King8d802d22005-05-10 17:31:43 +0100135 * userspace colour, which is congruent with page->index.
136 */
Russell King2df341e2009-10-24 22:58:40 +0100137 if (mapping && cache_is_vipt_aliasing()) {
Russell King8830f042005-06-20 09:51:03 +0100138 flush_pfn_alias(page_to_pfn(page),
139 page->index << PAGE_CACHE_SHIFT);
Russell King2df341e2009-10-24 22:58:40 +0100140 __flush_icache_all();
141 }
Russell King8830f042005-06-20 09:51:03 +0100142}
143
144static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
145{
146 struct mm_struct *mm = current->active_mm;
147 struct vm_area_struct *mpnt;
148 struct prio_tree_iter iter;
149 pgoff_t pgoff;
Russell King8d802d22005-05-10 17:31:43 +0100150
151 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 * There are possible user space mappings of this page:
153 * - VIVT cache: we need to also write back and invalidate all user
154 * data in the current VM view associated with this page.
155 * - aliasing VIPT: we only need to find one mapping of this page.
156 */
157 pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
158
159 flush_dcache_mmap_lock(mapping);
160 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
161 unsigned long offset;
162
163 /*
164 * If this VMA is not in our MM, we can ignore it.
165 */
166 if (mpnt->vm_mm != mm)
167 continue;
168 if (!(mpnt->vm_flags & VM_MAYSHARE))
169 continue;
170 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
171 flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 }
173 flush_dcache_mmap_unlock(mapping);
174}
175
176/*
177 * Ensure cache coherency between kernel mapping and userspace mapping
178 * of this page.
179 *
180 * We have three cases to consider:
181 * - VIPT non-aliasing cache: fully coherent so nothing required.
182 * - VIVT: fully aliasing, so we need to handle every alias in our
183 * current VM view.
184 * - VIPT aliasing: need to handle one alias in our current VM view.
185 *
186 * If we need to handle aliasing:
187 * If the page only exists in the page cache and there are no user
188 * space mappings, we can be lazy and remember that we may have dirty
189 * kernel cache lines for later. Otherwise, we assume we have
190 * aliasing mappings.
Russell Kingdf2f5e72005-11-30 16:02:54 +0000191 *
192 * Note that we disable the lazy flush for SMP.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 */
194void flush_dcache_page(struct page *page)
195{
Russell King421fe932009-10-25 10:23:04 +0000196 struct address_space *mapping;
197
198 /*
199 * The zero page is never written to, so never has any dirty
200 * cache lines, and therefore never needs to be flushed.
201 */
202 if (page == ZERO_PAGE(0))
203 return;
204
205 mapping = page_mapping(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
Russell Kingdf2f5e72005-11-30 16:02:54 +0000207#ifndef CONFIG_SMP
Nicolas Pitred73cd422008-09-15 16:44:55 -0400208 if (!PageHighMem(page) && mapping && !mapping_mapped(mapping))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 set_bit(PG_dcache_dirty, &page->flags);
Russell Kingdf2f5e72005-11-30 16:02:54 +0000210 else
211#endif
212 {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 __flush_dcache_page(mapping, page);
Russell King8830f042005-06-20 09:51:03 +0100214 if (mapping && cache_is_vivt())
215 __flush_dcache_aliases(mapping, page);
Catalin Marinas826cbda2008-06-13 10:28:36 +0100216 else if (mapping)
217 __flush_icache_all();
Russell King8830f042005-06-20 09:51:03 +0100218 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219}
220EXPORT_SYMBOL(flush_dcache_page);
Russell King6020dff2006-12-30 23:17:40 +0000221
222/*
223 * Flush an anonymous page so that users of get_user_pages()
224 * can safely access the data. The expected sequence is:
225 *
226 * get_user_pages()
227 * -> flush_anon_page
228 * memcpy() to/from page
229 * if written to page, flush_dcache_page()
230 */
231void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
232{
233 unsigned long pfn;
234
235 /* VIPT non-aliasing caches need do nothing */
236 if (cache_is_vipt_nonaliasing())
237 return;
238
239 /*
240 * Write back and invalidate userspace mapping.
241 */
242 pfn = page_to_pfn(page);
243 if (cache_is_vivt()) {
244 flush_cache_page(vma, vmaddr, pfn);
245 } else {
246 /*
247 * For aliasing VIPT, we can flush an alias of the
248 * userspace address only.
249 */
250 flush_pfn_alias(pfn, vmaddr);
Russell King2df341e2009-10-24 22:58:40 +0100251 __flush_icache_all();
Russell King6020dff2006-12-30 23:17:40 +0000252 }
253
254 /*
255 * Invalidate kernel mapping. No data should be contained
256 * in this mapping of the page. FIXME: this is overkill
257 * since we actually ask for a write-back and invalidate.
258 */
259 __cpuc_flush_dcache_page(page_address(page));
260}