ixgbe: Merge FCoE set_num and cache_ring calls into RSS/DCB config
This change merges the ixgbe_cache_ring_fcoe and ixgbe_set_fcoe_queues
logic into the DCB and RSS initialization calls.
Cc: John Fastabend <john.r.fastabend@intel.com>
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 3d7ce7e..ee230f5 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -3610,16 +3610,17 @@
if (hw->mac.type != ixgbe_mac_82598EB) {
int i;
u32 reg = 0;
+ u8 msb = 0;
+ u8 rss_i = adapter->netdev->tc_to_txq[0].count - 1;
- for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
- u8 msb = 0;
- u8 cnt = adapter->netdev->tc_to_txq[i].count;
-
- while (cnt >>= 1)
- msb++;
-
- reg |= msb << IXGBE_RQTC_SHIFT_TC(i);
+ while (rss_i) {
+ msb++;
+ rss_i >>= 1;
}
+
+ for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
+ reg |= msb << IXGBE_RQTC_SHIFT_TC(i);
+
IXGBE_WRITE_REG(hw, IXGBE_RQTC, reg);
}
}
@@ -7027,7 +7028,11 @@
#endif
if (ii->mac == ixgbe_mac_82598EB)
+#ifdef CONFIG_IXGBE_DCB
+ indices = min_t(unsigned int, indices, MAX_TRAFFIC_CLASS * 4);
+#else
indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
+#endif
else
indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);