drm/i915: Ensure that if we ever try to pin+fence it is mappable.
When merging Daniel's full-gtt patches I had a set of tweaks which I
thought I had undone. I was half right...
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31286
Reported-by: jinjin.wang@intel.com
Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5bd8603..12dae00 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4151,6 +4151,7 @@
int ret;
BUG_ON(obj_priv->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT);
+ BUG_ON(need_fence && !mappable);
WARN_ON(i915_verify_lists(dev));
if (obj_priv->gtt_space != NULL) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 33c178c..a33d9a2c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1462,7 +1462,8 @@
}
ret = i915_gem_object_pin(obj, alignment,
- !pipelined, obj_priv->tiling_mode);
+ !pipelined || obj_priv->tiling_mode,
+ obj_priv->tiling_mode);
if (ret)
return ret;