drm/exynos: replace dummy hdmiphy clock with pmu register control

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index db259a3..16f044d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -34,6 +34,7 @@
 #include <linux/regulator/consumer.h>
 #include <linux/io.h>
 #include <linux/of_gpio.h>
+#include <linux/of_address.h>
 
 #include <drm/exynos_drm.h>
 
@@ -189,6 +190,7 @@
 	struct mutex			hdmi_mutex;
 
 	void __iomem			*regs;
+	void __iomem			*pmu_regs;
 	void				*parent_ctx;
 	int				irq;
 
@@ -404,6 +406,14 @@
 	writel(value, hdata->regs + reg_id);
 }
 
+static inline void hdmi_pmu_reg_writemask(struct hdmi_context *hdata,
+				 u32 reg_id, u32 value, u32 mask)
+{
+	u32 old = readl(hdata->pmu_regs + reg_id);
+	value = (value & mask) | (old & ~mask);
+	writel(value, hdata->pmu_regs + reg_id);
+}
+
 static void hdmi_v13_regs_dump(struct hdmi_context *hdata, char *prefix)
 {
 #define DUMPREG(reg_id) \
@@ -1703,7 +1713,9 @@
 	if (regulator_bulk_enable(res->regul_count, res->regul_bulk))
 		DRM_DEBUG_KMS("failed to enable regulator bulk\n");
 
-	clk_prepare_enable(res->hdmiphy);
+	hdmi_pmu_reg_writemask(hdata, PMU_HDMI_PHY_CONTROL_REG,
+		PMU_HDMI_PHY_ENABLE, PMU_HDMI_PHY_CONTROL_MASK);
+
 	clk_prepare_enable(res->hdmi);
 	clk_prepare_enable(res->sclk_hdmi);
 
@@ -1730,7 +1742,10 @@
 
 	clk_disable_unprepare(res->sclk_hdmi);
 	clk_disable_unprepare(res->hdmi);
-	clk_disable_unprepare(res->hdmiphy);
+
+	hdmi_pmu_reg_writemask(hdata, PMU_HDMI_PHY_CONTROL_REG,
+		PMU_HDMI_PHY_DISABLE, PMU_HDMI_PHY_CONTROL_MASK);
+
 	regulator_bulk_disable(res->regul_count, res->regul_bulk);
 
 	mutex_lock(&hdata->hdmi_mutex);
@@ -1829,11 +1844,6 @@
 		DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n");
 		goto fail;
 	}
-	res->hdmiphy = devm_clk_get(dev, "hdmiphy");
-	if (IS_ERR(res->hdmiphy)) {
-		DRM_ERROR("failed to get clock 'hdmiphy'\n");
-		goto fail;
-	}
 	res->mout_hdmi = devm_clk_get(dev, "mout_hdmi");
 	if (IS_ERR(res->mout_hdmi)) {
 		DRM_ERROR("failed to get clock 'mout_hdmi'\n");
@@ -2020,6 +2030,12 @@
 	if (IS_ERR(hdata->regs))
 		return PTR_ERR(hdata->regs);
 
+	hdata->pmu_regs = of_iomap(dev->of_node, 1);
+	if (!hdata->pmu_regs) {
+		DRM_ERROR("failed to find PMU registers\n");
+		return -ENOENT;
+	}
+
 	ret = devm_gpio_request(dev, hdata->hpd_gpio, "HPD");
 	if (ret) {
 		DRM_ERROR("failed to request HPD gpio\n");
diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h
index ef1b3eb..afb3f53 100644
--- a/drivers/gpu/drm/exynos/regs-hdmi.h
+++ b/drivers/gpu/drm/exynos/regs-hdmi.h
@@ -578,4 +578,10 @@
 #define HDMI_TG_VACT_ST4_H		HDMI_TG_BASE(0x0074)
 #define HDMI_TG_3D			HDMI_TG_BASE(0x00F0)
 
+#define PMU_HDMI_PHY_CONTROL_REG	0x0
+
+#define PMU_HDMI_PHY_CONTROL_MASK	(1 << 0)
+#define PMU_HDMI_PHY_ENABLE		(1)
+#define PMU_HDMI_PHY_DISABLE		(0)
+
 #endif /* SAMSUNG_REGS_HDMI_H */