commit | 6155aface4a5048b6398fe2b5bc33687db9fb26b | [log] [tgz] |
---|---|---|
author | Shawn Guo <shawn.guo@linaro.org> | Fri Dec 30 17:26:40 2011 +0800 |
committer | Eric Miao <eric.miao@linaro.org> | Fri Jan 06 12:11:38 2012 +0800 |
tree | f2507b6464f3a389207e7451eb8e7090192ddf1c | |
parent | 1c7bb81885f56666a4eaf934989c6607120add30 [diff] |
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation The recent suspend/resume and reset testing on imx6q discovers that not only D-Cache but also I-Cache has random data and validity when the core comes out of a power recycle. This patch adds I-Cache invalidation into v7_invalidate_l1 to make sure both D-Cache and I-Cache invalidated on power-up. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Eric Miao <eric.miao@linaro.org>