Patch by Thomas Viehweger, 14 May 2004:
- flash.h: more flash types added
- immap_8260.h: some bits added (useful for RMII)
- cmd_coninfo.c: typo corrected, printf -> puts
- reduced size by replacing spaces with tab
diff --git a/include/asm-ppc/immap_8260.h b/include/asm-ppc/immap_8260.h
index 1d50ce0..4974ae5 100644
--- a/include/asm-ppc/immap_8260.h
+++ b/include/asm-ppc/immap_8260.h
@@ -385,6 +385,33 @@
u_char fcc_ftirr_phy[4];
} fcc_t;
+/* Fast controllers continued
+ */
+typedef struct fcc_c {
+ uint fcc_firper;
+ uint fcc_firer;
+ uint fcc_firsr_hi;
+ uint fcc_firsr_lo;
+ u_char fcc_gfemr;
+ char res1[15];
+} fcc_c_t;
+
+/* TC Layer
+ */
+typedef struct tclayer {
+ ushort tc_tcmode;
+ ushort tc_cdsmr;
+ ushort tc_tcer;
+ ushort tc_rcc;
+ ushort tc_tcmr;
+ ushort tc_fcc;
+ ushort tc_ccc;
+ ushort tc_icc;
+ ushort tc_tcc;
+ ushort tc_ecc;
+ char res1[12];
+} tclayer_t;
+
/* I2C
*/
typedef struct i2c {
@@ -519,11 +546,17 @@
fcc_t im_fcc[3]; /* Three FCCs */
- char res4[159];
+ char res4[32];
+ fcc_c_t im_fcc_c[3]; /* Continued FCCs */
+ char res4a[32];
+
+ tclayer_t im_tclayer[8]; /* Eight TCLayers */
+ ushort tc_tcgsr;
+ ushort tc_tcger;
/* First set of baud rate generators.
*/
- char res4a[496];
+ char res4b[236];
uint im_brgc5;
uint im_brgc6;
uint im_brgc7;
diff --git a/include/flash.h b/include/flash.h
index 5576eb3..190eb17 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -182,12 +182,18 @@
#define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/
#define AMD_ID_MIRROR 0x227E227E /* 1st ID word for MirrorBit family */
-#define AMD_ID_LV640U_2 0x220C220C /* 2d ID word for AM29LV640M at 0x38 */
-#define AMD_ID_LV640U_3 0x22012201 /* 3d ID word for AM29LV640M at 0x3c */
-#define AMD_ID_LV128U_2 0x22122212 /* 2d ID word for AM29LV128M at 0x38 */
-#define AMD_ID_LV128U_3 0x22002200 /* 3d ID word for AM29LV128M at 0x3c */
-#define AMD_ID_LV256U_2 0x22122212 /* 2d ID word for AM29LV256M at 0x38 */
-#define AMD_ID_LV256U_3 0x22012201 /* 3d ID word for AM29LV256M at 0x3c */
+#define AMD_ID_DL640G_2 0x22022202 /* 2nd ID word for AM29DL640G at 0x38 */
+#define AMD_ID_DL640G_3 0x22012201 /* 3rd ID word for AM29DL640G at 0x3c */
+#define AMD_ID_LV640U_2 0x220C220C /* 2nd ID word for AM29LV640M at 0x38 */
+#define AMD_ID_LV640U_3 0x22012201 /* 3rd ID word for AM29LV640M at 0x3c */
+#define AMD_ID_LV640MT_2 0x22102210 /* 2nd ID word for AM29LV640MT at 0x38 */
+#define AMD_ID_LV640MT_3 0x22012201 /* 3rd ID word for AM29LV640MT at 0x3c */
+#define AMD_ID_LV640MB_2 0x22102210 /* 2nd ID word for AM29LV640MB at 0x38 */
+#define AMD_ID_LV640MB_3 0x22002200 /* 3rd ID word for AM29LV640MB at 0x3c */
+#define AMD_ID_LV128U_2 0x22122212 /* 2nd ID word for AM29LV128M at 0x38 */
+#define AMD_ID_LV128U_3 0x22002200 /* 3rd ID word for AM29LV128M at 0x3c */
+#define AMD_ID_LV256U_2 0x22122212 /* 2nd ID word for AM29LV256M at 0x38 */
+#define AMD_ID_LV256U_3 0x22012201 /* 3rd ID word for AM29LV256M at 0x3c */
#define AMD_ID_LV320B_2 0x221A221A /* 2d ID word for AM29LV320MB at 0x38 */
#define AMD_ID_LV320B_3 0x22002200 /* 3d ID word for AM29LV320MB at 0x3c */
@@ -296,6 +302,8 @@
#define FLASH_AMDL640 0x0016 /* AMD AM29DL640D */
#define FLASH_AMD016 0x0018 /* AMD AM29F016D */
+#define FLASH_AMDL640MB 0x0019 /* AMD AM29LV640MB (64M, bottom boot sect)*/
+#define FLASH_AMDL640MT 0x001A /* AMD AM29LV640MT (64M, top boot sect) */
#define FLASH_SST200A 0x0040 /* SST 39xF200A ID ( 2M = 128K x 16 ) */
#define FLASH_SST400A 0x0042 /* SST 39xF400A ID ( 4M = 256K x 16 ) */