exynos: uart: s5p: fix the garbled decompressing linux...message
Fix the garbled decompressing linux...message and by enabling the uart
tx/rx fifo. Now that fifo is enabled, the uart read/write functions
are modfied to check the UFSTAT register for fifo status instead of
UTRSTAT (as required with fifo's enabled).
BUG=none
TEST=booted on daisy, Uncompressing Linux is fine
Change-Id: I2d4cccfc308483b15725f36babefc0b3203ec7d8
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/22260
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 3c41242..e65125c 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -30,6 +30,10 @@
DECLARE_GLOBAL_DATA_PTR;
+#define RX_FIFO_COUNT_MASK 0xff
+#define RX_FIFO_FULL_MASK (1 << 8)
+#define TX_FIFO_FULL_MASK (1 << 24)
+
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
u32 offset = dev_index * sizeof(struct s5p_uart);
@@ -87,8 +91,8 @@
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
- /* reset and enable FIFOs, set triggers to the maximum */
- writel(0, &uart->ufcon);
+ /* enable FIFOs */
+ writel(0x1, &uart->ufcon);
writel(0, &uart->umcon);
/* 8N1 */
writel(0x3, &uart->ulcon);
@@ -130,7 +134,8 @@
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
/* wait for character to arrive */
- while (!(readl(&uart->utrstat) & 0x1)) {
+ while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK |
+ RX_FIFO_FULL_MASK))) {
if (serial_err_check(dev_index, 0))
return 0;
}
@@ -146,7 +151,7 @@
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
/* wait for room in the tx FIFO */
- while (!(readl(&uart->utrstat) & 0x2)) {
+ while ((readl(&uart->ufstat) & TX_FIFO_FULL_MASK)) {
if (serial_err_check(dev_index, 1))
return;
}