Spelling (#41)
This PR corrects misspellings identified by the check-spelling action.
The misspellings have been reported at jsoref@72c5ec8#commitcomment-78705631
* spelling: achieved
* spelling: activated
* spelling: address
* spelling: anonymous
* spelling: architecture
* spelling: are_consecutive
* spelling: assemble
* spelling: becoming
* spelling: been
* spelling: clobbered
* spelling: coercion
* spelling: condition
* spelling: convenience
* spelling: correctly
* spelling: correspondence
* spelling: corresponding
* spelling: depend
* spelling: dictionary
* spelling: emitted
* spelling: everything
* spelling: excluding
* spelling: explicitly
* spelling: implementation
* spelling: implicitly
* spelling: included
* spelling: indices
* spelling: instruction
* spelling: instructions
* spelling: labels
* spelling: locations
* spelling: maximum
* spelling: mechanisms
* spelling: modifiers
* spelling: multiple
* spelling: omitted
* spelling: one
* spelling: overridden
* spelling: overwrite
* spelling: performed
* spelling: predicate
* spelling: registers
* spelling: reproducible
* spelling: separate
* spelling: shift
* spelling: substitution
* spelling: temporary
* spelling: test_sve
* spelling: the
* spelling: threshold
* spelling: unconditional
* spelling: usually
* spelling: variables
Signed-off-by: Josh Soref <2119212+jsoref@users.noreply.github.com>
diff --git a/tools/verify_assembler_traces.py b/tools/verify_assembler_traces.py
index d1d29db..d78d17c 100755
--- a/tools/verify_assembler_traces.py
+++ b/tools/verify_assembler_traces.py
@@ -31,7 +31,7 @@
This script will find all files in `test/aarch32/traces/` with names starting
will `assembler`, and check them against `llvm-mc`. It checks our assembler is
-correct by looking up what instruction we meant to asssemble, assemble it with
+correct by looking up what instruction we meant to assemble, assemble it with
`llvm` and check the result is bit identical to what our assembler generated.
You may run the script with no arguments from VIXL's top-level directory as long
@@ -136,7 +136,7 @@
"""
Take an string representing an instruction and convert it to assembly syntax
for LLVM. VIXL's test generation framework will print instruction
- representations as a space seperated list. The first element is the mnemonic
+ representations as a space separated list. The first element is the mnemonic
and the following elements are operands.
"""
@@ -304,12 +304,12 @@
]
# Our test generator framework uses mnemonics starting with a capital letters.
- # We need everythin to be lower case for LLVM.
+ # We need everything to be lower case for LLVM.
vixl_instruction = vixl_instruction.lower()
llvm_instruction = []
- # VIXL may have generated more than one instruction seperated by ';'
+ # VIXL may have generated more than one instruction separated by ';'
# (an IT instruction for example).
for instruction in vixl_instruction.split(';'):
# Strip out extra white spaces.
@@ -401,7 +401,7 @@
# due to IT instructions preceding every instruction under test. VIXL's
# assembly reference files will contain a single array of 4 bytes encoding
# both the IT and the following instruction. While LLVM will have decoded them
- # into two seperate 2 bytes arrays.
+ # into two separate 2 bytes arrays.
if len(llvm_encodings) == 2 * len(vixl_encodings):
llvm_encodings = [
llvm_encodings[i * 2] + llvm_encodings[(i * 2) + 1]