commit b13d3bf3b1c51ccd2653eeace22cb30e9407d978
author Ryan Houdek <Sonicadvance1@gmail.com> Tue Aug 15 09:59:08 2023 -0700
committer GitHub <noreply@github.com> Tue Aug 15 17:59:08 2023 +0100
tree 333e9f3a94333191f4116f513b8d8a1e866e200f
parent 279f08b57b2e7ebb38f60486e65319e82d12197a

Fixes post-index vector loadstore writeback (#76)

src/aarch64/simulator-aarch64.cc

diff --git a/src/aarch64/simulator-aarch64.cc b/src/aarch64/simulator-aarch64.cc
index 7c7dc1c..24092d6 100644
--- a/src/aarch64/simulator-aarch64.cc
+++ b/src/aarch64/simulator-aarch64.cc
@@ -8308,7 +8308,10 @@
     // The immediate is implied by the number of vector registers used.
     addr_base += (rm == 31) ? (RegisterSizeInBytesFromFormat(vf) * reg_count)
                             : ReadXRegister(rm);
-    WriteXRegister(instr->GetRn(), addr_base);
+    WriteXRegister(instr->GetRn(),
+                   addr_base,
+                   LogRegWrites,
+                   Reg31IsStackPointer);
   } else {
     VIXL_ASSERT(addr_mode == Offset);
   }
@@ -8545,7 +8548,9 @@
     int lane_size = LaneSizeInBytesFromFormat(vf);
     WriteXRegister(instr->GetRn(),
                    addr + ((rm == 31) ? (reg_count * lane_size)
-                                      : ReadXRegister(rm)));
+                                      : ReadXRegister(rm)),
+                   LogRegWrites,
+                   Reg31IsStackPointer);
   }
 }