updates

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

4 files changed, 145 insertions, 429 deletions

diff --git a/cron/history.txt b/cron/history.txt
index af93ed1..ef05325 100644
--- a/cron/history.txt
+++ b/cron/history.txt
@@ -23955,3 +23955,53 @@ Updating local grokmirror with changes on master
 Everything up-to-date
 
 Entering /home/vireshk/scripts
+[master 22408482c402] updates
+ 1 file changed, 58 insertions(+)
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+To ssh://git.linaro.org/people/viresh.kumar/backup/scripts
+   191f28b758fa..22408482c402  master -> master
+   d0c15c891215..191f28b758fa  bkp/master -> bkp/master
+
+Entering /home/vireshk/work/repos/tools/module
+On branch master
+nothing to commit, working tree clean
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+Everything up-to-date
+
+Entering /home/vireshk/work/repos/tools/vireshk-linux
+On branch master
+nothing to commit, working tree clean
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+Everything up-to-date
+
+Entering /home/vireshk/work/repos/tools/lwn
+On branch master
+nothing to commit, working tree clean
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+Everything up-to-date
+
+
+
+ 
+Tue Dec 11 13:00:01 IST 2018
+
+Entering /home/vireshk/work/repos/devel/linux
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+To ssh://git.linaro.org/people/viresh.kumar/backup/linux.git
+   23bdc93bc0c5..7ed4348fb272  bkp/cpufreq/constraints -> bkp/cpufreq/constraints
+ + 0b71efed2eda...528ea42245de pm/bleeding-edge -> pm/bleeding-edge (forced update)
+ + 0b71efed2eda...c332f1e0d962 pm/linux-next -> pm/linux-next (forced update)
+   2595646791c3..40e020c129cf  pm/master -> pm/master
+ + 0b71efed2eda...c332f1e0d962 pm/testing -> pm/testing (forced update)
+
+Entering /home/vireshk/work/repos/tools/cpufreq-tests
+post-git trigger: updating grokmirror
+Updating local grokmirror with changes on master
+Everything up-to-date
+
+Entering /home/vireshk/scripts
diff --git a/mutt/incoming/.procmaillog b/mutt/incoming/.procmaillog
index aee9ffd..047070a 100644
--- a/mutt/incoming/.procmaillog
+++ b/mutt/incoming/.procmaillog
@@ -652,3 +652,6 @@ From vireshk  Thu Nov 29 09:34:38 2018
 From vireshk  Mon Dec  3 09:09:32 2018
  Subject: [PATCH v11 2/2] cpufreq: qcom-hw: Add support for QCOM cpufreq HW dri
   Folder: PATCH_v11_2-2_cpufreq_qcom-hw_Add_support_for_QCOM_cpufreq_H	  16145
+From vireshk  Tue Dec 11 09:34:22 2018
+ Subject: [RFC PATCH] PM / OPP: Always expose one supply in debugfs
+  Folder: RFC_PATCH_PM_OPP_Always_expose_one_supply_in_debugfs.mbox	   5789
diff --git a/mutt/incoming/PATCH_v11_2-2_cpufreq_qcom-hw_Add_support_for_QCOM_cpufreq_HW_driver.mbox b/mutt/incoming/PATCH_v11_2-2_cpufreq_qcom-hw_Add_support_for_QCOM_cpufreq_HW_driver.mbox
deleted file mode 100644
index 48ad7e6..0000000
--- a/mutt/incoming/PATCH_v11_2-2_cpufreq_qcom-hw_Add_support_for_QCOM_cpufreq_HW_driver.mbox
+++ /dev/null
@@ -1,429 +0,0 @@
-From vireshk  Mon Dec  3 09:09:32 2018
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-From: Taniya Das <tdas@codeaurora.org>
-To: "Rafael J. Wysocki" <rjw@rjwysocki.net>, 	Viresh Kumar <viresh.kumar@linaro.org>, 	linux-kernel@vger.kernel.org, 	linux-pm@vger.kernel.org, 	Stephen Boyd <sboyd@kernel.org>
-Cc: Rajendra Nayak <rnayak@codeaurora.org>, 	devicetree@vger.kernel.org, 	robh@kernel.org, 	skannan@codeaurora.org, 	linux-arm-msm@vger.kernel.org, 	evgreen@google.com, 	Taniya Das <tdas@codeaurora.org>, 	Stephen Boyd <swboyd@chromium.org>
-Subject: [PATCH v11 2/2] cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver
-Date: Sun,  2 Dec 2018 09:25:03 +0530
-Message-Id: <1543722903-10989-3-git-send-email-tdas@codeaurora.org>
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-Status: RO
-X-Status: A
-Content-Length: 10566
-Lines: 391
-
-The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
-for changing the frequency of CPUs. The driver implements the cpufreq
-driver interface for this hardware engine.
-
-Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
-Signed-off-by: Stephen Boyd <swboyd@chromium.org>
-Signed-off-by: Taniya Das <tdas@codeaurora.org>
----
- drivers/cpufreq/Kconfig.arm       |  11 ++
- drivers/cpufreq/Makefile          |   1 +
- drivers/cpufreq/qcom-cpufreq-hw.c | 334 ++++++++++++++++++++++++++++++++++++++
- 3 files changed, 346 insertions(+)
- create mode 100644 drivers/cpufreq/qcom-cpufreq-hw.c
-
-diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
-index 4e1131e..688f102 100644
---- a/drivers/cpufreq/Kconfig.arm
-+++ b/drivers/cpufreq/Kconfig.arm
-@@ -114,6 +114,17 @@ config ARM_QCOM_CPUFREQ_KRYO
-
- 	  If in doubt, say N.
-
-+config ARM_QCOM_CPUFREQ_HW
-+	tristate "QCOM CPUFreq HW driver"
-+	depends on ARCH_QCOM || COMPILE_TEST
-+	help
-+	  Support for the CPUFreq HW driver.
-+	  Some QCOM chipsets have a HW engine to offload the steps
-+	  necessary for changing the frequency of the CPUs. Firmware loaded
-+	  in this engine exposes a programming interface to the OS.
-+	  The driver implements the cpufreq interface for this HW engine.
-+	  Say Y if you want to support CPUFreq HW.
-+
- config ARM_S3C_CPUFREQ
- 	bool
- 	help
-diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
-index d5ee456..08c071b 100644
---- a/drivers/cpufreq/Makefile
-+++ b/drivers/cpufreq/Makefile
-@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_MVEBU_V7)		+= mvebu-cpufreq.o
- obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ)	+= omap-cpufreq.o
- obj-$(CONFIG_ARM_PXA2xx_CPUFREQ)	+= pxa2xx-cpufreq.o
- obj-$(CONFIG_PXA3xx)			+= pxa3xx-cpufreq.o
-+obj-$(CONFIG_ARM_QCOM_CPUFREQ_HW)	+= qcom-cpufreq-hw.o
- obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO)	+= qcom-cpufreq-kryo.o
- obj-$(CONFIG_ARM_S3C2410_CPUFREQ)	+= s3c2410-cpufreq.o
- obj-$(CONFIG_ARM_S3C2412_CPUFREQ)	+= s3c2412-cpufreq.o
-diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
-new file mode 100644
-index 0000000..8dc6b73
---- /dev/null
-+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
-@@ -0,0 +1,334 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
-+ */
-+
-+#include <linux/bitfield.h>
-+#include <linux/cpufreq.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/of_address.h>
-+#include <linux/of_platform.h>
-+
-+#define LUT_MAX_ENTRIES			40U
-+#define LUT_SRC				GENMASK(31, 30)
-+#define LUT_L_VAL			GENMASK(7, 0)
-+#define LUT_CORE_COUNT			GENMASK(18, 16)
-+#define LUT_ROW_SIZE			32
-+#define CLK_HW_DIV			2
-+
-+/* Register offsets */
-+#define REG_ENABLE			0x0
-+#define REG_LUT_TABLE			0x110
-+#define REG_PERF_STATE			0x920
-+
-+struct cpufreq_qcom {
-+	struct cpufreq_frequency_table *table;
-+	void __iomem *perf_state_reg;
-+	cpumask_t related_cpus;
-+};
-+
-+static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS];
-+
-+static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
-+					unsigned int index)
-+{
-+	void __iomem *perf_state_reg = policy->driver_data;
-+
-+	writel_relaxed(index, perf_state_reg);
-+
-+	return 0;
-+}
-+
-+static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)
-+{
-+	void __iomem *perf_state_reg;
-+	struct cpufreq_policy *policy;
-+	unsigned int index;
-+
-+	policy = cpufreq_cpu_get_raw(cpu);
-+	if (!policy)
-+		return 0;
-+
-+	perf_state_reg = policy->driver_data;
-+
-+	index = readl_relaxed(perf_state_reg);
-+	index = min(index, LUT_MAX_ENTRIES - 1);
-+
-+	return policy->freq_table[index].frequency;
-+}
-+
-+static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
-+						unsigned int target_freq)
-+{
-+	void __iomem *perf_state_reg = policy->driver_data;
-+	int index;
-+
-+	index = policy->cached_resolved_idx;
-+	if (index < 0)
-+		return 0;
-+
-+	writel_relaxed(index, perf_state_reg);
-+
-+	return policy->freq_table[index].frequency;
-+}
-+
-+static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
-+{
-+	struct cpufreq_qcom *c;
-+
-+	c = qcom_freq_domain_map[policy->cpu];
-+	if (!c) {
-+		pr_err("No scaling support for CPU%d\n", policy->cpu);
-+		return -ENODEV;
-+	}
-+
-+	cpumask_copy(policy->cpus, &c->related_cpus);
-+
-+	policy->fast_switch_possible = true;
-+	policy->freq_table = c->table;
-+	policy->driver_data = c->perf_state_reg;
-+
-+	return 0;
-+}
-+
-+static struct freq_attr *qcom_cpufreq_hw_attr[] = {
-+	&cpufreq_freq_attr_scaling_available_freqs,
-+	&cpufreq_freq_attr_scaling_boost_freqs,
-+	NULL
-+};
-+
-+static struct cpufreq_driver cpufreq_qcom_hw_driver = {
-+	.flags		= CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-+			  CPUFREQ_HAVE_GOVERNOR_PER_POLICY,
-+	.verify		= cpufreq_generic_frequency_table_verify,
-+	.target_index	= qcom_cpufreq_hw_target_index,
-+	.get		= qcom_cpufreq_hw_get,
-+	.init		= qcom_cpufreq_hw_cpu_init,
-+	.fast_switch    = qcom_cpufreq_hw_fast_switch,
-+	.name		= "qcom-cpufreq-hw",
-+	.attr		= qcom_cpufreq_hw_attr,
-+};
-+
-+static int qcom_cpufreq_hw_read_lut(struct device *dev, struct cpufreq_qcom *c,
-+				    void __iomem *base, unsigned long xo_rate,
-+				    unsigned long cpu_hw_rate)
-+{
-+	u32 data, src, lval, i, core_count, prev_cc = 0, prev_freq = 0, freq;
-+	unsigned int max_cores = cpumask_weight(&c->related_cpus);
-+
-+	c->table = devm_kcalloc(dev, LUT_MAX_ENTRIES + 1,
-+				sizeof(*c->table), GFP_KERNEL);
-+	if (!c->table)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < LUT_MAX_ENTRIES; i++) {
-+		data = readl_relaxed(base + REG_LUT_TABLE + i * LUT_ROW_SIZE);
-+		src = FIELD_GET(LUT_SRC, data);
-+		lval = FIELD_GET(LUT_L_VAL, data);
-+		core_count = FIELD_GET(LUT_CORE_COUNT, data);
-+
-+		if (src)
-+			freq = xo_rate * lval / 1000;
-+		else
-+			freq = cpu_hw_rate / 1000;
-+
-+		/* Ignore boosts in the middle of the table */
-+		if (core_count != max_cores) {
-+			c->table[i].frequency = CPUFREQ_ENTRY_INVALID;
-+		} else {
-+			c->table[i].frequency = freq;
-+			dev_dbg(dev, "index=%d freq=%d, core_count %d\n", i,
-+				freq, core_count);
-+		}
-+
-+		/*
-+		 * Two of the same frequencies with the same core counts means
-+		 * end of table
-+		 */
-+		if (i > 0 && prev_freq == freq && prev_cc == core_count) {
-+			struct cpufreq_frequency_table *prev = &c->table[i - 1];
-+
-+			/*
-+			 * Only treat the last frequency that might be a boost
-+			 * as the boost frequency
-+			 */
-+			if (prev_cc != max_cores) {
-+				prev->frequency = prev_freq;
-+				prev->flags = CPUFREQ_BOOST_FREQ;
-+			}
-+
-+			break;
-+		}
-+
-+		prev_cc = core_count;
-+		prev_freq = freq;
-+	}
-+
-+	c->table[i].frequency = CPUFREQ_TABLE_END;
-+
-+	return 0;
-+}
-+
-+static void qcom_get_related_cpus(int index, struct cpumask *m)
-+{
-+	struct device_node *cpu_np;
-+	struct of_phandle_args args;
-+	int cpu, ret;
-+
-+	for_each_possible_cpu(cpu) {
-+		cpu_np = of_cpu_device_node_get(cpu);
-+		if (!cpu_np)
-+			continue;
-+
-+		ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
-+						 "#freq-domain-cells", 0,
-+						  &args);
-+		of_node_put(cpu_np);
-+		if (ret < 0)
-+			continue;
-+
-+		if (index == args.args[0])
-+			cpumask_set_cpu(cpu, m);
-+	}
-+}
-+
-+static int qcom_cpu_resources_init(struct platform_device *pdev,
-+				   unsigned int cpu, int index,
-+				   unsigned long xo_rate,
-+				   unsigned long cpu_hw_rate)
-+{
-+	struct cpufreq_qcom *c;
-+	struct resource *res;
-+	struct device *dev = &pdev->dev;
-+	void __iomem *base;
-+	int ret, cpu_r;
-+
-+	c = devm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
-+	if (!c)
-+		return -ENOMEM;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, index);
-+	base = devm_ioremap_resource(dev, res);
-+	if (IS_ERR(base))
-+		return PTR_ERR(base);
-+
-+	/* HW should be in enabled state to proceed */
-+	if (!(readl_relaxed(base + REG_ENABLE) & 0x1)) {
-+		dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
-+		return -ENODEV;
-+	}
-+
-+	qcom_get_related_cpus(index, &c->related_cpus);
-+	if (!cpumask_weight(&c->related_cpus)) {
-+		dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
-+		return -ENOENT;
-+	}
-+
-+	c->perf_state_reg = base + REG_PERF_STATE;
-+
-+	ret = qcom_cpufreq_hw_read_lut(dev, c, base, xo_rate, cpu_hw_rate);
-+	if (ret) {
-+		dev_err(dev, "Domain-%d failed to read LUT\n", index);
-+		return ret;
-+	}
-+
-+	for_each_cpu(cpu_r, &c->related_cpus)
-+		qcom_freq_domain_map[cpu_r] = c;
-+
-+	return 0;
-+}
-+
-+static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
-+{
-+	struct device_node *cpu_np;
-+	struct of_phandle_args args;
-+	struct clk *clk;
-+	unsigned int cpu;
-+	unsigned long xo_rate, cpu_hw_rate;
-+	int ret;
-+
-+	clk = clk_get(&pdev->dev, "xo");
-+	if (IS_ERR(clk))
-+		return PTR_ERR(clk);
-+
-+	xo_rate = clk_get_rate(clk);
-+	clk_put(clk);
-+
-+	clk = clk_get(&pdev->dev, "alternate");
-+	if (IS_ERR(clk))
-+		return PTR_ERR(clk);
-+
-+	cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV;
-+	clk_put(clk);
-+
-+	for_each_possible_cpu(cpu) {
-+		cpu_np = of_cpu_device_node_get(cpu);
-+		if (!cpu_np) {
-+			dev_dbg(&pdev->dev, "Failed to get cpu %d device\n",
-+				cpu);
-+			continue;
-+		}
-+
-+		ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
-+						 "#freq-domain-cells", 0,
-+						  &args);
-+		of_node_put(cpu_np);
-+		if (ret)
-+			return ret;
-+
-+		if (qcom_freq_domain_map[cpu])
-+			continue;
-+
-+		ret = qcom_cpu_resources_init(pdev, cpu, args.args[0],
-+					      xo_rate, cpu_hw_rate);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
-+	if (ret) {
-+		dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
-+		return ret;
-+	}
-+
-+	dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n");
-+
-+	return 0;
-+}
-+
-+static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev)
-+{
-+	return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver);
-+}
-+
-+static const struct of_device_id qcom_cpufreq_hw_match[] = {
-+	{ .compatible = "qcom,cpufreq-hw" },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match);
-+
-+static struct platform_driver qcom_cpufreq_hw_driver = {
-+	.probe = qcom_cpufreq_hw_driver_probe,
-+	.remove = qcom_cpufreq_hw_driver_remove,
-+	.driver = {
-+		.name = "qcom-cpufreq-hw",
-+		.of_match_table = qcom_cpufreq_hw_match,
-+	},
-+};
-+
-+static int __init qcom_cpufreq_hw_init(void)
-+{
-+	return platform_driver_register(&qcom_cpufreq_hw_driver);
-+}
-+subsys_initcall(qcom_cpufreq_hw_init);
-+
-+static void __exit qcom_cpufreq_hw_exit(void)
-+{
-+	platform_driver_unregister(&qcom_cpufreq_hw_driver);
-+}
-+module_exit(qcom_cpufreq_hw_exit);
-+
-+MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver");
-+MODULE_LICENSE("GPL v2");
---
-Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
-of the Code Aurora Forum, hosted by the  Linux Foundation.
-
diff --git a/mutt/incoming/RFC_PATCH_PM_OPP_Always_expose_one_supply_in_debugfs.mbox b/mutt/incoming/RFC_PATCH_PM_OPP_Always_expose_one_supply_in_debugfs.mbox
new file mode 100644
index 0000000..71d1204
--- /dev/null
+++ b/mutt/incoming/RFC_PATCH_PM_OPP_Always_expose_one_supply_in_debugfs.mbox
@@ -0,0 +1,92 @@
+From vireshk  Tue Dec 11 09:34:22 2018
+Delivered-To: viresh.kumar@linaro.org
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+From: Quentin Perret <quentin.perret@arm.com>
+To: vireshk@kernel.org, 	nm@ti.com, 	sboyd@kernel.org
+Cc: linux-pm@vger.kernel.org, 	linux-kernel@vger.kernel.org
+Subject: [RFC PATCH] PM / OPP: Always expose one supply in debugfs
+Date: Mon, 10 Dec 2018 11:32:47 +0000
+Message-Id: <20181210113247.11412-1-quentin.perret@arm.com>
+X-Mailer: git-send-email 2.19.2
+MIME-Version: 1.0
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+Lines: 58
+
+On some platforms, the opp_table->regulator_count field is kept at zero
+even though opp->supplies is always allocated. However, the loop used to
+display the supplies in the debugfs doesn't deal correctly with this,
+which results in the supplies not being displayed in debugfs on those
+platforms.
+
+Fix this by making sure to always display at least once supply in
+debugfs.
+
+Signed-off-by: Quentin Perret <quentin.perret@arm.com>
+
+---
+
+This has been observed on Juno r2 which uses SCPI and Hikey960 which
+uses DT. I am not particularly familiar with that part of the code, so
+I'm not sure if this is even remotely correct (hence the RFC tag).
+
+I first thought setting opp_table->regulator_count to 1 would be the
+right fix but that causes other issues. This fix seems to work OK on
+Juno and Hikey960, at least.
+
+Feedback is welcome :-)
+
+Thanks,
+Quentin
+---
+ drivers/opp/debugfs.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/opp/debugfs.c b/drivers/opp/debugfs.c
+index e6828e5f81b0..2c14564575cb 100644
+--- a/drivers/opp/debugfs.c
++++ b/drivers/opp/debugfs.c
+@@ -40,9 +40,9 @@ static bool opp_debug_create_supplies(struct dev_pm_opp *opp,
+ 				      struct dentry *pdentry)
+ {
+ 	struct dentry *d;
+-	int i;
++	int i = 0;
+ 
+-	for (i = 0; i < opp_table->regulator_count; i++) {
++	do {
+ 		char name[15];
+ 
+ 		snprintf(name, sizeof(name), "supply-%d", i);
+@@ -68,7 +68,9 @@ static bool opp_debug_create_supplies(struct dev_pm_opp *opp,
+ 		if (!debugfs_create_ulong("u_amp", S_IRUGO, d,
+ 					  &opp->supplies[i].u_amp))
+ 			return false;
+-	}
++
++		i++;
++	} while (i < opp_table->regulator_count);
+ 
+ 	return true;
+ }
+-- 
+2.19.2
+