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authorSricharan R <r.sricharan@ti.com>2013-03-21 20:12:17 +0530
committerTony Lindgren <tony@atomide.com>2013-04-08 16:14:51 -0700
commit7a9819950f47dbf319895ee78220f2761f3687a3 (patch)
tree9d5c05679877b6e7a9536c86a450027bd75f3e39
parent6770b211432564c562c856d612b43bbd42e4ab5e (diff)
ARM: OMAP4: Enable fix for Cortex-A9 erratasomap-for-v3.10/soc-signed
This enables the fixes for the below erratas applicable for OMAP4 Socs. 754322: Faulty MMU translations following ASID switch 775420: A data cache maintenance operation which aborts, followed by an ISB, without any DSB in-between, might lead to deadlock Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 68b1802879e2..b56530cb5fa8 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -97,6 +97,8 @@ config ARCH_OMAP4
select PM_RUNTIME if CPU_IDLE
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select COMMON_CLK
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_775420
config SOC_OMAP5
bool "TI OMAP5"