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authorVivek Gautam <vivek.gautam@codeaurora.org>2016-09-12 17:51:43 +0530
committerSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-11-24 16:26:32 +0000
commit4da9cc1b4414f96edbd1370e96fc04bf590e7341 (patch)
tree0973b1c5546f8292dd311948f878c187e69e85be
parentc26a9956e1e29855050fe647518ea3c4e1e13208 (diff)
arm64: dts: msm8996: Add device node for qcom,dwc3
Adding required device node for DWC3 controller present on msm8996 chipset to enable support for the same. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
-rw-r--r--arch/arm64/boot/dts/qcom/msm8996.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 36b0cb0051457..463fa3202ac25 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/phy/phy.h>
/ {
model = "Qualcomm Technologies, Inc. MSM8996";
@@ -981,6 +982,35 @@
<&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "phy", "common";
};
+
+ usb3: usb@6a00000 {
+ compatible = "qcom,dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_USB30_MASTER_CLK>,
+ <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
+ <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
+ <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_SLEEP_CLK>,
+ <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
+
+ assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
+ <&gcc GCC_USB30_MASTER_CLK>;
+ assigned-clock-rates = <19200000>, <150000000>;
+
+ power-domains = <&gcc USB30_GDSC>;
+
+ dwc3@6a00000 {
+ compatible = "snps,dwc3";
+ reg = <0x06a00000 0xcc00>;
+ interrupts = <0 131 0>;
+ phys = <&hsphy>, <&ssphy 0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ };
+ };
};
glink {