diff options
author | Rajendra Nayak <rnayak@codeaurora.org> | 2015-06-02 11:00:15 +0530 |
---|---|---|
committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2017-08-01 01:31:56 +0200 |
commit | 2a819061ecf33df8eb25d25a9a38f1f880f3d608 (patch) | |
tree | 100198de17f251406b3b5e1889a387aeddae3356 | |
parent | 5d16d383f6fae8dd02a41bd02810265036add0fe (diff) |
arm64: dts: msm8916: Add cpu cooling maps
Add cpu cooling maps for cpu passive trip points. The cpu cooling
device states are mapped to cpufreq based scaling frequencies.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index a002f0a25a897..fa7eeba078638 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/clock/qcom,gcc-msm8916.h> #include <dt-bindings/reset/qcom,gcc-msm8916.h> #include <dt-bindings/clock/qcom,rpmcc.h> +#include <dt-bindings/thermal/thermal.h> / { model = "Qualcomm Technologies, Inc. MSM8916"; @@ -113,6 +114,10 @@ clocks = <&apcs 0>; cpu-supply = <&pm8916_spmi_s2>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU1: cpu@1 { @@ -125,6 +130,10 @@ clocks = <&apcs 0>; cpu-supply = <&pm8916_spmi_s2>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU2: cpu@2 { @@ -137,6 +146,10 @@ clocks = <&apcs 0>; cpu-supply = <&pm8916_spmi_s2>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; CPU3: cpu@3 { @@ -149,6 +162,10 @@ clocks = <&apcs 0>; cpu-supply = <&pm8916_spmi_s2>; operating-points-v2 = <&cpu_opp_table>; + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; }; L2_0: l2-cache { @@ -212,6 +229,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; cpu-thermal1 { @@ -232,6 +256,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&cpu_alert1>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; |