diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-04-15 15:15:20 +0100 |
|---|---|---|
| committer | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-05-19 17:06:59 +0100 |
| commit | e93705f246a2887b3d74e8f7946389d3de520c6f (patch) | |
| tree | fd919a43a0d97a9a32041db1aacfe98ca6b3b68c | |
| parent | c8b5815dc200225e2624ec9118b5a9d6ebd08778 (diff) | |
mmc: mmci: Add Qcom datactrl register variant
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | drivers/mmc/host/mmci.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 7bdf4d3946252..324a886d75697 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -60,6 +60,8 @@ static unsigned int fmax = 515633; * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register + * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl + * register * @pwrreg_powerup: power up value for MMCIPOWER register * @signal_direction: input/out direction of bus signals can be indicated * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock @@ -75,6 +77,7 @@ struct variant_data { bool sdio; bool st_clkdiv; bool blksz_datactrl16; + bool blksz_datactrl4; u32 pwrreg_powerup; bool signal_direction; bool pwrreg_clkgate; @@ -164,6 +167,7 @@ static struct variant_data variant_qcom = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .blksz_datactrl4 = true, .datalength_bits = 24, .blksz_datactrl4 = true, .pwrreg_powerup = MCI_PWR_UP, @@ -740,6 +744,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) if (variant->blksz_datactrl16) datactrl = MCI_DPSM_ENABLE | (data->blksz << 16); + else if (variant->blksz_datactrl4) + datactrl = MCI_DPSM_ENABLE | (data->blksz << 4); else datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; |