Merge branch 'tracking-qcomlt-apq8016-dt' into integration-linux-qcomlt

10 files changed, 2303 insertions, 13 deletions

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
index f881437d53c5f..d946408121946 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -1,4 +1,5 @@
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
 
 &pm8916_gpios {
 
@@ -30,6 +31,18 @@
 
 &pm8916_mpps {
 
+	pinctrl-names = "default";
+	pinctrl-0 = <&ls_exp_gpio_f>;
+
+	ls_exp_gpio_f: pm8916_mpp4 {
+		pinconf {
+			pins = "mpp4";
+			function = "digital";
+			output-low;
+			power-source = <PM8916_MPP_L5>;	// 1.8V
+		};
+	};
+
 	pm8916_mpps_leds: pm8916_mpps_leds {
 		pinconf {
 			pins = "mpp2", "mpp3";
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
index ee828a8a82361..185388de914c6 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -24,4 +24,65 @@
 			bias-pull-up;
 		};
 	};
+
+	adv7533_int_active: adv533_int_active {
+		pinmux {
+			function = "gpio";
+			pins = "gpio31";
+		};
+		pinconf {
+			pins = "gpio31";
+			drive-strength = <16>;
+			bias-disable;
+		};
+	};
+
+	adv7533_int_suspend: adv7533_int_suspend {
+		pinmux {
+			function = "gpio";
+			pins = "gpio31";
+		};
+		pinconf {
+			pins = "gpio31";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	adv7533_switch_active: adv7533_switch_active {
+		pinmux {
+			function = "gpio";
+			pins = "gpio32";
+		};
+		pinconf {
+			pins = "gpio32";
+			drive-strength = <16>;
+			bias-disable;
+		};
+	};
+
+	adv7533_switch_suspend: adv7533_switch_suspend {
+		pinmux {
+			function = "gpio";
+			pins = "gpio32";
+		};
+		pinconf {
+			pins = "gpio32";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	msm_key_volp_n_default: msm_key_volp_n_default {
+		pinmux {
+			function = "gpio";
+			pins = "gpio107";
+		};
+		pinconf {
+			pins = "gpio107";
+			drive-strength = <8>;
+			input-enable;
+			bias-pull-up;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 205ef89b8ca0b..1ed0d1407adf3 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -11,6 +11,9 @@
  * GNU General Public License for more details.
  */
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/sound/apq8016-lpass.h>
 #include "msm8916.dtsi"
 #include "pm8916.dtsi"
 #include "apq8016-sbc-soc-pins.dtsi"
@@ -33,6 +36,10 @@
 	};
 
 	soc {
+		dma@7884000 {
+			status = "okay";
+		};
+
 		serial@78af000 {
 			label = "LS-UART0";
 			status = "okay";
@@ -59,6 +66,48 @@
 		/* On High speed expansion */
 			label = "HS-I2C2";
 			status = "okay";
+
+			adv_bridge: bridge@39 {
+				status = "okay";
+
+				compatible = "adi,adv7533";
+				reg = <0x39>;
+
+				interrupt-parent = <&msmgpio>;
+				interrupts = <31 2>;
+
+				adi,dsi-lanes = <4>;
+
+				pd-gpios = <&msmgpio 32 0>;
+
+				avdd-supply = <&pm8916_l6>;
+				v1p2-supply = <&pm8916_l6>;
+				v3p3-supply = <&pm8916_l17>;
+
+				pinctrl-names = "default","sleep";
+				pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
+				pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
+				#sound-dai-cells = <1>;
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+						adv7533_in: endpoint {
+							remote-endpoint = <&dsi0_out>;
+						};
+					};
+
+					port@1 {
+						reg = <1>;
+						adv7533_out: endpoint {
+							remote-endpoint = <&hdmi_con>;
+						};
+					};
+				};
+			};
 		};
 
 		i2c@78ba000 {
@@ -140,6 +189,82 @@
 			status = "okay";
 		};
 
+		sdhci@07864000 {
+			vmmc-supply = <&pm8916_l11>;
+			vqmmc-supply = <&pm8916_l12>;
+
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
+			pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
+
+			cd-gpios = <&msmgpio 38 0x1>;
+			status = "okay";
+		};
+		/*
+		Internal Codec
+			playback - Primary MI2S
+			capture - Ter MI2S
+
+		External Primary:
+			playback - secondary MI2S
+			capture - Quat MI2S
+
+		External Secondary:
+			playback - Quat MI2S
+			capture - Quat MI2S
+
+		*/
+		sound {
+			status = "okay";
+			pinctrl-0 = <&cdc_pdm_lines_act &ext_sec_tlmm_lines_act &ext_mclk_tlmm_lines_act>;
+			pinctrl-1 = <&cdc_pdm_lines_sus &ext_sec_tlmm_lines_sus &ext_mclk_tlmm_lines_sus>;
+			pinctrl-names = "default", "sleep";
+			qcom,model = "DB410c";
+			qcom,audio-routing =
+				"MIC BIAS External", "Handset Mic",
+				"MIC BIAS Internal2", "Headset Mic",
+				"MIC BIAS External", "Secondary Mic",
+				"AMIC1", "MIC BIAS External",
+				"AMIC2", "MIC BIAS Internal2",
+				"AMIC3", "MIC BIAS External",
+				"DMIC1", "MIC BIAS Internal1",
+				"MIC BIAS Internal1", "Digital Mic1",
+				"DMIC2", "MIC BIAS Internal1",
+				"MIC BIAS Internal1", "Digital Mic2";
+
+			/* External Primary or External Secondary -ADV7533 HDMI */
+			external-dai-link@0 {
+				link-name = "ADV7533";
+
+				cpu { /* QUAT */
+					sound-dai = <&lpass MI2S_QUATERNARY>;
+				};
+				codec {
+					sound-dai = <&adv_bridge 0>;
+				};
+			};
+
+			internal-codec-playback-dai-link@0 {		/* I2S - Internal codec */
+				link-name = "WCD";
+				cpu { /* PRIMARY */
+					sound-dai = <&lpass MI2S_PRIMARY>;
+				};
+				codec {
+					sound-dai = <&wcd_codec 0>;
+				};
+			};
+
+			internal-codec-capture-dai-link@0 {		/* I2S - Internal codec */
+				link-name = "WCD-Capture";
+				cpu { /* PRIMARY */
+					sound-dai = <&lpass MI2S_TERTIARY>;
+				};
+				codec {
+					sound-dai = <&wcd_codec 1>;
+				};
+			};
+		};
+
 		usb@78d9000 {
 			extcon = <&usb_id>, <&usb_id>;
 			status = "okay";
@@ -164,6 +289,36 @@
 		lpass@07708000 {
 			status = "okay";
 		};
+
+		mdss@1a00000 {
+			status = "okay";
+
+			mdp@1a01000 {
+				status = "okay";
+			};
+
+			dsi@1a98000 {
+				status = "okay";
+
+				vdda-supply = <&pm8916_l2>;
+				vddio-supply = <&pm8916_l6>;
+
+				ports {
+					port@1 {
+						endpoint {
+							remote-endpoint = <&adv7533_in>;
+							data-lanes = <0 1 2 3>;
+						};
+					};
+				};
+			};
+
+			dsi-phy@1a98300 {
+				status = "okay";
+
+				vddio-supply = <&pm8916_l6>;
+			};
+		};
 	};
 
 	usb2513 {
@@ -178,6 +333,38 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&usb_id_default>;
 	};
+
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&adv7533_out>;
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&msm_key_volp_n_default>;
+
+		button@0 {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spmi_pon {
+	// Overwrite RESETIN_N keyboard scan code
+	linux,code = <KEY_VOLUMEDOWN>;
 };
 
 &smd_rpm_regulators {
@@ -210,8 +397,8 @@
 	};
 
 	l2 {
-		regulator-min-microvolt = <375000>;
-		regulator-max-microvolt = <1525000>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
 	};
 
 	l3 {
@@ -230,8 +417,8 @@
 	};
 
 	l6 {
-		regulator-min-microvolt = <1750000>;
-		regulator-max-microvolt = <3337000>;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
 	};
 
 	l7 {
@@ -290,8 +477,8 @@
 	};
 
 	l17 {
-		regulator-min-microvolt = <1750000>;
-		regulator-max-microvolt = <3337000>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
 	};
 
 	l18 {
@@ -299,3 +486,22 @@
 		regulator-max-microvolt = <3337000>;
 	};
 };
+
+&wcd_codec {
+	status = "okay";
+	clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+	clock-names = "mclk";
+	qcom,lpass-codec-core = <&wcd_digital>;
+};
+/* default regulators required for mezzanine boards */
+&pm8916_l15 {
+	regulator-always-on;
+};
+
+&vidc_rproc {
+	status = "okay";
+};
+
+&vidc {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi b/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi
new file mode 100644
index 0000000000000..fd6f6b7ce9e09
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi
@@ -0,0 +1,238 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+	gfx_iommu: qcom,iommu@1f00000 {
+		compatible = "qcom,msm-smmu-v2", "qcom,msm-mmu-500";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		reg = <0x1f00000 0x10000>;
+		reg-names = "iommu_base";
+		interrupts = <0 43 0>, <0 42 0>;
+		interrupt-names = "global_cfg_NS_irq", "global_cfg_S_irq";
+		label = "gfx_iommu";
+		qcom,iommu-secure-id = <18>;
+		clocks = <&gcc GCC_SMMU_CFG_CLK>,
+			 <&gcc GCC_GFX_TCU_CLK>;
+		clock-names = "iface_clk", "core_clk";
+		status = "disabled";
+
+		qcom,iommu-ctx@1f09000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1f09000 0x1000>;
+			interrupts = <0 241 0>;
+			qcom,iommu-ctx-sids = <0>;
+			label = "gfx3d_user";
+		};
+
+		qcom,iommu-ctx@1f0a000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1f0a000 0x1000>;
+			interrupts = <0 242 0>;
+			qcom,iommu-ctx-sids = <1>;
+			label = "gfx3d_priv";
+		};
+	};
+
+	apps_iommu: qcom,iommu@1e00000 {
+		compatible = "qcom,msm-smmu-v2", "qcom,msm-mmu-500";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		reg = <0x1e00000 0x40000
+			0x1ef0000 0x3000>;
+		reg-names = "iommu_base", "smmu_local_base";
+		interrupts = <0 43 0>, <0 42 0>;
+		interrupt-names = "global_cfg_NS_irq", "global_cfg_S_irq";
+		label = "apps_iommu";
+		qcom,iommu-secure-id = <17>;
+		clocks = <&gcc GCC_SMMU_CFG_CLK>,
+			 <&gcc GCC_APSS_TCU_CLK>;
+		clock-names = "iface_clk", "core_clk";
+		qcom,cb-base-offset = <0x20000>;
+		status = "disabled";
+
+		qcom,iommu-ctx@1e22000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e22000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x2000>;
+			label = "jpeg_enc0";
+		};
+
+		qcom,iommu-ctx@1e23000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e23000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x400>;
+			label = "vfe";
+		};
+
+		qcom,iommu-ctx@1e24000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e24000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0xc00>;
+			label = "mdp_0";
+		};
+
+		venus_ns: venus_ns@1e25000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e25000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x800 0x801 0x802 0x803
+						0x804 0x805 0x807>;
+			label = "venus_ns";
+		};
+
+		qcom,iommu-ctx@1e26000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e26000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x402>;
+			label = "cpp";
+		};
+
+		qcom,iommu-ctx@1e27000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e27000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x1000>;
+			label = "mDSP";
+		};
+
+		qcom,iommu-ctx@1e28000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e28000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x1400>;
+			label = "gss";
+		};
+
+		qcom,iommu-ctx@1e29000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e29000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x1800>;
+			label = "a2";
+		};
+
+		qcom,iommu-ctx@1e32000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e32000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0xc01>;
+			label = "mdp_1";
+		};
+
+		venus_sec_pixel: venus_sec_pixel@1e33000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e33000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0x885>;
+			label = "venus_sec_pixel";
+		};
+
+		venus_sec_bitstream: venus_sec_bitstream@1e34000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e34000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0x880 0x881 0x882 0x883 0x884>;
+			label = "venus_sec_bitstream";
+		};
+
+		venus_sec_non_pixel: venus_sec_non_pixel@1e35000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e35000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0x887 0x8a0>;
+			label = "venus_sec_non_pixel";
+		};
+
+		venus_fw: qcom,iommu-ctx@1e36000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e36000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0x8c0 0x8c6>;
+			label = "venus_fw";
+		};
+
+		periph_rpm: qcom,iommu-ctx@1e37000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			qcom,secure-context;
+			reg = <0x1e37000 0x1000>;
+			interrupts = <0 70 0>, <0 70 0>;
+			qcom,iommu-ctx-sids = <0x40>;
+			label = "periph_rpm";
+		};
+
+		qcom,iommu-ctx@1e38000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e38000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0xC0 0xC4 0xC8 0xCC 0xD0 0xD3
+						0xD4 0xD7 0xD8 0xDB 0xDC 0xDF
+						0xF0 0xF3 0xF4 0xF7 0xF8 0xFB
+						0xFC 0xFF>;
+			label = "periph_CE";
+		};
+
+		qcom,iommu-ctx@1e39000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e39000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x280 0x283 0x284 0x287 0x288
+						0x28B 0x28C 0x28F 0x290 0x293
+						0x294 0x297 0x298 0x29B 0x29C
+						0x29F>;
+			label = "periph_BLSP";
+		};
+
+		qcom,iommu-ctx@1e3a000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e3a000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x100>;
+			label = "periph_SDC1";
+		};
+
+		qcom,iommu-ctx@1e3b000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e3b000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x140>;
+			label = "periph_SDC2";
+		};
+
+		qcom,iommu-ctx@1e3c000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e3c000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x1c0>;
+			label = "periph_audio";
+		};
+
+		qcom,iommu-ctx@1e3d000 {
+			compatible = "qcom,msm-smmu-v2-ctx";
+			reg = <0x1e3d000 0x1000>;
+			interrupts = <0 70 0>;
+			qcom,iommu-ctx-sids = <0x2c0>;
+			label = "periph_USB_HS1";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi b/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi
new file mode 100644
index 0000000000000..11e707cef476f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi
@@ -0,0 +1,858 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/soc/msm-bus-rule-ops.h>
+
+&soc {
+	ad_hoc_bus: ad-hoc-bus { };
+
+	static-rules {
+		compatible = "qcom,msm-bus-static-bw-rules";
+
+		rule0 {
+			qcom,src-nodes = <&mas_apss>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_LE>;
+			qcom,thresh = <1600000>;
+			qcom,mode = <THROTTLE_ON>;
+			qcom,dest-node = <&mas_apss>;
+			qcom,dest-bw = <600000>;
+		};
+
+
+		rule1 {
+			qcom,src-nodes = <&mas_apss>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_LE>;
+			qcom,thresh = <3200000>;
+			qcom,mode = <THROTTLE_ON>;
+			qcom,dest-node = <&mas_apss>;
+			qcom,dest-bw = <1200000>;
+		};
+
+		rule2 {
+			qcom,src-nodes = <&mas_apss>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_GT>;
+			qcom,thresh = <3200000>;
+			qcom,mode = <THROTTLE_OFF>;
+			qcom,dest-node = <&mas_apss>;
+		};
+
+		rule3 {
+			qcom,src-nodes = <&mas_gfx>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_LE>;
+			qcom,thresh = <1600000>;
+			qcom,mode = <THROTTLE_ON>;
+			qcom,dest-node = <&mas_gfx>;
+			qcom,dest-bw = <600000>;
+		};
+
+		rule4 {
+			qcom,src-nodes = <&mas_gfx>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_LE>;
+			qcom,thresh = <3200000>;
+			qcom,mode = <THROTTLE_ON>;
+			qcom,dest-node = <&mas_gfx>;
+			qcom,dest-bw = <1200000>;
+		};
+
+		rule5 {
+			qcom,src-nodes = <&mas_gfx>;
+			qcom,src-field = <FLD_IB>;
+			qcom,src-op = <OP_GT>;
+			qcom,thresh = <3200000>;
+			qcom,mode = <THROTTLE_OFF>;
+			qcom,dest-node = <&mas_gfx>;
+		};
+	};
+};
+
+&ad_hoc_bus {
+	compatible = "qcom,msm-bus-device";
+	reg = <0x580000 0x14000>,
+		<0x400000 0x62000>,
+		<0x500000 0x11000>;
+	reg-names = "snoc-base", "bimc-base", "pnoc-base";
+
+	fab_snoc: fab-snoc {
+		cell-id = <1024>;
+		label = "fab-snoc";
+		qcom,fab-dev;
+		qcom,base-name = "snoc-base";
+		qcom,base-offset = <0x7000>;
+		qcom,qos-off = <0x1000>;
+		qcom,bus-type = <1>;
+		clock-names = "bus_clk", "bus_a_clk";
+		clocks = <&rpmcc  RPM_SMD_SNOC_CLK>,
+                      <&rpmcc  RPM_SMD_SNOC_A_CLK>;
+	};
+
+	fab_bimc: fab-bimc {
+		cell-id = <0>;
+		label = "fab-bimc";
+		qcom,fab-dev;
+		qcom,base-name = "bimc-base";
+		qcom,bus-type = <2>;
+		clock-names = "bus_clk", "bus_a_clk";
+		clocks = <&rpmcc  RPM_SMD_BIMC_CLK>,
+                      <&rpmcc  RPM_SMD_BIMC_A_CLK>;
+	};
+
+	fab_pnoc: fab-pnoc {
+		cell-id = <4096>;
+		label = "fab-pnoc";
+		qcom,fab-dev;
+		qcom,base-name = "pnoc-base";
+		qcom,base-offset = <0x7000>;
+		qcom,qos-delta = <0x1000>;
+		qcom,bus-type = <1>;
+		clock-names = "bus_clk", "bus_a_clk";
+		clocks = <&rpmcc  RPM_SMD_PCNOC_CLK>,
+                      <&rpmcc  RPM_SMD_PCNOC_A_CLK>;
+	};
+
+	/* SNOC Devices */
+	mas_video: mas-video {
+		cell-id = <63>;
+		label = "mas-video";
+		qcom,qport = <8>;
+		qcom,ap-owned;
+		qcom,connections = <&mm_int_0 &mm_int_2>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "bypass";
+		qcom,buswidth = <16>;
+	};
+
+	mas_jpeg: mas-jpeg {
+		cell-id = <62>;
+		label = "mas-jpeg";
+		qcom,ap-owned;
+		qcom,qport = <6>;
+		qcom,connections = <&mm_int_0 &mm_int_2>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "bypass";
+		qcom,buswidth = <16>;
+	};
+
+	mas_vfe: mas-vfe {
+		cell-id = <29>;
+		label = "mas-vfe";
+		qcom,ap-owned;
+		qcom,qport = <9>;
+		qcom,connections = <&mm_int_1 &mm_int_2>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "bypass";
+		qcom,buswidth = <16>;
+	};
+
+	mas_mdp: mas-mdp {
+		cell-id = <22>;
+		label = "mas-mdp";
+		qcom,ap-owned;
+		qcom,connections = <&mm_int_0 &mm_int_2>;
+		qcom,qport = <7>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "bypass";
+		qcom,buswidth = <16>;
+	};
+
+	mas_qdss_bam: mas-qdss-bam {
+		cell-id = <53>;
+		label = "mas-qdss-bam";
+		qcom,connections = <&qdss_int>;
+		qcom,qport = <11>;
+		qcom,bus-dev = <&fab_snoc>;
+		qom,buswidth = <4>;
+		qcom,ap-owned;
+		qcom,qos-mode = "fixed";
+		qcom,prio1 = <1>;
+		qcom,prio0 = <1>;
+	};
+
+	mas_snoc_cfg: mas-snoc-cfg {
+		cell-id = <54>;
+		label = "mas-snoc-cfg";
+		qcom,connections = <&qdss_int>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "bypass";
+		qom,buswidth = <4>;
+		qcom,mas-rpm-id = <20>;
+	};
+
+	mas_qdss_etr: mas-qdss-etr {
+		cell-id = <60>;
+		label = "mas-qdss-etr";
+		qcom,connections = <&qdss_int>;
+		qcom,qport = <10>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,qos-mode = "fixed";
+		qcom,prio1 = <1>;
+		qcom,prio0 = <1>;
+		qom,buswidth = <8>;
+		qcom,ap-owned;
+	};
+
+	mm_int_0: mm-int-0 {
+		cell-id = <10000>;
+		label = "mm-int-0";
+		qcom,ap-owned;
+		qcom,connections = <&mm_int_bimc>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <16>;
+	};
+
+	mm_int_1: mm-int-1 {
+		cell-id = <10001>;
+		label = "mm-int1";
+		qcom,ap-owned;
+		qcom,connections = <&mm_int_bimc>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <16>;
+	};
+
+	mm_int_2: mm-int-2 {
+		cell-id = <10002>;
+		label = "mm-int2";
+		qcom,ap-owned;
+		qcom,connections = <&snoc_int_0>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <16>;
+	};
+
+	mm_int_bimc: mm-int-bimc {
+		cell-id = <10003>;
+		label = "mm-int-bimc";
+		qcom,ap-owned;
+		qcom,connections = <&snoc_bimc_1_mas>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <16>;
+	};
+
+	snoc_int_0: snoc-int-0 {
+		cell-id = <10004>;
+		label = "snoc-int-0";
+		qcom,connections = <&slv_qdss_stm &slv_imem &snoc_pnoc_mas>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,mas-rpm-id = <99>;
+		qcom,slv-rpm-id = <130>;
+		qcom,buswidth = <8>;
+	};
+
+	snoc_int_1: snoc-int-1 {
+		cell-id = <10005>;
+		label = "snoc-int-1";
+		qcom,connections = <&slv_apss &slv_cats_0 &slv_cats_1>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,mas-rpm-id = <100>;
+		qcom,slv-rpm-id = <131>;
+		qcom,buswidth = <8>;
+	};
+
+	snoc_int_bimc: snoc-int-bmc {
+		cell-id = <10006>;
+		label = "snoc-bimc";
+		qcom,connections = <&snoc_bimc_0_mas>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,mas-rpm-id = <101>;
+		qcom,slv-rpm-id = <132>;
+		qcom,buswidth = <8>;
+	};
+
+	snoc_bimc_0_mas: snoc-bimc-0-mas {
+		cell-id = <10007>;
+		label = "snoc-bimc-0-mas";
+		qcom,connections = <&snoc_bimc_0_slv>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,mas-rpm-id = <3>;
+		qcom,buswidth = <8>;
+	};
+
+	snoc_bimc_1_mas: snoc-bimc-1-mas {
+		cell-id = <10008>;
+		label = "snoc-bimc-1-mas";
+		qcom,connections = <&snoc_bimc_1_slv>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,ap-owned;
+		qcom,buswidth = <16>;
+	};
+
+	qdss_int: qdss-int {
+		cell-id = <10009>;
+		label = "qdss-int";
+		qcom,ap-owned;
+		qcom,connections = <&snoc_int_0 &snoc_int_bimc>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <8>;
+	};
+
+	bimc_snoc_slv: bimc-snoc-slv {
+		cell-id = <10017>;
+		label = "bimc_snoc_slv";
+		qcom,ap-owned;
+		qcom,connections = <&snoc_int_0 &snoc_int_1>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <8>;
+	};
+
+	snoc_pnoc_mas: snoc-pnoc-mas {
+		cell-id = <10027>;
+		label = "snoc-pnoc-mas";
+		qcom,connections = <&snoc_pnoc_slv>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <8>;
+	};
+
+	pnoc_snoc_slv: pnoc-snoc-slv {
+		cell-id = <10011>;
+		label = "snoc-pnoc";
+		qcom,connections = <&snoc_int_0 &snoc_int_bimc &snoc_int_1>;
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,slv-rpm-id = <45>;
+		qcom,buswidth = <8>;
+	};
+
+	slv_srvc_snoc: slv-srvc-snoc {
+		cell-id = <587>;
+		label = "snoc-srvc-snoc";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,slv-rpm-id = <29>;
+		qcom,buswidth = <8>;
+	};
+
+	slv_qdss_stm: slv-qdss-stm {
+		cell-id = <588>;
+		label = "snoc-qdss-stm";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <4>;
+		qcom,slv-rpm-id = <30>;
+	};
+
+	slv_imem: slv-imem {
+		cell-id = <519>;
+		label = "slv_imem";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,buswidth = <8>;
+		qcom,slv-rpm-id = <26>;
+	};
+
+	slv_apss: slv-apss {
+		cell-id = <517>;
+		label = "slv_apss";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,slv-rpm-id = <20>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_cats_0: slv-cats-0 {
+		cell-id = <663>;
+		label = "slv-cats-0";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,slv-rpm-id = <106>;
+		qcom,buswidth = <16>;
+	};
+
+	slv_cats_1: slv-cats-1 {
+		cell-id = <664>;
+		label = "slv-cats-1";
+		qcom,bus-dev = <&fab_snoc>;
+		qcom,slv-rpm-id = <107>;
+		qcom,buswidth = <8>;
+	};
+
+	/* BIMC nodes */
+	mas_apss: mas-apss {
+		cell-id = <1>;
+		label = "mas-apss";
+		qcom,ap-owned;
+		qcom,connections = <&slv_ebi_ch0 &bimc_snoc_mas &slv_apps_l2>;
+		qcom,qport = <0>;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,qos-mode = "fixed";
+		qcom,prio-lvl = <0>;
+		qcom,prio-rd = <0>;
+		qcom,prio-wr = <0>;
+		qcom,ws = <10000>;
+		qcom,gp = <5000>;
+		qcom,thmp = <50>;
+		qom,buswidth = <8>;
+	};
+
+	mas_tcu0: mas-tcu0 {
+		cell-id = <104>;
+		label = "mas-tcu0";
+		qcom,ap-owned;
+		qcom,connections = <&slv_ebi_ch0 &bimc_snoc_mas &slv_apps_l2>;
+		qcom,qport = <5>;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,qos-mode = "fixed";
+		qcom,prio-lvl = <2>;
+		qcom,prio-rd = <2>;
+		qcom,prio-wr = <2>;
+		qom,buswidth = <8>;
+	};
+
+	mas_tcu1: mas-tcu1 {
+		cell-id = <105>;
+		label = "mas-tcu1";
+		qcom,ap-owned;
+		qcom,connections = <&slv_ebi_ch0 &bimc_snoc_mas &slv_apps_l2>;
+		qcom,qport = <6>;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,qos-mode = "fixed";
+		qcom,prio-lvl = <2>;
+		qcom,prio-rd = <2>;
+		qcom,prio-wr = <2>;
+		qom,buswidth = <8>;
+	};
+
+	mas_gfx: mas-gfx {
+		cell-id = <26>;
+		label = "mas-gfx";
+		qcom,ap-owned;
+		qcom,connections = <&slv_ebi_ch0 &bimc_snoc_mas &slv_apps_l2>;
+		qcom,qport = <2>;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,qos-mode = "fixed";
+		qcom,prio-lvl = <0>;
+		qcom,prio-rd = <0>;
+		qcom,prio-wr = <0>;
+		qom,buswidth = <8>;
+		qcom,ws = <10000>;
+		qcom,gp = <5000>;
+		qcom,thmp = <50>;
+	};
+
+	bimc_snoc_mas: bimc-snoc-mas {
+		cell-id = <10016>;
+		label = "bimc_snoc_mas";
+		qcom,ap-owned;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,connections = <&bimc_snoc_slv>;
+		qom,buswidth = <8>;
+	};
+
+	snoc_bimc_0_slv: snoc-bimc-0-slv {
+		cell-id = <10025>;
+		label = "snoc_bimc_0_slv";
+		qcom,connections = <&slv_ebi_ch0>;
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,slv-rpm-id = <24>;
+		qom,buswidth = <8>;
+	};
+
+	snoc_bimc_1_slv: snoc_bimc_1_slv {
+		cell-id = <10026>;
+		label = "snoc_bimc_1_slv";
+		qcom,connections = <&slv_ebi_ch0>;
+		qcom,ap-owned;
+		qcom,bus-dev = <&fab_bimc>;
+		qom,buswidth = <8>;
+	};
+
+	slv_ebi_ch0: slv-ebi-ch0 {
+		cell-id = <512>;
+		label = "slv-ebi-ch0";
+		qcom,bus-dev = <&fab_bimc>;
+		qcom,slv-rpm-id = <0>;
+		qom,buswidth = <8>;
+	};
+
+	slv_apps_l2: slv-apps-l2 {
+		cell-id = <514>;
+		label = "slv-apps-l2";
+		qcom,bus-dev = <&fab_bimc>;
+		qom,buswidth = <8>;
+	};
+
+	/* PNOC nodes */
+	snoc_pnoc_slv: snoc-pnoc-slv {
+		cell-id = <10028>;
+		label = "snoc-pnoc-slv";
+		qcom,connections = <&pnoc_int_0>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <8>;
+	};
+
+	pnoc_int_0: pnoc-int-0 {
+		cell-id = <10012>;
+		label = "pnoc-int-0";
+		qcom,connections = <&pnoc_snoc_mas &pnoc_s_0 &pnoc_s_1 &pnoc_s_2
+				&pnoc_s_3 &pnoc_s_4 &pnoc_s_8 &pnoc_s_9>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <8>;
+	};
+
+	pnoc_int_1: pnoc-int-1 {
+		cell-id = <10013>;
+		label = "pnoc-int-1";
+		qcom,connections = <&pnoc_snoc_mas>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <8>;
+	};
+
+	pnoc_m_0: pnoc-m-0 {
+		cell-id = <10014>;
+		label = "pnoc-m-0";
+		qcom,connections = <&pnoc_int_0>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <8>;
+	};
+
+	pnoc_m_1: pnoc-m-1 {
+		cell-id = <10015>;
+		label = "pnoc-m-1";
+		qcom,connections = <&pnoc_snoc_mas>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <8>;
+	};
+
+	pnoc_s_0: pnoc-s-0 {
+		cell-id = <10018>;
+		label = "pnoc-s-0";
+		qcom,connections = <&slv_clk_ctl &slv_tlmm &slv_tcsr
+			&slv_security &slv_mss>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	pnoc_s_1: pnoc-s-1 {
+		cell-id = <10019>;
+		label = "pnoc-s-1";
+		qcom,connections = <&slv_imem_cfg &slv_crypto_0_cfg
+				&slv_msg_ram &slv_pdm &slv_prng>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	pnoc_s_2: pnoc-s-2 {
+		cell-id = <10020>;
+		label = "pnoc-s-2";
+		qcom,connections = <&slv_spdm &slv_boot_rom &slv_bimc_cfg
+				&slv_pnoc_cfg &slv_pmic_arb>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	pnoc_s_3: pnoc-s-3 {
+		cell-id = <10021>;
+		label = "pnoc-s-3";
+		qcom,connections = <&slv_mpm &slv_snoc_cfg &slv_rbcpr_cfg
+				&slv_qdss_cfg &slv_dehr_cfg>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	pnoc_s_4: pnoc-s-4 {
+		cell-id = <10022>;
+		label = "pnoc-s-4";
+		qcom,connections = <&slv_venus_cfg &slv_camera_cfg
+				&slv_display_cfg>;
+		qcom,bus-dev = <&fab_pnoc>;
+	};
+
+	pnoc_s_8: pnoc-s-8 {
+		cell-id = <10023>;
+		label = "pnoc-s-8";
+		qcom,connections = <&slv_usb_hs &slv_sdcc_1 &slv_blsp_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	pnoc_s_9: pnoc-s-9 {
+		cell-id = <10024>;
+		label = "pnoc-s-9";
+		qcom,connections = <&slv_sdcc_2 &slv_audio &slv_gfx_cfg>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qom,buswidth = <4>;
+	};
+
+	slv_imem_cfg: slv-imem-cfg {
+		cell-id = <627>;
+		label = "slv-imem-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_crypto_0_cfg: slv-crypto-0-cfg {
+		cell-id = <625>;
+		label = "slv-crypto-0-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_msg_ram: slv-msg-ram {
+		cell-id = <535>;
+		label = "slv-msg-ram";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_pdm: slv-pdm {
+		cell-id = <577>;
+		label = "slv-pdm";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_prng: slv-prng {
+		cell-id = <618>;
+		label = "slv-prng";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_clk_ctl: slv-clk-ctl {
+		cell-id = <620>;
+		label = "slv-clk-ctl";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_mss: slv-mss {
+		cell-id = <521>;
+		label = "slv-mss";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_tlmm: slv-tlmm {
+		cell-id = <624>;
+		label = "slv-tlmm";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_tcsr: slv-tcsr {
+		cell-id = <579>;
+		label = "slv-tcsr";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_security: slv-security {
+		cell-id = <622>;
+		label = "slv-security";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_spdm: slv-spdm {
+		cell-id = <533>;
+		label = "slv-spdm";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_pnoc_cfg: slv-pnoc-cfg {
+		cell-id = <641>;
+		label = "slv-pnoc-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_pmic_arb: slv-pmic-arb {
+		cell-id = <632>;
+		label = "slv-pmic-arb";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_bimc_cfg: slv-bimc-cfg {
+		cell-id = <629>;
+		label = "slv-bimc-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_boot_rom: slv-boot-rom {
+		cell-id = <630>;
+		label = "slv-boot-rom";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_mpm: slv-mpm {
+		cell-id = <536>;
+		label = "slv-mpm";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_qdss_cfg: slv-qdss-cfg {
+		cell-id = <635>;
+		label = "slv-qdss-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_rbcpr_cfg: slv-rbcpr-cfg {
+		cell-id = <636>;
+		label = "slv-rbcpr-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_snoc_cfg: slv-snoc-cfg {
+		cell-id = <647>;
+		label = "slv-snoc-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_dehr_cfg: slv-dehr-cfg {
+		cell-id = <634>;
+		label = "slv-dehr-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_venus_cfg: slv-venus-cfg {
+		cell-id = <596>;
+		label = "slv-venus-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_display_cfg: slv-display-cfg {
+		cell-id = <590>;
+		label = "slv-display-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_camera_cfg: slv-camera-cfg {
+		cell-id = <589>;
+		label = "slv-camer-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_usb_hs: slv-usb-hs {
+		cell-id = <614>;
+		label = "slv-usb-hs";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_sdcc_1: slv-sdcc-1 {
+		cell-id = <606>;
+		label = "slv-sdcc-1";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_blsp_1: slv-blsp-1 {
+		cell-id = <613>;
+		label = "slv-blsp-1";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_sdcc_2: slv-sdcc-2 {
+		cell-id = <609>;
+		label = "slv-sdcc-2";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_gfx_cfg: slv-gfx-cfg {
+		cell-id = <598>;
+		label = "slv-gfx-cfg";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	slv_audio: slv-audio {
+		cell-id = <522>;
+		label = "slv-audio";
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_blsp_1: mas-blsp_1 {
+		cell-id = <86>;
+		label = "mas-blsp-1";
+		qcom,connections = <&pnoc_m_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_spdm: mas-spdm {
+		cell-id = <36>;
+		label = "mas-spdm";
+		qcom,connections = <&pnoc_m_0>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_dehr: mas-dehr {
+		cell-id = <75>;
+		label = "mas-dehr";
+		qcom,connections = <&pnoc_m_0>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_audio: mas-audio {
+		cell-id = <15>;
+		label = "mas-audio";
+		qcom,connections = <&pnoc_m_0>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_usb_hs: mas-usb-hs {
+		cell-id = <87>;
+		label = "mas-usb-hs";
+		qcom,connections = <&pnoc_m_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <4>;
+	};
+
+	mas_pnoc_crypto_0: mas-pnoc-crypto-0 {
+		cell-id = <55>;
+		label = "mas-pnoc-crypto-0";
+		qcom,connections = <&pnoc_int_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <8>;
+	};
+
+	mas_pnoc_sdcc_1: mas-pnoc-sdcc-1 {
+		cell-id = <78>;
+		label = "mas-pnoc-sdcc-1";
+		qcom,qport = <7>;
+		qcom,connections = <&pnoc_int_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <8>;
+	};
+
+	mas_pnoc_sdcc_2: mas-pnoc-sdcc-2 {
+		cell-id = <81>;
+		label = "mas-pnoc-sdcc-2";
+		qcom,qport = <8>;
+		qcom,connections = <&pnoc_int_1>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,buswidth = <8>;
+	};
+
+	pnoc_snoc_mas: pnoc-snoc-mas {
+		cell-id = <10010>;
+		label = "pnoc-snoc-mas";
+		qcom,connections = <&pnoc_snoc_slv>;
+		qcom,bus-dev = <&fab_pnoc>;
+		qcom,mas-rpm-id = <29>;
+		qcom,buswidth = <8>;
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi b/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi
new file mode 100644
index 0000000000000..82acb8df2a8a7
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi
@@ -0,0 +1,21 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm-iommu-v2.dtsi"
+
+&gfx_iommu {
+	status = "ok";
+};
+
+&apps_iommu {
+	status = "ok";
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
index ceeb8a6feed65..529fe53422cd0 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -33,3 +33,11 @@
 		};
 	};
 };
+
+&blsp_dma {
+	status = "okay";
+};
+
+&blsp_spi3 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 10c83e11c272f..7a0fc73b85d32 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -720,4 +720,29 @@
 			};
 		};
 	};
+
+	wcnss_default: wcnss_default {
+		pinmux2 {
+			function = "wcss_wlan";
+			pins = "gpio40";
+		};
+		pinmux1 {
+			function = "wcss_wlan";
+			pins = "gpio41";
+		};
+		pinmux0 {
+			function = "wcss_wlan";
+			pins = "gpio42";
+		};
+		pinmux {
+			function = "wcss_wlan";
+			pins = "gpio43", "gpio44";
+		};
+		pinconf {
+			pins = "gpio40", "gpio41", "gpio42", "gpio43",
+			       "gpio44";
+			drive-strength = <6>;
+			bias-pull-up;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 96812007850ec..7bcd5715a792b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -14,6 +14,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
 
 / {
 	model = "Qualcomm Technologies, Inc. MSM8916";
@@ -42,15 +43,70 @@
 		#size-cells = <2>;
 		ranges;
 
-		reserve_aligned@86000000 {
-			reg = <0x0 0x86000000 0x0 0x0300000>;
+		tz-apps@86000000 {
+			reg = <0x0 0x86000000 0x0 0x300000>;
 			no-map;
 		};
 
 		smem_mem: smem_region@86300000 {
-			reg = <0x0 0x86300000 0x0 0x0100000>;
+			reg = <0x0 0x86300000 0x0 0x100000>;
 			no-map;
 		};
+
+		hypervisor@86400000 {
+			reg = <0x0 0x86400000 0x0 0x100000>;
+			no-map;
+		};
+
+		tz@86500000 {
+			reg = <0x0 0x86500000 0x0 0x180000>;
+			no-map;
+		};
+
+		reserved@8668000 {
+			reg = <0x0 0x86680000 0x0 0x80000>;
+			no-map;
+		};
+
+		rmtfs@86700000 {
+			reg = <0x0 0x86700000 0x0 0xe0000>;
+			no-map;
+		};
+
+		rfsa@867e00000 {
+			reg = <0x0 0x867e0000 0x0 0x20000>;
+			no-map;
+		};
+
+		mpss@86800000 {
+			reg = <0x0 0x86800000 0x0 0x2b00000>;
+			no-map;
+		};
+
+		wcnss@89300000 {
+			reg = <0x0 0x89300000 0x0 0x600000>;
+			no-map;
+		};
+
+                hypervisor_mem: hypervisor_region@86400000 {
+                        no-map;
+                        reg = <0x0 0x86400000 0x0 0x0400000>;
+                };
+
+		modem_adsp_mem: modem_adsp_region@86800000 {
+                        no-map;
+			reg = <0x0 0x86800000 0x0 0x04800000>;
+		};
+
+                peripheral_mem: peripheral_region@8b600000 {
+                        no-map;
+                        reg = <0x0 0x8b600000 0x0 0x0600000>;
+                };
+
+		vidc_mem: vidc_region@8f800000 {
+			no-map;
+			reg = <0 0x8f800000 0 0x800000>;
+		};
 	};
 
 	cpus {
@@ -62,6 +118,11 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0>;
 			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SPC>;
+			clocks = <&apcs 0>;
+			cpu-supply = <&pm8916_spmi_s2>;
+			operating-points-v2 = <&cpu_opp_table>;
 		};
 
 		CPU1: cpu@1 {
@@ -69,6 +130,11 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x1>;
 			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SPC>;
+			clocks = <&apcs 0>;
+			cpu-supply = <&pm8916_spmi_s2>;
+			operating-points-v2 = <&cpu_opp_table>;
 		};
 
 		CPU2: cpu@2 {
@@ -76,6 +142,11 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x2>;
 			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SPC>;
+			clocks = <&apcs 0>;
+			cpu-supply = <&pm8916_spmi_s2>;
+			operating-points-v2 = <&cpu_opp_table>;
 		};
 
 		CPU3: cpu@3 {
@@ -83,11 +154,91 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x3>;
 			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+			cpu-idle-states = <&CPU_SPC>;
+			clocks = <&apcs 0>;
+			cpu-supply = <&pm8916_spmi_s2>;
+			operating-points-v2 = <&cpu_opp_table>;
 		};
 
 		L2_0: l2-cache {
 		      compatible = "cache";
 		      cache-level = <2>;
+		      power-domain = <&l2ccc_0>;
+		};
+
+		idle-states {
+			CPU_SPC: spc {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x40000002>;
+				entry-latency-us = <130>;
+				exit-latency-us = <150>;
+				min-residency-us = <2000>;
+				local-timer-stop;
+			};
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	cpu_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1050000>;
+			clock-latency-ns = <200000>;
+		};
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
+	};
+
+	thermal-zones {
+		cpu-thermal0 {
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&tsens 4>;
+
+			trips {
+				cpu_alert0: trip@0 {
+					temperature = <75000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu_crit0: trip@1 {
+					temperature = <110000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		cpu-thermal1 {
+			polling-delay-passive = <250>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&tsens 3>;
+
+			trips {
+				cpu_alert1: trip@0 {
+					temperature = <75000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu_crit1: trip@1 {
+					temperature = <110000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
 		};
 	};
 
@@ -99,6 +250,11 @@
 			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
+	l2ccc_0: clock-controller@b011000 {
+		compatible = "qcom,8916-l2ccc";
+		reg = <0x0b011000 0x1000>;
+	};
+
 	clocks {
 		xo_board: xo_board {
 			compatible = "fixed-clock";
@@ -107,6 +263,7 @@
 		};
 
 		sleep_clk: sleep_clk {
+
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 			clock-frequency = <32768>;
@@ -122,6 +279,14 @@
 		hwlocks = <&tcsr_mutex 3>;
 	};
 
+	firmware {
+		scm {
+			compatible = "qcom,scm";
+			clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
+			clock-names = "core", "bus", "iface";
+		};
+	};
+
 	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -178,11 +343,18 @@
 			status = "disabled";
 		};
 
+		a53pll: a53pll@0b016000 {
+			compatible = "qcom,a53-pll";
+			reg = <0x0b016000 0x40>;
+		};
+
 		apcs: syscon@b011000 {
-			compatible = "syscon";
+			compatible = "qcom,a53cc", "syscon";
 			reg = <0x0b011000 0x1000>;
+			#clock-cells = <1>;
 		};
 
+
 		blsp1_uart2: serial@78b0000 {
 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 			reg = <0x78b0000 0x200>;
@@ -352,6 +524,11 @@
 			status = "disabled";
 		};
 
+		wcd_digital: codec-digital{
+			compatible = "syscon", "qcom,apq8016-wcd-digital-codec";
+			reg = <0x0771c000 0x400>;
+		};
+
 		lpass: lpass@07708000 {
 			status = "disabled";
 			compatible = "qcom,lpass-cpu-apq8016";
@@ -378,6 +555,14 @@
 			reg-names = "lpass-lpaif";
 		};
 
+		sound: sound {
+			status = "disabled";
+			compatible = "qcom,apq8016-sbc-sndcard";
+			reg = <0x07702000 0x4>, <0x07702004 0x4>;
+			reg-names = "mic-iomux", "spkr-iomux";
+		};
+
+
 		sdhc_1: sdhci@07824000 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
@@ -436,6 +621,14 @@
 			qcom,otg-control = <2>; // PMIC
 			qcom,manual-pullup;
 
+			qcom,msm-bus,name = "usb2";
+			qcom,msm-bus,num-cases = <3>;
+			qcom,msm-bus,num-paths = <1>;
+			qcom,msm-bus,vectors-KBps =
+					<87 512 0 0>,
+					<87 512 80000 0>,
+					<87 512 6000  6000>;
+
 			clocks = <&gcc GCC_USB_HS_AHB_CLK>,
 				 <&gcc GCC_USB_HS_SYSTEM_CLK>,
 				 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
@@ -537,6 +730,453 @@
 			clocks = <&gcc GCC_PRNG_AHB_CLK>;
 			clock-names = "core";
 		};
+
+		adreno-3xx@01c00000 {
+			compatible = "qcom,adreno-3xx";
+			#stream-id-cells = <16>;
+			reg = <0x01c00000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <0 33 0>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk",
+			    "alt_mem_iface_clk",
+			    "gfx3d_clk_src";
+			clocks =
+			    <&gcc GCC_OXILI_GFX3D_CLK>,
+			    <&gcc GCC_OXILI_AHB_CLK>,
+			    <&gcc GCC_OXILI_GMEM_CLK>,
+			    <&gcc GCC_BIMC_GFX_CLK>,
+			    <&gcc GCC_BIMC_GPU_CLK>,
+			    <&gcc GFX3D_CLK_SRC>;
+			power-domains = <&gcc OXILI_GDSC>;
+			qcom,chipid = <0x03000600>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel@0 {
+					qcom,gpu-freq = <400000000>;
+				};
+				qcom,gpu-pwrlevel@1 {
+					qcom,gpu-freq = <19200000>;
+				};
+			};
+		};
+
+		mdss: mdss@1a00000 {
+			compatible = "qcom,mdss";
+			reg = <0x1a00000 0x1000>,
+			      <0x1ac8000 0x3000>;
+			reg-names = "mdss_phys", "vbif_phys";
+
+			power-domains = <&gcc MDSS_GDSC>;
+
+			clocks = <&gcc GCC_MDSS_AHB_CLK>,
+				 <&gcc GCC_MDSS_AXI_CLK>,
+				 <&gcc GCC_MDSS_VSYNC_CLK>;
+			clock-names = "iface_clk",
+				      "bus_clk",
+				      "vsync_clk";
+
+			interrupts = <0 72 0>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			mdp: mdp@1a01000 {
+				compatible = "qcom,mdp5";
+				reg = <0x1a01000 0x90000>;
+				reg-names = "mdp_phys";
+
+				interrupt-parent = <&mdss>;
+				interrupts = <0 0>;
+
+				qcom,msm-bus,name = "mdss_mdp";
+				qcom,msm-bus,num-cases = <3>;
+				qcom,msm-bus,num-paths = <1>;
+				qcom,msm-bus,vectors-KBps = <22 512 0 0>,
+							    <22 512 0 6400000>,
+							    <22 512 0 6400000>;
+
+				clocks = <&gcc GCC_MDSS_AHB_CLK>,
+					 <&gcc GCC_MDSS_AXI_CLK>,
+					 <&gcc GCC_MDSS_MDP_CLK>,
+					 <&gcc GCC_MDSS_VSYNC_CLK>;
+				clock-names = "iface_clk",
+					      "bus_clk",
+					      "core_clk",
+					      "vsync_clk";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+						mdp5_intf1_out: endpoint {
+							remote-endpoint = <&dsi0_in>;
+						};
+					};
+				};
+			};
+
+			dsi0: dsi@1a98000 {
+				compatible = "qcom,mdss-dsi-ctrl";
+				reg = <0x1a98000 0x25c>;
+				reg-names = "dsi_ctrl";
+
+				interrupt-parent = <&mdss>;
+				interrupts = <4 0>;
+
+				assigned-clocks = <&gcc BYTE0_CLK_SRC>,
+						  <&gcc PCLK0_CLK_SRC>;
+				assigned-clock-parents = <&dsi_phy0 0>,
+							 <&dsi_phy0 1>;
+
+				clocks = <&gcc GCC_MDSS_MDP_CLK>,
+					 <&gcc GCC_MDSS_AHB_CLK>,
+					 <&gcc GCC_MDSS_AXI_CLK>,
+					 <&gcc GCC_MDSS_BYTE0_CLK>,
+					 <&gcc GCC_MDSS_PCLK0_CLK>,
+					 <&gcc GCC_MDSS_ESC0_CLK>;
+				clock-names = "mdp_core_clk",
+					      "iface_clk",
+					      "bus_clk",
+					      "byte_clk",
+					      "pixel_clk",
+					      "core_clk";
+				phys = <&dsi_phy0>;
+				phy-names = "dsi-phy";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+						dsi0_in: endpoint {
+							remote-endpoint = <&mdp5_intf1_out>;
+						};
+					};
+
+					port@1 {
+						reg = <1>;
+						dsi0_out: endpoint {
+						};
+					};
+				};
+			};
+
+			dsi_phy0: dsi-phy@1a98300 {
+				compatible = "qcom,dsi-phy-28nm-lp";
+				reg = <0x1a98300 0xd4>,
+				      <0x1a98500 0x280>,
+				      <0x1a98780 0x30>;
+				reg-names = "dsi_pll",
+					    "dsi_phy",
+					    "dsi_phy_regulator";
+
+				#clock-cells = <1>;
+
+				clocks = <&gcc GCC_MDSS_AHB_CLK>;
+				clock-names = "iface_clk";
+			};
+		};
+
+	        tcsr: syscon@1937000 {
+			compatible = "qcom,tcsr-msm8916", "syscon";
+			reg = <0x1937000 0x30000>;
+		};
+
+		uqfprom: eeprom@58000 {
+			compatible = "qcom,qfprom-msm8916";
+			reg = <0x58000 0x7000>;
+		};
+
+		cpr@b018000 {
+			compatible = "qcom,cpr";
+			reg = <0xb018000 0x1000>;
+			interrupts = <0 15 1>, <0 16 1>, <0 17 1>;
+			vdd-mx-supply = <&pm8916_l3>;
+			acc-syscon = <&tcsr>;
+			eeprom = <&uqfprom>;
+
+			qcom,cpr-ref-clk = <19200>;
+			qcom,cpr-timer-delay-us = <5000>;
+			qcom,cpr-timer-cons-up = <0>;
+			qcom,cpr-timer-cons-down = <2>;
+			qcom,cpr-up-threshold = <0>;
+			qcom,cpr-down-threshold = <2>;
+			qcom,cpr-idle-clocks = <15>;
+			qcom,cpr-gcnt-us = <1>;
+			qcom,vdd-apc-step-up-limit = <1>;
+			qcom,vdd-apc-step-down-limit = <1>;
+			qcom,cpr-cpus = <&CPU0 &CPU1 &CPU2 &CPU3>;
+		};
+
+		q6-smp2p {
+			compatible = "qcom,smp2p";
+			qcom,smem = <435>, <428>;
+			interrupts = <0 27 1>;
+			qcom,ipc = <&apcs 8 14>;
+
+			qcom,local-pid = <0>;
+			qcom,remote-pid = <1>;
+
+			q6_smp2p_out: master-kernel {
+				qcom,entry-name = "master-kernel";
+				qcom,outbound;
+
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			q6_smp2p_in: slave-kernel {
+				qcom,entry-name = "slave-kernel";
+				qcom,inbound;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+		};
+
+		wcnss-smp2p {
+			compatible = "qcom,smp2p";
+			qcom,smem = <451>, <431>;
+
+			interrupts = <0 143 1>;
+
+			qcom,ipc = <&apcs 8 18>;
+
+			qcom,local-pid = <0>;
+			qcom,remote-pid = <4>;
+
+			wcnss_smp2p_out: master-kernel {
+				qcom,entry-name = "master-kernel";
+				qcom,outbound;
+
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			wcnss_smp2p_in: slave-kernel {
+				qcom,entry-name = "slave-kernel";
+				qcom,inbound;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+			};
+		};
+
+		qcom,mss@4080000 {
+			compatible = "qcom,pil-q6v56-mss", "qcom,q6v5-pil";
+			reg = <0x04080000 0x100>,
+			      <0x04020000 0x040>,
+			      <0x01810000 0x004>,
+			      <0x01810000 0x004>,
+			      <0x0194f000 0x010>,
+			      <0x01950000 0x008>,
+			      <0x01951000 0x008>;
+
+			reg-names = "qdsp6_base", "rmb_base", "restart_reg_sec",
+					"halt_q6", "halt_modem", "halt_nc";
+
+			interrupts-extended = <&intc 0 24 1>,
+					      <&q6_smp2p_in 0 0>,
+					      <&q6_smp2p_in 1 0>,
+					      <&q6_smp2p_in 2 0>,
+					      <&q6_smp2p_in 3 0>;
+			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+			clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, <&gcc GCC_BOOT_ROM_AHB_CLK>;
+
+			clock-names = "iface", "bus", "mem";
+
+			qcom,mx-supply = <&pm8916_l3>;
+			qcom,mx-uV = <1050000>;
+			qcom,pll-supply = <&pm8916_l7>;
+			qcom,pll-uV = <1800000>;
+			qcom,proxy-clock-names = "xo";
+			qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk";
+			qcom,is-loadable;
+			qcom,firmware-name = "modem";
+			qcom,pil-self-auth;
+
+
+			/* GPIO inputs from mss */
+			qcom,gpio-err-fatal = <&q6_smp2p_in 0 0>;
+			qcom,gpio-err-ready = <&q6_smp2p_in 1 0>;
+			qcom,gpio-proxy-unvote = <&q6_smp2p_in 2 0>;
+			qcom,gpio-stop-ack = <&q6_smp2p_in 3 0>;
+			qcom,gpio-ramdump-disable = <&q6_smp2p_in 15 0>;
+			/* GPIO output to mss */
+			qcom,gpio-force-stop = <&q6_smp2p_out 0 0>;
+			qcom,stop-gpio = <&q6_smp2p_out 0 0>;
+			memory-region = <&modem_adsp_mem>;
+		};
+
+		pronto_rproc:pronto_rproc {
+			compatible = "qcom,tz-pil";
+
+			interrupts-extended = <&intc 0 149 1>,
+					      <&wcnss_smp2p_in 0 0>,
+					      <&wcnss_smp2p_in 1 0>,
+					      <&wcnss_smp2p_in 2 0>,
+					      <&wcnss_smp2p_in 3 0>;
+			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+			clocks = <&gcc GCC_CRYPTO_CLK>,
+				 <&gcc GCC_CRYPTO_AHB_CLK>,
+				 <&gcc GCC_CRYPTO_AXI_CLK>,
+				 <&gcc CRYPTO_CLK_SRC>;
+			clock-names = "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_src_clk";
+
+			qcom,firmware-name = "wcnss";
+			qcom,pas-id = <6>;
+
+			qcom,crash-reason = <422>;
+			qcom,smd-edges = <&pronto_smd_edge>;
+
+			qcom,pll-supply = <&pm8916_l7>;
+			qcom,pll-uV = <1800000>;
+			qcom,pll-uA = <18000>;
+
+			qcom,stop-gpio = <&wcnss_smp2p_out 0 0>;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&wcnss_default>;
+
+			memory-region = <&peripheral_mem>;
+		};
+
+                qcom,wcn36xx@0a000000 {
+                        compatible = "qcom,wcn3620";
+                        reg = <0x0a000000 0x280000>,
+                                <0xb011008 0x04>,
+                                <0x0a21b000 0x3000>,
+                                <0x03204000 0x00000100>,
+                                <0x03200800 0x00000200>,
+                                <0x0A100400 0x00000200>,
+                                <0x0A205050 0x00000200>,
+                                <0x0A219000 0x00000020>,
+                                <0x0A080488 0x00000008>,
+                                <0x0A080fb0 0x00000008>,
+                                <0x0A08040c 0x00000008>,
+                                <0x0A0120a8 0x00000008>,
+                                <0x0A012448 0x00000008>,
+                                <0x0A080c00 0x00000001>;
+
+                        reg-names = "wcnss_mmio", "wcnss_fiq",
+                                    "pronto_phy_base", "riva_phy_base",
+                                    "riva_ccu_base", "pronto_a2xb_base",
+                                    "pronto_ccpu_base", "pronto_saw2_base",
+                                    "wlan_tx_phy_aborts","wlan_brdg_err_source",
+                                    "wlan_tx_status", "alarms_txctl",
+                                    "alarms_tactl", "pronto_mcu_base";
+
+                        interrupts = <0 145 0 0 146 0>;
+                        interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
+
+                        // qcom,pronto-vddmx-supply = <&pm8916_l3>;
+                        // qcom,pronto-vddcx-supply = <&pm8916_s1_corner>;
+                        // qcom,pronto-vddpx-supply = <&pm8916_l7>;
+                        // qcom,iris-vddxo-supply   = <&pm8916_l7>;
+                        // qcom,iris-vddrfa-supply  = <&pm8916_s3>;
+                        // qcom,iris-vddpa-supply   = <&pm8916_l9>;
+                        // qcom,iris-vdddig-supply  = <&pm8916_l5>;
+
+                        pinctrl-names = "wcnss_default";
+                        // pinctrl-names = "wcnss_default", "wcnss_sleep",
+                        //                                "wcnss_gpio_default";
+                        pinctrl-0 = <&wcnss_default>;
+                        // pinctrl-1 = <&wcnss_sleep>;
+                        // pinctrl-2 = <&wcnss_gpio_default>;
+
+                        // clocks = <&rpmcc RPM_XO_CLK_SRC>,
+                        //         <&rpmcc RPM_RF_CLK2>;
+                        //clock-names = "xo", "rf_clk";
+
+			rproc = <&pronto_rproc>;
+                        qcom,has-autodetect-xo;
+                        qcom,wlan-rx-buff-count = <512>;
+                        qcom,is-pronto-vt;
+                        qcom,has-pronto-hw;
+                        // qcom,wcnss-adc_tm = <&pm8916_adc_tm>;
+                };
+
+
+
+		qcom,rpm-log@29dc00 {
+			compatible = "qcom,rpm-log";
+			reg = <0x29dc00 0x4000>;
+			qcom,rpm-addr-phys = <0x200000>;
+			qcom,offset-version = <4>;
+			qcom,offset-page-buffer-addr = <36>;
+			qcom,offset-log-len = <40>;
+			qcom,offset-log-len-mask = <44>;
+			qcom,offset-page-indices = <56>;
+		};
+
+		vidc_rproc: vidc_tzpil@0 {
+			compatible = "qcom,tz-pil";
+			clocks = <&gcc GCC_CRYPTO_CLK>,
+				 <&gcc GCC_CRYPTO_AHB_CLK>,
+				 <&gcc GCC_CRYPTO_AXI_CLK>,
+				 <&gcc CRYPTO_CLK_SRC>;
+			clock-names = "scm_core_clk", "scm_iface_clk",
+				      "scm_bus_clk", "scm_src_clk";
+			qcom,firmware-name = "venus";
+			qcom,pas-id = <9>;
+			memory-region = <&vidc_mem>;
+			status = "disabled";
+		};
+
+		vidc: qcom,vidc@1d00000 {
+			compatible = "qcom,msm-vidc";
+			reg = <0x01d00000 0xff000>;
+			interrupts = <GIC_SPI 44 0>;
+			power-domains = <&gcc VENUS_GDSC>;
+			clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
+				 <&gcc GCC_VENUS0_AHB_CLK>,
+				 <&gcc GCC_VENUS0_AXI_CLK>;
+			clock-names = "core_clk", "iface_clk", "bus_clk";
+			qcom,hfi = "venus";
+			qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
+			qcom,enable-idle-indicator;
+			rproc = <&vidc_rproc>;
+			qcom,iommu-cb = <&venus_ns>,
+					<&venus_sec_bitstream>,
+					<&venus_sec_pixel>,
+					<&venus_sec_non_pixel>;
+			status = "disabled";
+		};
+
+		qfprom: qfprom@5c000 {
+			compatible = "qcom,qfprom";
+			reg = <0x5c000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			tsens_caldata: caldata@d0 {
+				reg = <0xd0 0x8>;
+			};
+			tsens_calsel: calsel@ec {
+				reg = <0xec 0x4>;
+			};
+		};
+
+		tsens: thermal-sensor@4a8000 {
+			compatible = "qcom,msm8916-tsens";
+			reg = <0x4a8000 0x2000>;
+			nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
+			nvmem-cell-names = "calib", "calib_sel";
+			#thermal-sensor-cells = <1>;
+		};
 	};
 
 	smd {
@@ -546,16 +1186,22 @@
 			interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
 			qcom,ipc = <&apcs 8 0>;
 			qcom,smd-edge = <15>;
+			qcom,remote-pid = <0xffffffff>;
 
 			rpm_requests {
 				compatible = "qcom,rpm-msm8916";
 				qcom,smd-channels = "rpm_requests";
 
 				rpmcc: qcom,rpmcc {
-					compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
+					//compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
+					compatible = "qcom,rpmcc-msm8916";
 					#clock-cells = <1>;
 				};
 
+				msm-bus {
+						compatible = "qcom,rpm-msm-bus";
+				};
+
 				smd_rpm_regulators: pm8916-regulators {
 					compatible = "qcom,rpm-pm8916-regulators";
 
@@ -584,7 +1230,59 @@
 				};
 			};
 		};
+
+		qcom,smd-modem {
+			interrupts = <0 25 1>;
+			qcom,smd-edge = <0>;
+			qcom,ipc = <&apcs 8 12>;
+			qcom,remote-pid = <1>;
+			ipcrtr_requests {
+				compatible = "qcom,ipcrtr";
+				qcom,smd-channels = "IPCRTR";
+			};
+		};
+
+		pronto_smd_edge: pronto {
+			interrupts = <0 142 1>;
+
+			qcom,ipc = <&apcs 8 17>;
+			qcom,smd-edge = <6>;
+			qcom,remote-pid = <4>;
+
+                               bt {
+				compatible = "qcom,hci-smd";
+				qcom,smd-channels = "APPS_RIVA_BT_CMD", "APPS_RIVA_BT_ACL";
+				qcom,smd-channel-names = "event", "data";
+			};
+
+			ipcrtr {
+				compatible = "qcom,ipcrtr";
+				qcom,smd-channels = "IPCRTR";
+			};
+
+			wifi {
+				compatible = "qcom,wlan-ctrl";
+				qcom,smd-channels = "WLAN_CTRL";
+
+				interrupts = <0 145 0>, <0 146 0>;
+				interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
+
+				qcom,wcnss_mmio = <0xfb000000 0x21b000>;
+
+				// qcom,tx-enable-gpios = <&apps_smsm 10 0>;
+				// qcom,tx-rings-empty-gpios = <&apps_smsm 9 0>;
+			};
+
+			wcnss_ctrl {
+				compatible = "qcom,wcnss-ctrl";
+				qcom,smd-channels = "WCNSS_CTRL";
+
+				qcom,wcnss_mmio = <0xfb21b000 0x3000>;
+			};
+		};
 	};
 };
 
 #include "msm8916-pins.dtsi"
+#include "msm8916-iommu.dtsi"
+#include "msm8916-bus.dtsi"
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index f71679b15d544..d526035dc45f4 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -1,4 +1,5 @@
 #include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
@@ -17,12 +18,15 @@
 			interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
 		};
 
-		pwrkey@800 {
+		spmi_pon: pwrkey@800 {
 			compatible = "qcom,pm8941-pwrkey";
 			reg = <0x800>;
-			interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
+			interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>,
+				     <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
 			debounce = <15625>;
 			bias-pull-up;
+			resin-pull-up;
+			linux,code = <KEY_RESTART>;
 		};
 
 		pm8916_gpios: gpios@c000 {
@@ -95,5 +99,163 @@
 		reg = <0x1 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		regulators {
+			compatible = "qcom,pm8916-regulators";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			s1@1400 {
+				reg = <0x1400 0x300>;
+				status = "disabled";
+			};
+
+			pm8916_spmi_s2: s2@1700 {
+				reg = <0x1700 0x300>;
+				status = "ok";
+				regulator-min-microvolt = <1050000>;
+				regulator-max-microvolt = <1350000>;
+			};
+
+			s3@1a00 {
+				reg = <0x1a00 0x300>;
+				status = "disabled";
+			};
+
+			s4@1d00 {
+				reg = <0x1d00 0x300>;
+				status = "disabled";
+			};
+
+			l1@4000 {
+				reg = <0x4000 0x100>;
+				status = "disabled";
+			};
+
+			l2@4100 {
+				reg = <0x4100 0x100>;
+				status = "disabled";
+			};
+
+			l3@4200 {
+				reg = <0x4200 0x100>;
+				status = "disabled";
+			};
+
+			l4@4300 {
+				reg = <0x4300 0x100>;
+				status = "disabled";
+			};
+
+			l5@4400 {
+				reg = <0x4400 0x100>;
+				status = "disabled";
+			};
+
+			l6@4500 {
+				reg = <0x4500 0x100>;
+				status = "disabled";
+			};
+
+			l7@4600 {
+				reg = <0x4600 0x100>;
+				status = "disabled";
+			};
+
+			l8@4700 {
+				reg = <0x4700 0x100>;
+				status = "disabled";
+			};
+
+			l9@4800 {
+				reg = <0x4800 0x100>;
+				status = "disabled";
+			};
+
+			l10@4900 {
+				reg = <0x4900 0x100>;
+				status = "disabled";
+			};
+
+			l11@4a00 {
+				reg = <0x4a00 0x100>;
+				status = "disabled";
+			};
+
+			l12@4b00 {
+				reg = <0x4b00 0x100>;
+				status = "disabled";
+			};
+
+			l13@4c00 {
+				reg = <0x4c00 0x100>;
+				status = "disabled";
+			};
+
+			l14@4d00 {
+				reg = <0x4d00 0x100>;
+				status = "disabled";
+			};
+
+			l15@4e00 {
+				reg = <0x4e00 0x100>;
+				status = "disabled";
+			};
+
+			l16@4f00 {
+				reg = <0x4f00 0x100>;
+				status = "disabled";
+			};
+
+			l17@5000 {
+				reg = <0x5000 0x100>;
+				status = "disabled";
+			};
+
+			l18@5100 {
+				reg = <0x5100 0x100>;
+				status = "disabled";
+			};
+		};
+
+		wcd_codec: codec@f000 {
+			compatible = "qcom,msm8916-wcd-codec";
+			reg = <0xf000 0x200>;
+			reg-names = "pmic-codec-core";
+			interrupt-parent = <&spmi_bus>;
+			interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
+				     <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
+				     <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
+			interrupt-names = "spk_cnp_int",
+					  "spk_clip_int",
+					  "spk_ocp_int",
+					  "ins_rem_det1",
+					  "but_rel_det",
+					  "but_press_det",
+					  "ins_rem_det",
+					  "mbhc_int",
+					  "ear_ocp_int",
+					  "hphr_ocp_int",
+					  "hphl_ocp_det",
+					  "ear_cnp_int",
+					  "hphr_cnp_int",
+					  "hphl_cnp_int";
+
+			vddio-supply = <&pm8916_l5>;
+			vdd-tx-rx-supply = <&pm8916_l5>;
+			vdd-micbias-supply = <&pm8916_l13>;
+			#sound-dai-cells = <1>;
+		};
 	};
 };