ASoC: class H WIP patch need to cleanup

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

2 files changed, 184 insertions, 36 deletions

diff --git a/sound/soc/codecs/wcd-clsh-v2.c b/sound/soc/codecs/wcd-clsh-v2.c
index cc5a9c9b918be..bc5305352d603 100644
--- a/sound/soc/codecs/wcd-clsh-v2.c
+++ b/sound/soc/codecs/wcd-clsh-v2.c
@@ -6,7 +6,6 @@
 #include <sound/soc.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
-#include "wcd9335.h"
 #include "wcd-clsh-v2.h"
 
 struct wcd_clsh_ctrl {
@@ -20,17 +19,17 @@ struct wcd_clsh_ctrl {
 };
 
 /* Class-H registers for codecs from and above WCD9335 */
-#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0			WCD9335_REG(0xB, 0x42)
+#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0			0xB42
 #define WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK		BIT(6)
 #define WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE		BIT(6)
 #define WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE		0
-#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0			WCD9335_REG(0xB, 0x56)
-#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0			WCD9335_REG(0xB, 0x6A)
-#define WCD9XXX_A_CDC_CLSH_K1_MSB			WCD9335_REG(0xC, 0x08)
+#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0			0xB56
+#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0			0xB6A
+#define WCD9XXX_A_CDC_CLSH_K1_MSB			0xC08
 #define WCD9XXX_A_CDC_CLSH_K1_MSB_COEF_MASK		GENMASK(3, 0)
-#define WCD9XXX_A_CDC_CLSH_K1_LSB			WCD9335_REG(0xC, 0x09)
+#define WCD9XXX_A_CDC_CLSH_K1_LSB			0xC09
 #define WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK		GENMASK(7, 0)
-#define WCD9XXX_A_ANA_RX_SUPPLIES			WCD9335_REG(0x6, 0x08)
+#define WCD9XXX_A_ANA_RX_SUPPLIES			0x608
 #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK		BIT(1)
 #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H		0
 #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_AB		BIT(1)
@@ -48,42 +47,42 @@ struct wcd_clsh_ctrl {
 #define WCD9XXX_A_ANA_RX_VPOS_EN_SHIFT			7
 #define WCD9XXX_A_ANA_RX_VPOS_ENABLE			BIT(7)
 #define WCD9XXX_A_ANA_RX_VPOS_DISABLE			0
-#define WCD9XXX_A_ANA_HPH				WCD9335_REG(0x6, 0x09)
+#define WCD9XXX_A_ANA_HPH				0x609
 #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK		GENMASK(3, 2)
 #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_UHQA		0x08
 #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_LP			0x04
 #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_NORMAL		0x0
-#define WCD9XXX_A_CDC_CLSH_CRC				WCD9335_REG(0xC, 0x01)
+#define WCD9XXX_A_CDC_CLSH_CRC				0xC01
 #define WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK		BIT(0)
 #define WCD9XXX_A_CDC_CLSH_CRC_CLK_ENABLE		BIT(0)
 #define WCD9XXX_A_CDC_CLSH_CRC_CLK_DISABLE		0
-#define WCD9XXX_FLYBACK_EN				WCD9335_REG(0x6, 0xA4)
+#define WCD9XXX_FLYBACK_EN				0x6A4
 #define WCD9XXX_FLYBACK_EN_DELAY_SEL_MASK		GENMASK(6, 5)
 #define WCD9XXX_FLYBACK_EN_DELAY_26P25_US		0x40
 #define WCD9XXX_FLYBACK_EN_RESET_BY_EXT_MASK		BIT(4)
 #define WCD9XXX_FLYBACK_EN_PWDN_WITHOUT_DELAY		BIT(4)
 #define WCD9XXX_FLYBACK_EN_PWDN_WITH_DELAY			0
-#define WCD9XXX_RX_BIAS_FLYB_BUFF			WCD9335_REG(0x6, 0xC7)
+#define WCD9XXX_RX_BIAS_FLYB_BUFF			0x6C7
 #define WCD9XXX_RX_BIAS_FLYB_VNEG_5_UA_MASK		GENMASK(7, 4)
-#define WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK		GENMASK(3, 0)
-#define WCD9XXX_HPH_L_EN				WCD9335_REG(0x6, 0xD3)
+#define WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK		GENMASK(0, 3)
+#define WCD9XXX_HPH_L_EN				0x6D3
 #define WCD9XXX_HPH_CONST_SEL_L_MASK			GENMASK(7, 3)
 #define WCD9XXX_HPH_CONST_SEL_BYPASS			0
 #define WCD9XXX_HPH_CONST_SEL_LP_PATH			0x40
 #define WCD9XXX_HPH_CONST_SEL_HQ_PATH			0x80
-#define WCD9XXX_HPH_R_EN				WCD9335_REG(0x6, 0xD6)
-#define WCD9XXX_HPH_REFBUFF_UHQA_CTL			WCD9335_REG(0x6, 0xDD)
+#define WCD9XXX_HPH_R_EN				0x6D6
+#define WCD9XXX_HPH_REFBUFF_UHQA_CTL			0x6DD
 #define WCD9XXX_HPH_REFBUFF_UHQA_GAIN_MASK		GENMASK(2, 0)
-#define WCD9XXX_CLASSH_CTRL_VCL_2                       WCD9335_REG(0x6, 0x9B)
+#define WCD9XXX_CLASSH_CTRL_VCL_2                       0x69B
 #define WCD9XXX_CLASSH_CTRL_VCL_2_VREF_FILT_1_MASK	GENMASK(5, 4)
 #define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_50KOHM	0x20
 #define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_0KOHM	0x0
-#define WCD9XXX_CDC_RX1_RX_PATH_CTL			WCD9335_REG(0xB, 0x55)
-#define WCD9XXX_CDC_RX2_RX_PATH_CTL			WCD9335_REG(0xB, 0x69)
-#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL		WCD9335_REG(0xD, 0x41)
+#define WCD9XXX_CDC_RX1_RX_PATH_CTL			0xB55
+#define WCD9XXX_CDC_RX2_RX_PATH_CTL			0xB69
+#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL		0xD41
 #define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_EN_MASK		BIT(0)
 #define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_11P3_EN_MASK	BIT(1)
-#define WCD9XXX_CLASSH_CTRL_CCL_1                       WCD9335_REG(0x6, 0x9C)
+#define WCD9XXX_CLASSH_CTRL_CCL_1                       0x69C
 #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_MASK	GENMASK(7, 4)
 #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA	0x50
 #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA	0x30
@@ -92,6 +91,13 @@ struct wcd_clsh_ctrl {
 #define CLSH_REQ_DISABLE	false
 #define WCD_USLEEP_RANGE	50
 
+#define WCD9XXX_HPH_CNP_WG_CTL                          (0x06cc)
+#define WCD9XXX_FLYBACK_VNEG_CTRL_4                     (0x06a8)
+#define WCD9XXX_HPH_NEW_INT_PA_MISC2                    (0x0738)
+#define WCD9XXX_RX_BIAS_HPH_LOWPOWER                    (0x06bf)
+#define WCD9XXX_HPH_PA_CTL1                             (0x06d1)
+
+
 enum {
 	DAC_GAIN_0DB = 0,
 	DAC_GAIN_0P2DB,
@@ -106,6 +112,7 @@ enum {
 static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl,
 					 bool enable)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	if ((enable && ++ctrl->clsh_users == 1) ||
@@ -119,6 +126,7 @@ static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl,
 
 static inline bool wcd_clsh_enable_status(struct snd_soc_component *comp)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	return snd_soc_component_read32(comp, WCD9XXX_A_CDC_CLSH_CRC) &
 					WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK;
 }
@@ -126,20 +134,34 @@ static inline bool wcd_clsh_enable_status(struct snd_soc_component *comp)
 static inline void wcd_clsh_set_buck_mode(struct snd_soc_component *comp,
 					  int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	/* set to HIFI */
-	if (mode == CLS_H_HIFI)
+	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||
+	    mode == CLS_AB_HIFI || mode == CLS_AB)
 		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
-					WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK,
-					WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_UHQA);
+				    0x08, 0x08); /* set to HIFI */
+				//	WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK,
+				//	WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_UHQA);
 	else
 		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
-					WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK,
-					WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT);
+				    0x08, 0x00); /* set to default */
+//					WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK,
+				//	WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT);
 }
 
 static inline void wcd_clsh_set_flyback_mode(struct snd_soc_component *comp,
 					     int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
+	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||
+	    mode == CLS_AB_HIFI || mode == CLS_AB)
+		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
+				    0x04, 0x04); /* set to HIFI */
+	else
+		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
+				    0x04, 0x00); /* set to Default */
+}
+#if 0
 	/* set to HIFI */
 	if (mode == CLS_H_HIFI)
 		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
@@ -150,11 +172,12 @@ static inline void wcd_clsh_set_flyback_mode(struct snd_soc_component *comp,
 					WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_MASK,
 					WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_DEFAULT);
 }
-
+#endif
 static void wcd_clsh_buck_ctrl(struct wcd_clsh_ctrl *ctrl,
 			       int mode,
 			       bool enable)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	/* enable/disable buck */
@@ -174,6 +197,7 @@ static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl,
 				  int mode,
 				  bool enable)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	/* enable/disable flyback */
@@ -184,6 +208,33 @@ static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl,
 				enable << WCD9XXX_A_ANA_RX_VNEG_EN_SHIFT);
 		/* 100usec delay is needed as per HW requirement */
 		usleep_range(100, 110);
+#if 0
+		//FIXME
+		if (enable && (TASHA_IS_1_1(wcd9xxx))) {
+			wcd_clsh_set_flyback_mode(codec, CLS_H_HIFI);
+			snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN,
+					    0x60, 0x40);
+			snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN,
+					    0x10, 0x10);
+			vneg[0] = snd_soc_read(codec,
+					       WCD9XXX_A_ANA_RX_SUPPLIES);
+			vneg[0] &= ~(0x40);
+			vneg[1] = vneg[0] | 0x40;
+			bulk_reg[0].reg = WCD9XXX_A_ANA_RX_SUPPLIES;
+			bulk_reg[0].buf = &vneg[0];
+			bulk_reg[0].bytes = 1;
+			bulk_reg[1].reg = WCD9XXX_A_ANA_RX_SUPPLIES;
+			bulk_reg[1].buf = &vneg[1];
+			bulk_reg[1].bytes = 1;
+			/* 500usec delay is needed as per HW requirement */
+			usleep_range(500, 510);
+			wcd9xxx_slim_bulk_write(wcd9xxx, bulk_reg, 2,
+						false);
+			snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_EN,
+					    0x10, 0x00);
+			wcd_clsh_set_flyback_mode(codec, mode);
+		}
+#endif
 	}
 	/*
 	 * 500us sleep is required after flyback enable/disable
@@ -194,9 +245,11 @@ static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl,
 
 static void wcd_clsh_set_gain_path(struct wcd_clsh_ctrl *ctrl, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 	int val = 0;
-
+//ONLy TASHA
+return;
 	switch (mode) {
 	case CLS_H_NORMAL:
 	case CLS_AB:
@@ -222,6 +275,7 @@ static void wcd_clsh_set_gain_path(struct wcd_clsh_ctrl *ctrl, int mode)
 static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp,
 				  int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	int val = 0, gain = 0, res_val;
 	int ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA;
 
@@ -248,9 +302,10 @@ static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp,
 		ipeak = WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA;
 		break;
 	}
-
 	snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_HPH,
-					WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK, val);
+					WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK, 0x4
+					/*val*/);
+#if 0
 	snd_soc_component_update_bits(comp, WCD9XXX_CLASSH_CTRL_VCL_2,
 				WCD9XXX_CLASSH_CTRL_VCL_2_VREF_FILT_1_MASK,
 				res_val);
@@ -262,12 +317,14 @@ static void wcd_clsh_set_hph_mode(struct snd_soc_component *comp,
 	snd_soc_component_update_bits(comp, WCD9XXX_CLASSH_CTRL_CCL_1,
 				WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_MASK,
 				ipeak);
+#endif
 }
 
 static void wcd_clsh_set_flyback_current(struct snd_soc_component *comp,
 					 int mode)
 {
-
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
+return;
 	snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_FLYB_BUFF,
 				WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK, 0x0A);
 	snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_FLYB_BUFF,
@@ -279,6 +336,10 @@ static void wcd_clsh_set_flyback_current(struct snd_soc_component *comp,
 static void wcd_clsh_set_buck_regulator_mode(struct snd_soc_component *comp,
 					     int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
+	snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES, 0x02,
+				      0x0);
+	return;
 	if (mode == CLS_AB)
 		snd_soc_component_update_bits(comp, WCD9XXX_A_ANA_RX_SUPPLIES,
 					WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK,
@@ -289,9 +350,61 @@ static void wcd_clsh_set_buck_regulator_mode(struct snd_soc_component *comp,
 					WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H);
 }
 
+
+static inline void wcd_clsh_force_iq_ctl(struct snd_soc_component *comp,
+					 int mode)
+{
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
+//	struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
+///
+//	if (!IS_CODEC_TYPE(wcd9xxx, WCD934X))
+//		return;
+
+	if (mode == CLS_H_LOHIFI || mode == CLS_AB) {
+		snd_soc_component_update_bits(comp, WCD9XXX_HPH_NEW_INT_PA_MISC2,
+				    0x20, 0x20);
+		snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_HPH_LOWPOWER,
+				    0xF0, 0xC0);
+		snd_soc_component_update_bits(comp, WCD9XXX_HPH_PA_CTL1,
+				    0x0E, 0x02);
+	} else {
+
+		snd_soc_component_update_bits(comp, WCD9XXX_HPH_NEW_INT_PA_MISC2,
+				    0x20, 0x0);
+		snd_soc_component_update_bits(comp, WCD9XXX_RX_BIAS_HPH_LOWPOWER,
+				    0xF0, 0x80);
+		snd_soc_component_update_bits(comp, WCD9XXX_HPH_PA_CTL1,
+				    0x0E, 0x06);
+	}
+}
+
+static inline void wcd_clsh_gm3_boost_disable(struct snd_soc_component *comp,
+					      int mode)
+{
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
+//	struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
+
+//FIXME 	if (!IS_CODEC_TYPE(wcd9xxx, WCD934X))
+//		return;
+
+	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||
+	    mode == CLS_AB_HIFI || mode == CLS_AB) {
+	//	if (TAVIL_IS_1_0(wcd9xxx))
+	//		snd_soc_component_update_bits(comp, WCD9XXX_HPH_CNP_WG_CTL,
+	//				    0x80, 0x0); /* disable GM3 Boost */
+		snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_VNEG_CTRL_4,
+				    0xF0, 0x80);
+	} else {
+		snd_soc_component_update_bits(comp, WCD9XXX_HPH_CNP_WG_CTL,
+				    0x80, 0x80); /* set to Default */
+		snd_soc_component_update_bits(comp, WCD9XXX_FLYBACK_VNEG_CTRL_4,
+				    0xF0, 0x70);
+	}
+}
 static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state,
 			      bool is_enable, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	if (mode != CLS_AB) {
@@ -319,6 +432,7 @@ static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state,
 static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
 				 bool is_enable, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	if (mode == CLS_H_NORMAL) {
@@ -372,13 +486,30 @@ static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state,
 		wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL);
 		wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL);
 	}
+pr_err("DEBUG: %s: %d EXIT\n", __func__, __LINE__);
 }
 
 static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
 				 bool is_enable, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
-
+#if 0
+snd_soc_component_write(comp, 0xc01 , 0x1 );
+snd_soc_component_write(comp, 0xc08 , 0x0 );
+snd_soc_component_write(comp, 0xc09 , 0xc0 );
+snd_soc_component_write(comp, 0xb56 , 0x4a );
+snd_soc_component_write(comp, 0x608 , 0x5 );
+snd_soc_component_write(comp, 0x6a8 , 0x8f );
+snd_soc_component_write(comp, 0x738 , 0x20 );
+snd_soc_component_write(comp, 0x6bf , 0xc2 );
+snd_soc_component_write(comp, 0x6d1 , 0x42 );
+snd_soc_component_write(comp, 0x608 , 0x45 );
+snd_soc_component_write(comp, 0x608 , 0x4d );
+snd_soc_component_write(comp, 0x608 , 0xcd );
+snd_soc_component_write(comp, 0x609 , 0x4 );
+return;
+#endif
 	if (mode == CLS_H_NORMAL) {
 		dev_err(comp->dev, "%s: Normal mode not applicable for hph_l\n",
 			__func__);
@@ -386,7 +517,7 @@ static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
 	}
 
 	if (is_enable) {
-		if (mode != CLS_AB) {
+		if (mode != CLS_AB && mode != CLS_AB_HIFI) {
 			wcd_enable_clsh_block(ctrl, true);
 			/*
 			 * These K1 values depend on the Headphone Impedance
@@ -400,13 +531,18 @@ static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
 					WCD9XXX_A_CDC_CLSH_K1_LSB,
 					WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK,
 					0xC0);
-			snd_soc_component_update_bits(comp,
-					    WCD9XXX_A_CDC_RX1_RX_PATH_CFG0,
-					    WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK,
-					    WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE);
+//			snd_soc_component_update_bits(comp,
+//					    WCD9XXX_A_CDC_RX1_RX_PATH_CFG0,
+//					    WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK,
+//					    WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE);
+			snd_soc_component_write(comp,
+						WCD9XXX_A_CDC_RX1_RX_PATH_CFG0,
+						0x4a);
 		}
 		wcd_clsh_set_buck_regulator_mode(comp, mode);
 		wcd_clsh_set_flyback_mode(comp, mode);
+		wcd_clsh_gm3_boost_disable(comp, mode);
+		wcd_clsh_force_iq_ctl(comp, mode);
 		wcd_clsh_flyback_ctrl(ctrl, mode, true);
 		wcd_clsh_set_flyback_current(comp, mode);
 		wcd_clsh_set_buck_mode(comp, mode);
@@ -426,15 +562,19 @@ static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state,
 		/* set buck and flyback to Default Mode */
 		wcd_clsh_buck_ctrl(ctrl, CLS_H_NORMAL, false);
 		wcd_clsh_flyback_ctrl(ctrl, CLS_H_NORMAL, false);
+		wcd_clsh_force_iq_ctl(comp, CLS_H_NORMAL);
+		wcd_clsh_gm3_boost_disable(comp, CLS_H_NORMAL);
 		wcd_clsh_set_flyback_mode(comp, CLS_H_NORMAL);
 		wcd_clsh_set_buck_mode(comp, CLS_H_NORMAL);
 		wcd_clsh_set_buck_regulator_mode(comp, CLS_H_NORMAL);
 	}
+pr_err("DEBUG: %s: %d EXIT\n", __func__, __LINE__);
 }
 
 static void wcd_clsh_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state,
 			       bool is_enable, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	if (mode != CLS_H_NORMAL) {
@@ -470,6 +610,7 @@ static void wcd_clsh_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state,
 static int _wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, int req_state,
 				    bool is_enable, int mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	switch (req_state) {
 	case WCD_CLSH_STATE_EAR:
 		wcd_clsh_state_ear(ctrl, req_state, is_enable, mode);
@@ -499,6 +640,7 @@ static int _wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, int req_state,
  */
 static bool wcd_clsh_is_state_valid(int state)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	switch (state) {
 	case WCD_CLSH_STATE_IDLE:
 	case WCD_CLSH_STATE_EAR:
@@ -525,6 +667,7 @@ int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl,
 			    int nstate,
 			    enum wcd_clsh_mode mode)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct snd_soc_component *comp = ctrl->comp;
 
 	if (nstate == ctrl->state)
@@ -552,12 +695,14 @@ int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl,
 
 int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	return ctrl->state;
 }
 
 struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(struct snd_soc_component *comp,
 					  int version)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	struct wcd_clsh_ctrl *ctrl;
 
 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
@@ -572,5 +717,6 @@ struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(struct snd_soc_component *comp,
 
 void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl)
 {
+pr_err("DEBUG: %s: %d ENTER\n", __func__, __LINE__);
 	kfree(ctrl);
 }
diff --git a/sound/soc/codecs/wcd-clsh-v2.h b/sound/soc/codecs/wcd-clsh-v2.h
index a902f98934670..2694a0f58d39a 100644
--- a/sound/soc/codecs/wcd-clsh-v2.h
+++ b/sound/soc/codecs/wcd-clsh-v2.h
@@ -31,6 +31,8 @@ enum wcd_clsh_mode {
 	CLS_H_LP, /* Class-H Low Power */
 	CLS_AB, /* Class-AB */
 	CLS_H_LOHIFI, /* LoHIFI */
+        CLS_H_ULP, /* Ultra Low power */ /* FIXME */
+        CLS_AB_HIFI, /* Class-AB FIXME */
 	CLS_NONE, /* None of the above modes */
 };