Merge branch 'v2014.10-pxa1928' into v2014.10-ara

5 files changed, 91 insertions, 1 deletions

diff --git a/board/Marvell/pxa1928_ara/pxa1928_ara.c b/board/Marvell/pxa1928_ara/pxa1928_ara.c
index 5d47873a3e..dba488ec5e 100644
--- a/board/Marvell/pxa1928_ara/pxa1928_ara.c
+++ b/board/Marvell/pxa1928_ara/pxa1928_ara.c
@@ -19,6 +19,7 @@ e* (C) Copyright 2011
 #include <power/marvell88pm_pmic.h>
 #include <power/pxa1928_freq.h>
 #include <asm/gpio.h>
+#include <linux/usb/mv-phy.h>
 #ifdef CONFIG_OF_LIBFDT
 #include <libfdt.h>
 #endif
@@ -105,6 +106,12 @@ int board_early_init_f(void)
 	return 0;
 }
 
+int g_dnl_board_usb_cable_connected(void)
+{
+	int chrg_type = mrvl_usb_phy_28nm_charger_detect(CONFIG_USB_PHY_BASE);
+	return !(chrg_type == DCP_CHARGER || chrg_type == NULL_CHARGER);
+}
+
 int board_init(void)
 {
 #ifdef CONFIG_CMD_GPIO
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index e17b3fa232..dae363bf16 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -19,6 +19,12 @@ int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	if (ret)
 		return ret;
 
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("\rUSB cable not detected.\n" \
+		     "Command exit.\n");
+		return CMD_RET_FAILURE;
+	}
+
 	while (1) {
 		if (ctrlc())
 			break;
diff --git a/drivers/usb/phy/mv_usb_phy.c b/drivers/usb/phy/mv_usb_phy.c
index 08507c4b3f..8dfde14740 100644
--- a/drivers/usb/phy/mv_usb_phy.c
+++ b/drivers/usb/phy/mv_usb_phy.c
@@ -148,6 +148,57 @@ static int mrvl_usb_phy_28nm_init(u32 base)
 	printf("usb phy inited 0x%x!\n", readl(&file->usb_ctrl0));
 	return 0;
 }
+
+int mrvl_usb_phy_28nm_charger_detect(u32 base)
+{
+	struct usb_file *file = (struct usb_file *)(uintptr_t)base;
+	int charger_type_bc12 = NULL_CHARGER;
+	u32 reg32;
+
+	if (!(readl(&file->usb_ctrl1) & VBUSDTC_OUT_MASK))
+		return charger_type_bc12;
+
+	/* Power up Charger Detector */
+	reg32 = PU_CHRG_DTC_MASK;
+	writel(reg32, &file->chrg_reg);
+
+	udelay(5);
+
+	/* Primary detection */
+	reg32 |= VSRC_CHARGE(1) | VDAT_CHARGE(1) | PD_EN_MASK;
+	writel(reg32, &file->chrg_reg);
+
+	/* Enable swtich DM/DP */
+	reg32 |= EN_SWITCH_DM_MASK | EN_SWITCH_DP_MASK;
+	writel(reg32, &file->chrg_reg);
+
+	mdelay(60);
+
+	if (readl(&file->usb_ctrl1) & CHRG_DTC_OUT_MASK) {
+		/* We have CHRG_DTC_OUT set.
+		 * Now proceed with Secondary Detection
+		 */
+		reg32 |= DP_DM_SWAP_MASK;
+		writel(reg32, &file->chrg_reg);
+
+		mdelay(80);
+
+		if (readl(&file->usb_ctrl1) & CHRG_DTC_OUT_MASK)
+			charger_type_bc12 = DCP_CHARGER;
+		else
+			charger_type_bc12 = CDP_CHARGER;
+	} else
+		charger_type_bc12 = DEFAULT_CHARGER;
+
+	/* Disable swtich DM/DP */
+	reg32 &= ~(EN_SWITCH_DM_MASK | EN_SWITCH_DP_MASK);
+	writel(reg32, &file->chrg_reg);
+
+	/* Power down Charger Detector */
+	writel(0, &file->chrg_reg);
+
+	return charger_type_bc12;
+}
 #endif
 
 
diff --git a/include/configs/pxa1928_ara.h b/include/configs/pxa1928_ara.h
index 68bb2e7aeb..d445e6a1ce 100644
--- a/include/configs/pxa1928_ara.h
+++ b/include/configs/pxa1928_ara.h
@@ -101,7 +101,7 @@
 		" crashkernel=4k@0x8140000 androidboot.lcd=1080_50 user_debug=31" \
 		" earlyprintk=uart8250-32bit,0xd4018000"
 
-#define CONFIG_BOOTCOMMAND	"mrvlboot"
+#define CONFIG_BOOTCOMMAND	"fastboot; mrvlboot"
 #define CONFIG_MMC_BOOT_DEV     "mmc dev 0 0"
 #define RAMDISK_LOADADDR        (CONFIG_TZ_HYPERVISOR_SIZE + 0x02000000)
 #define BOOTIMG_EMMC_ADDR       0x01000000
diff --git a/include/linux/usb/mv-phy.h b/include/linux/usb/mv-phy.h
index c5e5fc0d22..c4528f2f4e 100644
--- a/include/linux/usb/mv-phy.h
+++ b/include/linux/usb/mv-phy.h
@@ -216,14 +216,40 @@ struct usb_file {
 #define PU_OTG_MASK		(0x1 << 4)
 #define PU_OTG(x)		((x << 4) & PU_OTG_MASK)
 	u32 otg_reg;
+#define EN_SWITCH_DM_MASK	(0x1 << 13)
+#define EN_SWITCH_DP_MASK	(0x1 << 12)
+#define VSRC_CHARGE_MASK	(0x3 << 10)
+#define VSRC_CHARGE(x)		(x << 10)
+#define VDAT_CHARGE_MASK	(0x3 << 8)
+#define VDAT_CHARGE(x)		(x << 8)
+#define CDP_DM_AUTO_SWITCH_MASK (0x1 << 7)
+#define DP_DM_SWAP_MASK		(0x1 << 6)
+#define PU_CHRG_DTC_MASK	(0x1 << 5)
+#define PD_EN_MASK		(0x1 << 4)
+#define DCP_EN_MASK		(0x1 << 3)
+#define CDP_EN_MASK		(0x1 << 2)
+#define TESTMON_CHRGDTC_MASK 	(0x3 << 0)
 	u32 chrg_reg;
 	u32 pad[34];
 	u32 usb_ctrl0;
+#define CHRG_DTC_OUT_MASK	(0x1 << 4)
+#define VBUSDTC_OUT_MASK	(0x1 << 2)
 	u32 usb_ctrl1;
 	u32 pad1[2];
 	u32 usb_ctrl2;
 	u32 usb_ctrl3;
 };
 
+enum charger_type {
+	NULL_CHARGER = 0,
+	DEFAULT_CHARGER,
+	DCP_CHARGER,		/* standard wall charger */
+	CDP_CHARGER,		/* Charging Downstream Port */
+	SDP_CHARGER,		/* standard PC charger */
+	NONE_STANDARD_CHARGER,	/* none-standard charger */
+	MAX_CHARGER
+};
+
+
 int mrvl_usb_phy_init(void);
 #endif /* _USB_MV_PHY_H */