diff options
Diffstat (limited to 'aarch64.risu')
| -rw-r--r-- | aarch64.risu | 81 |
1 files changed, 40 insertions, 41 deletions
diff --git a/aarch64.risu b/aarch64.risu index f3e588b..9667ef7 100644 --- a/aarch64.risu +++ b/aarch64.risu @@ -1953,50 +1953,49 @@ ZIP2 A64_V 0 Q:1 001110 size:2 0 rm:5 0 111 10 rn:5 rd:5 \ # ReservedValue: break the !($size == 3 && $Q == 0) constraint ZIP2_RES A64_V 0 0 001110 11 0 rm:5 0 111 10 rn:5 rd:5 -# C3.6.4 AdvSIMD across lanes +# C4-286 AdvSIMD across vector lanes # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 12 11 10 9 5 4 0 # 0 Q U 0 1 1 1 0 size 1 1 0 0 0 opcode 1 0 Rn Rd -SADDLV A64_V 0 Q:1 0 01110 size:2 11000 00011 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -SADDLV_RES A64_V 0 0 0 01110 10 11000 00011 10 rn:5 rd:5 - -SMAXV A64_V 0 Q:1 0 01110 size:2 11000 01010 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -SMAXV_RES A64_V 0 0 0 01110 10 11000 01010 10 rn:5 rd:5 - -SMINV A64_V 0 Q:1 0 01110 size:2 11000 11010 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -SMINV_RES A64_V 0 0 0 01110 10 11000 11010 10 rn:5 rd:5 - -ADDV A64_V 0 Q:1 0 01110 size:2 11000 11011 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -ADDV_RES A64_V 0 0 0 01110 10 11000 11011 10 rn:5 rd:5 - -UADDLV A64_V 0 Q:1 1 01110 size:2 11000 00011 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -UADDLV_RES A64_V 0 0 1 01110 10 11000 00011 10 rn:5 rd:5 - -UMAXV A64_V 0 Q:1 1 01110 size:2 11000 01010 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -UMAXV_RES A64_V 0 0 1 01110 10 11000 01010 10 rn:5 rd:5 - -UMINV A64_V 0 Q:1 1 01110 size:2 11000 11010 10 rn:5 rd:5 \ -!constraints { $size < 2 || ($size == 2 && $Q == 1); } -# ReservedValue: break the constraint (size==2) => (Q=1) -UMINV_RES A64_V 0 0 1 01110 10 11000 11010 10 rn:5 rd:5 - -FMAXNMV A64_V 0 1 1 01110 00 11000 01100 10 rn:5 rd:5 -FMAXV A64_V 0 1 1 01110 00 11000 01111 10 rn:5 rd:5 - -FMINNMV A64_V 0 1 1 01110 10 11000 01100 10 rn:5 rd:5 -FMINV A64_V 0 1 1 01110 10 11000 01111 10 rn:5 rd:5 +ADDV A64_V 0 Q:1 0 01110 s:2 11000 11011 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +ADDV_RES A64_V 0 0 0 01110 10 11000 11011 10 rn:5 rd:5 + +FMAXNMV A64_V 0 1 1 01110 00 11000 01100 10 rn:5 rd:5 +FMAXV A64_V 0 1 1 01110 00 11000 01111 10 rn:5 rd:5 +FMINNMV A64_V 0 1 1 01110 10 11000 01100 10 rn:5 rd:5 +FMINV A64_V 0 1 1 01110 10 11000 01111 10 rn:5 rd:5 + +SADDLV A64_V 0 Q:1 0 01110 s:2 11000 00011 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +SADDLV_RES A64_V 0 0 0 01110 10 11000 00011 10 rn:5 rd:5 + +SMAXV A64_V 0 Q:1 0 01110 s:2 11000 01010 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +SMAXV_RES A64_V 0 0 0 01110 10 11000 01010 10 rn:5 rd:5 + +SMINV A64_V 0 Q:1 0 01110 s:2 11000 11010 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +SMINV_RES A64_V 0 0 0 01110 10 11000 11010 10 rn:5 rd:5 + +UADDLV A64_V 0 Q:1 1 01110 s:2 11000 00011 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +UADDLV_RES A64_V 0 0 1 01110 10 11000 00011 10 rn:5 rd:5 + +UMAXV A64_V 0 Q:1 1 01110 s:2 11000 01010 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +UMAXV_RES A64_V 0 0 1 01110 10 11000 01010 10 rn:5 rd:5 + +UMINV A64_V 0 Q:1 1 01110 s:2 11000 11010 10 rn:5 rd:5 \ +!constraints { $s < 2 || ($s == 2 && $Q == 1); } +# ReservedValue: break the constraint (s==2) => (Q=1) +UMINV_RES A64_V 0 0 1 01110 10 11000 11010 10 rn:5 rd:5 # C3.6.5 AdvSIMD copy # 31 30 29 28 27 26 25 24 23 22 21 20 16 15 14 11 10 9 5 4 0 |