blob: 88a38d00c59149e32180aa4e9e7309c7e686ca5f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
/*
* QEMU Test Finisher interface
*
* Copyright (c) 2018 SiFive, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2 or later, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef HW_SIFIVE_TEST_H
#define HW_SIFIVE_TEST_H
#include "hw/sysbus.h"
#include "qom/object.h"
#define TYPE_SIFIVE_TEST "riscv.sifive.test"
typedef struct SiFiveTestState SiFiveTestState;
DECLARE_INSTANCE_CHECKER(SiFiveTestState, SIFIVE_TEST,
TYPE_SIFIVE_TEST)
struct SiFiveTestState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
MemoryRegion mmio;
};
enum {
FINISHER_FAIL = 0x3333,
FINISHER_PASS = 0x5555,
FINISHER_RESET = 0x7777
};
DeviceState *sifive_test_create(hwaddr addr);
#endif
|
