tag name | pull-target-arm-20230704 (ebe4db105af936d377dc0d4ccb6c1116144187a9) |
tag date | 2023-07-04 17:34:43 +0100 |
tagged by | Peter Maydell <peter.maydell@linaro.org> |
tagged object | commit 86a78272f0... |
target-arm queue:
* Add raw_writes ops for register whose write induce TLB maintenance
* hw/arm/sbsa-ref: use XHCI to replace EHCI
* Avoid splitting Zregs across lines in dump
* Dump ZA[] when active
* Fix SME full tile indexing
* Handle IC IVAU to improve compatibility with JITs
* xlnx-canfd-test: Fix code coverity issues
* gdbstub: Guard M-profile code with CONFIG_TCG
* allwinner-sramc: Set class_size
* target/xtensa: Assert that interrupt level is within bounds
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