aboutsummaryrefslogtreecommitdiff
tag namepull-target-arm-20220718 (6518358c04038b7880617c8f8daff1fed4452bbe)
tag date2022-07-18 14:57:34 +0100
tagged byPeter Maydell <peter.maydell@linaro.org>
tagged objectcommit 004c8a8bc5...
target-arm queue:
* hw/intc/armv7m_nvic: ICPRn must not unpend an IRQ that is being held high * target/arm: Fill in VL for tbflags when SME enabled and SVE disabled * target/arm: Fix aarch64_sve_change_el for SME * linux-user/aarch64: Do not clear PROT_MTE on mprotect * target/arm: Honour VTCR_EL2 bits in Secure EL2 * hw/adc: Fix CONV bit in NPCM7XX ADC CON register * hw/adc: Make adci[*] R/W in NPCM7XX ADC * target/arm: Don't set syndrome ISS for loads and stores with writeback * Align Raspberry Pi DMA interrupts with Linux DTS -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmLVZwIZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lDAD/9hS/LpOp7DG76lxDHX9JJy CAbPpEIMJ0RiV4eHz+ksOggv190Z8qS0BvZVOW8y9NmuSPDTgqL6sZE/4ULL3WtT wD4w8dBRACoNjEPhKUTfqVDSlb4q18JepnY/kIvBpde8qjXIYmR+uVO7O/Sx8HFM ij5ffWqTtCvCdEgAlKXPDsVA1EZ3phwCqSSgkAV5+mZwPeRMHRjQuHvigL0/DjiL JFIii2/sEgtHdLQE5tnrmNVjaGO8EXdkBwMzSLKOIWEjPeu/iyrhyQEzLnc40QwY ZQXXhUYgDOryPdzHwocPBce6y5Vkj5a8tMvmjJRhlSAXk9TBR0vT2SLfObd8yECp DSw2qUTmp2cOkUKQXttLIKa3RFgCDmFCQ1iwMiOI5undZhsfS8DC2inb4vJLjXPT XPbY1mqECSRKwOeLpKR1cNoRm2QSfXm+qVn5MKhiMULEsJeaI/tL8S208cj2dZZY 3kwgQHVDJr2UywVlFnEZexY9pVWzVDpWXd+Ka0xzCTDYrrA0jCzh86V6Q62dQaSF AdObf+T83sL+Pj3g4WnNg2isulGtvnWUp8J1EPPWh/9+BvSAwT6jw0kr39wJFvxd UVznBeh3odN22xv9sx4UJgRPmozO/Xz9XRp/eHQnHe083m4m+apTz+eet1BBgxdb Y5ot0Os3iX58a7OsCOZmbA== =rQN2 -----END PGP SIGNATURE-----